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@@ -97,70 +97,70 @@ Implementing AMP(Asymmetric MultiProcessing)
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1. Build kernel image for core0:
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1. Build kernel image for core0:
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- a. $ make 85xx/mpc8572_ds_defconfig
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+ a. $ make 85xx/mpc8572_ds_defconfig
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- b. $ make menuconfig
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- - un-select "Processor support"->"Symetric multi-processing support"
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+ b. $ make menuconfig
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+ - un-select "Processor support"->"Symetric multi-processing support"
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- c. $ make uImage
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+ c. $ make uImage
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d. $ cp arch/powerpc/boot/uImage /tftpboot/uImage.core0
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d. $ cp arch/powerpc/boot/uImage /tftpboot/uImage.core0
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2. Build kernel image for core1:
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2. Build kernel image for core1:
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- a. $ make 85xx/mpc8572_ds_defconfig
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+ a. $ make 85xx/mpc8572_ds_defconfig
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- b. $ make menuconfig
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- - Un-select "Processor support"->"Symetric multi-processing support"
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- - Select "Advanced setup" -> " Prompt for advanced kernel
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- configuration options"
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- - Select "Set physical address where the kernel is loaded" and
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- set it to 0x20000000, asssuming core1 will start from 512MB.
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- - Select "Set custom page offset address"
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- - Select "Set custom kernel base address"
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- - Select "Set maximum low memory"
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- - "Exit" and save the selection.
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+ b. $ make menuconfig
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+ - Un-select "Processor support"->"Symetric multi-processing support"
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+ - Select "Advanced setup" -> " Prompt for advanced kernel
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+ configuration options"
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+ - Select "Set physical address where the kernel is loaded" and
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+ set it to 0x20000000, asssuming core1 will start from 512MB.
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+ - Select "Set custom page offset address"
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+ - Select "Set custom kernel base address"
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+ - Select "Set maximum low memory"
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+ - "Exit" and save the selection.
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- c. $ make uImage
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+ c. $ make uImage
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d. $ cp arch/powerpc/boot/uImage /tftpboot/uImage.core1
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d. $ cp arch/powerpc/boot/uImage /tftpboot/uImage.core1
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3. Create dtb for core0:
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3. Create dtb for core0:
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- $ dtc -I dts -O dtb -f -b 0 arch/powerpc/boot/dts/mpc8572ds_core0.dts > /tftpboot/mpc8572ds_core0.dtb
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+ $ dtc -I dts -O dtb -f -b 0 arch/powerpc/boot/dts/mpc8572ds_core0.dts > /tftpboot/mpc8572ds_core0.dtb
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4. Create dtb for core1:
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4. Create dtb for core1:
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- $ dtc -I dts -O dtb -f -b 1 arch/powerpc/boot/dts/mpc8572ds_core1.dts > /tftpboot/mpc8572ds_core1.dtb
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+ $ dtc -I dts -O dtb -f -b 1 arch/powerpc/boot/dts/mpc8572ds_core1.dts > /tftpboot/mpc8572ds_core1.dtb
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5. Bring up two cores separately:
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5. Bring up two cores separately:
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- a. Power on the board, under u-boot prompt:
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- => setenv <serverip>
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- => setenv <ipaddr>
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- => setenv bootargs root=/dev/ram rw console=ttyS0,115200
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- b. Bring up core1's kernel first:
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- => setenv bootm_low 0x20000000
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- => setenv bootm_size 0x10000000
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- => tftp 21000000 8572/uImage.core1
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- => tftp 22000000 8572/ramdiskfile
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- => tftp 20c00000 8572/mpc8572ds_core1.dtb
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- => interrupts off
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- => bootm start 21000000 22000000 20c00000
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- => bootm loados
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- => bootm ramdisk
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- => bootm fdt
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- => fdt boardsetup
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- => fdt chosen $initrd_start $initrd_end
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- => bootm prep
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- => cpu 1 release $bootm_low - $fdtaddr -
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- c. Bring up core0's kernel(on the same u-boot console):
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- => setenv bootm_low 0
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- => setenv bootm_size 0x20000000
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- => tftp 1000000 8572/uImage.core0
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- => tftp 2000000 8572/ramdiskfile
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- => tftp c00000 8572/mpc8572ds_core0.dtb
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- => bootm 1000000 2000000 c00000
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+ a. Power on the board, under u-boot prompt:
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+ => setenv <serverip>
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+ => setenv <ipaddr>
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+ => setenv bootargs root=/dev/ram rw console=ttyS0,115200
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+ b. Bring up core1's kernel first:
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+ => setenv bootm_low 0x20000000
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+ => setenv bootm_size 0x10000000
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+ => tftp 21000000 8572/uImage.core1
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+ => tftp 22000000 8572/ramdiskfile
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+ => tftp 20c00000 8572/mpc8572ds_core1.dtb
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+ => interrupts off
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+ => bootm start 21000000 22000000 20c00000
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+ => bootm loados
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+ => bootm ramdisk
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+ => bootm fdt
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+ => fdt boardsetup
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+ => fdt chosen $initrd_start $initrd_end
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+ => bootm prep
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+ => cpu 1 release $bootm_low - $fdtaddr -
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+ c. Bring up core0's kernel(on the same u-boot console):
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+ => setenv bootm_low 0
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+ => setenv bootm_size 0x20000000
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+ => tftp 1000000 8572/uImage.core0
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+ => tftp 2000000 8572/ramdiskfile
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+ => tftp c00000 8572/mpc8572ds_core0.dtb
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+ => bootm 1000000 2000000 c00000
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Please note only core0 will run u-boot, core1 starts kernel directly after
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Please note only core0 will run u-boot, core1 starts kernel directly after
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"cpu release" command is issued.
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"cpu release" command is issued.
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