usb_ehci_core.c 21 KB

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  1. /*-
  2. * Copyright (c) 2007-2008, Juniper Networks, Inc.
  3. * Copyright (c) 2008, Excito Elektronik i Skåne AB
  4. * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
  5. *
  6. * All rights reserved.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation version 2 of
  11. * the License.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <asm/byteorder.h>
  25. #include <usb.h>
  26. #include <asm/io.h>
  27. #include <malloc.h>
  28. #include "usb_ehci.h"
  29. int rootdev;
  30. struct ehci_hccr *hccr; /* R/O registers, not need for volatile */
  31. volatile struct ehci_hcor *hcor;
  32. static uint16_t portreset;
  33. static struct QH qh_list __attribute__((aligned(32)));
  34. static struct descriptor {
  35. struct usb_hub_descriptor hub;
  36. struct usb_device_descriptor device;
  37. struct usb_linux_config_descriptor config;
  38. struct usb_linux_interface_descriptor interface;
  39. struct usb_endpoint_descriptor endpoint;
  40. } __attribute__ ((packed)) descriptor = {
  41. {
  42. 0x8, /* bDescLength */
  43. 0x29, /* bDescriptorType: hub descriptor */
  44. 2, /* bNrPorts -- runtime modified */
  45. 0, /* wHubCharacteristics */
  46. 0xff, /* bPwrOn2PwrGood */
  47. 0, /* bHubCntrCurrent */
  48. {}, /* Device removable */
  49. {} /* at most 7 ports! XXX */
  50. },
  51. {
  52. 0x12, /* bLength */
  53. 1, /* bDescriptorType: UDESC_DEVICE */
  54. 0x0002, /* bcdUSB: v2.0 */
  55. 9, /* bDeviceClass: UDCLASS_HUB */
  56. 0, /* bDeviceSubClass: UDSUBCLASS_HUB */
  57. 1, /* bDeviceProtocol: UDPROTO_HSHUBSTT */
  58. 64, /* bMaxPacketSize: 64 bytes */
  59. 0x0000, /* idVendor */
  60. 0x0000, /* idProduct */
  61. 0x0001, /* bcdDevice */
  62. 1, /* iManufacturer */
  63. 2, /* iProduct */
  64. 0, /* iSerialNumber */
  65. 1 /* bNumConfigurations: 1 */
  66. },
  67. {
  68. 0x9,
  69. 2, /* bDescriptorType: UDESC_CONFIG */
  70. cpu_to_le16(0x19),
  71. 1, /* bNumInterface */
  72. 1, /* bConfigurationValue */
  73. 0, /* iConfiguration */
  74. 0x40, /* bmAttributes: UC_SELF_POWER */
  75. 0 /* bMaxPower */
  76. },
  77. {
  78. 0x9, /* bLength */
  79. 4, /* bDescriptorType: UDESC_INTERFACE */
  80. 0, /* bInterfaceNumber */
  81. 0, /* bAlternateSetting */
  82. 1, /* bNumEndpoints */
  83. 9, /* bInterfaceClass: UICLASS_HUB */
  84. 0, /* bInterfaceSubClass: UISUBCLASS_HUB */
  85. 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
  86. 0 /* iInterface */
  87. },
  88. {
  89. 0x7, /* bLength */
  90. 5, /* bDescriptorType: UDESC_ENDPOINT */
  91. 0x81, /* bEndpointAddress:
  92. * UE_DIR_IN | EHCI_INTR_ENDPT
  93. */
  94. 3, /* bmAttributes: UE_INTERRUPT */
  95. 8, 0, /* wMaxPacketSize */
  96. 255 /* bInterval */
  97. },
  98. };
  99. #if defined(CONFIG_EHCI_IS_TDI)
  100. #define ehci_is_TDI() (1)
  101. #else
  102. #define ehci_is_TDI() (0)
  103. #endif
  104. #if defined(CONFIG_EHCI_DCACHE)
  105. /*
  106. * Routines to handle (flush/invalidate) the dcache for the QH and qTD
  107. * structures and data buffers. This is needed on platforms using this
  108. * EHCI support with dcache enabled.
  109. */
  110. static void flush_invalidate(u32 addr, int size, int flush)
  111. {
  112. if (flush)
  113. flush_dcache_range(addr, addr + size);
  114. else
  115. invalidate_dcache_range(addr, addr + size);
  116. }
  117. static void cache_qtd(struct qTD *qtd, int flush)
  118. {
  119. u32 *ptr = (u32 *)qtd->qt_buffer[0];
  120. int len = (qtd->qt_token & 0x7fff0000) >> 16;
  121. flush_invalidate((u32)qtd, sizeof(struct qTD), flush);
  122. if (ptr && len)
  123. flush_invalidate((u32)ptr, len, flush);
  124. }
  125. static inline struct QH *qh_addr(struct QH *qh)
  126. {
  127. return (struct QH *)((u32)qh & 0xffffffe0);
  128. }
  129. static void cache_qh(struct QH *qh, int flush)
  130. {
  131. struct qTD *qtd;
  132. struct qTD *next;
  133. static struct qTD *first_qtd;
  134. /*
  135. * Walk the QH list and flush/invalidate all entries
  136. */
  137. while (1) {
  138. flush_invalidate((u32)qh_addr(qh), sizeof(struct QH), flush);
  139. if ((u32)qh & QH_LINK_TYPE_QH)
  140. break;
  141. qh = qh_addr(qh);
  142. qh = (struct QH *)qh->qh_link;
  143. }
  144. qh = qh_addr(qh);
  145. /*
  146. * Save first qTD pointer, needed for invalidating pass on this QH
  147. */
  148. if (flush)
  149. first_qtd = qtd = (struct qTD *)(*(u32 *)&qh->qh_overlay &
  150. 0xffffffe0);
  151. else
  152. qtd = first_qtd;
  153. /*
  154. * Walk the qTD list and flush/invalidate all entries
  155. */
  156. while (1) {
  157. if (qtd == NULL)
  158. break;
  159. cache_qtd(qtd, flush);
  160. next = (struct qTD *)((u32)qtd->qt_next & 0xffffffe0);
  161. if (next == qtd)
  162. break;
  163. qtd = next;
  164. }
  165. }
  166. static inline void ehci_flush_dcache(struct QH *qh)
  167. {
  168. cache_qh(qh, 1);
  169. }
  170. static inline void ehci_invalidate_dcache(struct QH *qh)
  171. {
  172. cache_qh(qh, 0);
  173. }
  174. #else /* CONFIG_EHCI_DCACHE */
  175. /*
  176. *
  177. */
  178. static inline void ehci_flush_dcache(struct QH *qh)
  179. {
  180. }
  181. static inline void ehci_invalidate_dcache(struct QH *qh)
  182. {
  183. }
  184. #endif /* CONFIG_EHCI_DCACHE */
  185. static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
  186. {
  187. uint32_t result;
  188. do {
  189. result = ehci_readl(ptr);
  190. if (result == ~(uint32_t)0)
  191. return -1;
  192. result &= mask;
  193. if (result == done)
  194. return 0;
  195. udelay(1);
  196. usec--;
  197. } while (usec > 0);
  198. return -1;
  199. }
  200. static void ehci_free(void *p, size_t sz)
  201. {
  202. }
  203. static int ehci_reset(void)
  204. {
  205. uint32_t cmd;
  206. uint32_t tmp;
  207. uint32_t *reg_ptr;
  208. int ret = 0;
  209. cmd = ehci_readl(&hcor->or_usbcmd);
  210. cmd |= CMD_RESET;
  211. ehci_writel(&hcor->or_usbcmd, cmd);
  212. ret = handshake((uint32_t *)&hcor->or_usbcmd, CMD_RESET, 0, 250 * 1000);
  213. if (ret < 0) {
  214. printf("EHCI fail to reset\n");
  215. goto out;
  216. }
  217. if (ehci_is_TDI()) {
  218. reg_ptr = (uint32_t *)((u8 *)hcor + USBMODE);
  219. tmp = ehci_readl(reg_ptr);
  220. tmp |= USBMODE_CM_HC;
  221. #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
  222. tmp |= USBMODE_BE;
  223. #endif
  224. ehci_writel(reg_ptr, tmp);
  225. }
  226. out:
  227. return ret;
  228. }
  229. static void *ehci_alloc(size_t sz, size_t align)
  230. {
  231. static struct QH qh __attribute__((aligned(32)));
  232. static struct qTD td[3] __attribute__((aligned (32)));
  233. static int ntds;
  234. void *p;
  235. switch (sz) {
  236. case sizeof(struct QH):
  237. p = &qh;
  238. ntds = 0;
  239. break;
  240. case sizeof(struct qTD):
  241. if (ntds == 3) {
  242. debug("out of TDs\n");
  243. return NULL;
  244. }
  245. p = &td[ntds];
  246. ntds++;
  247. break;
  248. default:
  249. debug("unknown allocation size\n");
  250. return NULL;
  251. }
  252. memset(p, sz, 0);
  253. return p;
  254. }
  255. static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
  256. {
  257. uint32_t addr, delta, next;
  258. int idx;
  259. addr = (uint32_t) buf;
  260. idx = 0;
  261. while (idx < 5) {
  262. td->qt_buffer[idx] = cpu_to_hc32(addr);
  263. next = (addr + 4096) & ~4095;
  264. delta = next - addr;
  265. if (delta >= sz)
  266. break;
  267. sz -= delta;
  268. addr = next;
  269. idx++;
  270. }
  271. if (idx == 5) {
  272. debug("out of buffer pointers (%u bytes left)\n", sz);
  273. return -1;
  274. }
  275. return 0;
  276. }
  277. static int
  278. ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
  279. int length, struct devrequest *req)
  280. {
  281. struct QH *qh;
  282. struct qTD *td;
  283. volatile struct qTD *vtd;
  284. unsigned long ts;
  285. uint32_t *tdp;
  286. uint32_t endpt, token, usbsts;
  287. uint32_t c, toggle;
  288. uint32_t cmd;
  289. int ret = 0;
  290. debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
  291. buffer, length, req);
  292. if (req != NULL)
  293. debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
  294. req->request, req->request,
  295. req->requesttype, req->requesttype,
  296. le16_to_cpu(req->value), le16_to_cpu(req->value),
  297. le16_to_cpu(req->index));
  298. qh = ehci_alloc(sizeof(struct QH), 32);
  299. if (qh == NULL) {
  300. debug("unable to allocate QH\n");
  301. return -1;
  302. }
  303. qh->qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
  304. c = (usb_pipespeed(pipe) != USB_SPEED_HIGH &&
  305. usb_pipeendpoint(pipe) == 0) ? 1 : 0;
  306. endpt = (8 << 28) |
  307. (c << 27) |
  308. (usb_maxpacket(dev, pipe) << 16) |
  309. (0 << 15) |
  310. (1 << 14) |
  311. (usb_pipespeed(pipe) << 12) |
  312. (usb_pipeendpoint(pipe) << 8) |
  313. (0 << 7) | (usb_pipedevice(pipe) << 0);
  314. qh->qh_endpt1 = cpu_to_hc32(endpt);
  315. endpt = (1 << 30) |
  316. (dev->portnr << 23) |
  317. (dev->parent->devnum << 16) | (0 << 8) | (0 << 0);
  318. qh->qh_endpt2 = cpu_to_hc32(endpt);
  319. qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
  320. qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
  321. td = NULL;
  322. tdp = &qh->qh_overlay.qt_next;
  323. toggle =
  324. usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
  325. if (req != NULL) {
  326. td = ehci_alloc(sizeof(struct qTD), 32);
  327. if (td == NULL) {
  328. debug("unable to allocate SETUP td\n");
  329. goto fail;
  330. }
  331. td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
  332. td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
  333. token = (0 << 31) |
  334. (sizeof(*req) << 16) |
  335. (0 << 15) | (0 << 12) | (3 << 10) | (2 << 8) | (0x80 << 0);
  336. td->qt_token = cpu_to_hc32(token);
  337. if (ehci_td_buffer(td, req, sizeof(*req)) != 0) {
  338. debug("unable construct SETUP td\n");
  339. ehci_free(td, sizeof(*td));
  340. goto fail;
  341. }
  342. *tdp = cpu_to_hc32((uint32_t) td);
  343. tdp = &td->qt_next;
  344. toggle = 1;
  345. }
  346. if (length > 0 || req == NULL) {
  347. td = ehci_alloc(sizeof(struct qTD), 32);
  348. if (td == NULL) {
  349. debug("unable to allocate DATA td\n");
  350. goto fail;
  351. }
  352. td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
  353. td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
  354. token = (toggle << 31) |
  355. (length << 16) |
  356. ((req == NULL ? 1 : 0) << 15) |
  357. (0 << 12) |
  358. (3 << 10) |
  359. ((usb_pipein(pipe) ? 1 : 0) << 8) | (0x80 << 0);
  360. td->qt_token = cpu_to_hc32(token);
  361. if (ehci_td_buffer(td, buffer, length) != 0) {
  362. debug("unable construct DATA td\n");
  363. ehci_free(td, sizeof(*td));
  364. goto fail;
  365. }
  366. *tdp = cpu_to_hc32((uint32_t) td);
  367. tdp = &td->qt_next;
  368. }
  369. if (req != NULL) {
  370. td = ehci_alloc(sizeof(struct qTD), 32);
  371. if (td == NULL) {
  372. debug("unable to allocate ACK td\n");
  373. goto fail;
  374. }
  375. td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
  376. td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
  377. token = (toggle << 31) |
  378. (0 << 16) |
  379. (1 << 15) |
  380. (0 << 12) |
  381. (3 << 10) |
  382. ((usb_pipein(pipe) ? 0 : 1) << 8) | (0x80 << 0);
  383. td->qt_token = cpu_to_hc32(token);
  384. *tdp = cpu_to_hc32((uint32_t) td);
  385. tdp = &td->qt_next;
  386. }
  387. qh_list.qh_link = cpu_to_hc32((uint32_t) qh | QH_LINK_TYPE_QH);
  388. /* Flush dcache */
  389. ehci_flush_dcache(&qh_list);
  390. usbsts = ehci_readl(&hcor->or_usbsts);
  391. ehci_writel(&hcor->or_usbsts, (usbsts & 0x3f));
  392. /* Enable async. schedule. */
  393. cmd = ehci_readl(&hcor->or_usbcmd);
  394. cmd |= CMD_ASE;
  395. ehci_writel(&hcor->or_usbcmd, cmd);
  396. ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, STD_ASS,
  397. 100 * 1000);
  398. if (ret < 0) {
  399. printf("EHCI fail timeout STD_ASS set\n");
  400. goto fail;
  401. }
  402. /* Wait for TDs to be processed. */
  403. ts = get_timer(0);
  404. vtd = td;
  405. do {
  406. /* Invalidate dcache */
  407. ehci_invalidate_dcache(&qh_list);
  408. token = hc32_to_cpu(vtd->qt_token);
  409. if (!(token & 0x80))
  410. break;
  411. } while (get_timer(ts) < CONFIG_SYS_HZ);
  412. /* Disable async schedule. */
  413. cmd = ehci_readl(&hcor->or_usbcmd);
  414. cmd &= ~CMD_ASE;
  415. ehci_writel(&hcor->or_usbcmd, cmd);
  416. ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, 0,
  417. 100 * 1000);
  418. if (ret < 0) {
  419. printf("EHCI fail timeout STD_ASS reset\n");
  420. goto fail;
  421. }
  422. qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
  423. token = hc32_to_cpu(qh->qh_overlay.qt_token);
  424. if (!(token & 0x80)) {
  425. debug("TOKEN=%#x\n", token);
  426. switch (token & 0xfc) {
  427. case 0:
  428. toggle = token >> 31;
  429. usb_settoggle(dev, usb_pipeendpoint(pipe),
  430. usb_pipeout(pipe), toggle);
  431. dev->status = 0;
  432. break;
  433. case 0x40:
  434. dev->status = USB_ST_STALLED;
  435. break;
  436. case 0xa0:
  437. case 0x20:
  438. dev->status = USB_ST_BUF_ERR;
  439. break;
  440. case 0x50:
  441. case 0x10:
  442. dev->status = USB_ST_BABBLE_DET;
  443. break;
  444. default:
  445. dev->status = USB_ST_CRC_ERR;
  446. break;
  447. }
  448. dev->act_len = length - ((token >> 16) & 0x7fff);
  449. } else {
  450. dev->act_len = 0;
  451. debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
  452. dev->devnum, ehci_readl(&hcor->or_usbsts),
  453. ehci_readl(&hcor->or_portsc[0]),
  454. ehci_readl(&hcor->or_portsc[1]));
  455. }
  456. return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
  457. fail:
  458. td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next);
  459. while (td != (void *)QT_NEXT_TERMINATE) {
  460. qh->qh_overlay.qt_next = td->qt_next;
  461. ehci_free(td, sizeof(*td));
  462. td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next);
  463. }
  464. ehci_free(qh, sizeof(*qh));
  465. return -1;
  466. }
  467. static inline int min3(int a, int b, int c)
  468. {
  469. if (b < a)
  470. a = b;
  471. if (c < a)
  472. a = c;
  473. return a;
  474. }
  475. int
  476. ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
  477. int length, struct devrequest *req)
  478. {
  479. uint8_t tmpbuf[4];
  480. u16 typeReq;
  481. void *srcptr = NULL;
  482. int len, srclen;
  483. uint32_t reg;
  484. uint32_t *status_reg;
  485. if (le16_to_cpu(req->index) >= CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) {
  486. printf("The request port(%d) is not configured\n",
  487. le16_to_cpu(req->index) - 1);
  488. return -1;
  489. }
  490. status_reg = (uint32_t *)&hcor->or_portsc[
  491. le16_to_cpu(req->index) - 1];
  492. srclen = 0;
  493. debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
  494. req->request, req->request,
  495. req->requesttype, req->requesttype,
  496. le16_to_cpu(req->value), le16_to_cpu(req->index));
  497. typeReq = req->request << 8 | req->requesttype;
  498. switch (le16_to_cpu(typeReq)) {
  499. case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
  500. switch (le16_to_cpu(req->value) >> 8) {
  501. case USB_DT_DEVICE:
  502. debug("USB_DT_DEVICE request\n");
  503. srcptr = &descriptor.device;
  504. srclen = 0x12;
  505. break;
  506. case USB_DT_CONFIG:
  507. debug("USB_DT_CONFIG config\n");
  508. srcptr = &descriptor.config;
  509. srclen = 0x19;
  510. break;
  511. case USB_DT_STRING:
  512. debug("USB_DT_STRING config\n");
  513. switch (le16_to_cpu(req->value) & 0xff) {
  514. case 0: /* Language */
  515. srcptr = "\4\3\1\0";
  516. srclen = 4;
  517. break;
  518. case 1: /* Vendor */
  519. srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
  520. srclen = 14;
  521. break;
  522. case 2: /* Product */
  523. srcptr = "\52\3E\0H\0C\0I\0 "
  524. "\0H\0o\0s\0t\0 "
  525. "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
  526. srclen = 42;
  527. break;
  528. default:
  529. debug("unknown value DT_STRING %x\n",
  530. le16_to_cpu(req->value));
  531. goto unknown;
  532. }
  533. break;
  534. default:
  535. debug("unknown value %x\n", le16_to_cpu(req->value));
  536. goto unknown;
  537. }
  538. break;
  539. case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
  540. switch (le16_to_cpu(req->value) >> 8) {
  541. case USB_DT_HUB:
  542. debug("USB_DT_HUB config\n");
  543. srcptr = &descriptor.hub;
  544. srclen = 0x8;
  545. break;
  546. default:
  547. debug("unknown value %x\n", le16_to_cpu(req->value));
  548. goto unknown;
  549. }
  550. break;
  551. case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
  552. debug("USB_REQ_SET_ADDRESS\n");
  553. rootdev = le16_to_cpu(req->value);
  554. break;
  555. case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
  556. debug("USB_REQ_SET_CONFIGURATION\n");
  557. /* Nothing to do */
  558. break;
  559. case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
  560. tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */
  561. tmpbuf[1] = 0;
  562. srcptr = tmpbuf;
  563. srclen = 2;
  564. break;
  565. case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
  566. memset(tmpbuf, 0, 4);
  567. reg = ehci_readl(status_reg);
  568. if (reg & EHCI_PS_CS)
  569. tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
  570. if (reg & EHCI_PS_PE)
  571. tmpbuf[0] |= USB_PORT_STAT_ENABLE;
  572. if (reg & EHCI_PS_SUSP)
  573. tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
  574. if (reg & EHCI_PS_OCA)
  575. tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
  576. if (reg & EHCI_PS_PR &&
  577. (portreset & (1 << le16_to_cpu(req->index)))) {
  578. int ret;
  579. /* force reset to complete */
  580. reg = reg & ~(EHCI_PS_PR | EHCI_PS_CLEAR);
  581. ehci_writel(status_reg, reg);
  582. ret = handshake(status_reg, EHCI_PS_PR, 0, 2 * 1000);
  583. if (!ret)
  584. tmpbuf[0] |= USB_PORT_STAT_RESET;
  585. else
  586. printf("port(%d) reset error\n",
  587. le16_to_cpu(req->index) - 1);
  588. }
  589. if (reg & EHCI_PS_PP)
  590. tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
  591. if (ehci_is_TDI()) {
  592. switch ((reg >> 26) & 3) {
  593. case 0:
  594. break;
  595. case 1:
  596. tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
  597. break;
  598. case 2:
  599. default:
  600. tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
  601. break;
  602. }
  603. } else {
  604. tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
  605. }
  606. if (reg & EHCI_PS_CSC)
  607. tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
  608. if (reg & EHCI_PS_PEC)
  609. tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
  610. if (reg & EHCI_PS_OCC)
  611. tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
  612. if (portreset & (1 << le16_to_cpu(req->index)))
  613. tmpbuf[2] |= USB_PORT_STAT_C_RESET;
  614. srcptr = tmpbuf;
  615. srclen = 4;
  616. break;
  617. case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
  618. reg = ehci_readl(status_reg);
  619. reg &= ~EHCI_PS_CLEAR;
  620. switch (le16_to_cpu(req->value)) {
  621. case USB_PORT_FEAT_ENABLE:
  622. reg |= EHCI_PS_PE;
  623. ehci_writel(status_reg, reg);
  624. break;
  625. case USB_PORT_FEAT_POWER:
  626. if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams))) {
  627. reg |= EHCI_PS_PP;
  628. ehci_writel(status_reg, reg);
  629. }
  630. break;
  631. case USB_PORT_FEAT_RESET:
  632. if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS &&
  633. !ehci_is_TDI() &&
  634. EHCI_PS_IS_LOWSPEED(reg)) {
  635. /* Low speed device, give up ownership. */
  636. debug("port %d low speed --> companion\n",
  637. req->index - 1);
  638. reg |= EHCI_PS_PO;
  639. ehci_writel(status_reg, reg);
  640. break;
  641. } else {
  642. reg |= EHCI_PS_PR;
  643. reg &= ~EHCI_PS_PE;
  644. ehci_writel(status_reg, reg);
  645. /*
  646. * caller must wait, then call GetPortStatus
  647. * usb 2.0 specification say 50 ms resets on
  648. * root
  649. */
  650. wait_ms(50);
  651. portreset |= 1 << le16_to_cpu(req->index);
  652. }
  653. break;
  654. default:
  655. debug("unknown feature %x\n", le16_to_cpu(req->value));
  656. goto unknown;
  657. }
  658. /* unblock posted writes */
  659. ehci_readl(&hcor->or_usbcmd);
  660. break;
  661. case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
  662. reg = ehci_readl(status_reg);
  663. switch (le16_to_cpu(req->value)) {
  664. case USB_PORT_FEAT_ENABLE:
  665. reg &= ~EHCI_PS_PE;
  666. break;
  667. case USB_PORT_FEAT_C_ENABLE:
  668. reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_PE;
  669. break;
  670. case USB_PORT_FEAT_POWER:
  671. if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams)))
  672. reg = reg & ~(EHCI_PS_CLEAR | EHCI_PS_PP);
  673. case USB_PORT_FEAT_C_CONNECTION:
  674. reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_CSC;
  675. break;
  676. case USB_PORT_FEAT_OVER_CURRENT:
  677. reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_OCC;
  678. break;
  679. case USB_PORT_FEAT_C_RESET:
  680. portreset &= ~(1 << le16_to_cpu(req->index));
  681. break;
  682. default:
  683. debug("unknown feature %x\n", le16_to_cpu(req->value));
  684. goto unknown;
  685. }
  686. ehci_writel(status_reg, reg);
  687. /* unblock posted write */
  688. ehci_readl(&hcor->or_usbcmd);
  689. break;
  690. default:
  691. debug("Unknown request\n");
  692. goto unknown;
  693. }
  694. wait_ms(1);
  695. len = min3(srclen, le16_to_cpu(req->length), length);
  696. if (srcptr != NULL && len > 0)
  697. memcpy(buffer, srcptr, len);
  698. else
  699. debug("Len is 0\n");
  700. dev->act_len = len;
  701. dev->status = 0;
  702. return 0;
  703. unknown:
  704. debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
  705. req->requesttype, req->request, le16_to_cpu(req->value),
  706. le16_to_cpu(req->index), le16_to_cpu(req->length));
  707. dev->act_len = 0;
  708. dev->status = USB_ST_STALLED;
  709. return -1;
  710. }
  711. int usb_lowlevel_stop(void)
  712. {
  713. return ehci_hcd_stop();
  714. }
  715. int usb_lowlevel_init(void)
  716. {
  717. uint32_t reg;
  718. uint32_t cmd;
  719. if (ehci_hcd_init() != 0)
  720. return -1;
  721. /* EHCI spec section 4.1 */
  722. if (ehci_reset() != 0)
  723. return -1;
  724. #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
  725. if (ehci_hcd_init() != 0)
  726. return -1;
  727. #endif
  728. /* Set head of reclaim list */
  729. memset(&qh_list, 0, sizeof(qh_list));
  730. qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
  731. qh_list.qh_endpt1 = cpu_to_hc32((1 << 15) | (USB_SPEED_HIGH << 12));
  732. qh_list.qh_curtd = cpu_to_hc32(QT_NEXT_TERMINATE);
  733. qh_list.qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
  734. qh_list.qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
  735. qh_list.qh_overlay.qt_token = cpu_to_hc32(0x40);
  736. /* Set async. queue head pointer. */
  737. ehci_writel(&hcor->or_asynclistaddr, (uint32_t)&qh_list);
  738. reg = ehci_readl(&hccr->cr_hcsparams);
  739. descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
  740. printf("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
  741. /* Port Indicators */
  742. if (HCS_INDICATOR(reg))
  743. descriptor.hub.wHubCharacteristics |= 0x80;
  744. /* Port Power Control */
  745. if (HCS_PPC(reg))
  746. descriptor.hub.wHubCharacteristics |= 0x01;
  747. /* Start the host controller. */
  748. cmd = ehci_readl(&hcor->or_usbcmd);
  749. /*
  750. * Philips, Intel, and maybe others need CMD_RUN before the
  751. * root hub will detect new devices (why?); NEC doesn't
  752. */
  753. cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
  754. cmd |= CMD_RUN;
  755. ehci_writel(&hcor->or_usbcmd, cmd);
  756. /* take control over the ports */
  757. cmd = ehci_readl(&hcor->or_configflag);
  758. cmd |= FLAG_CF;
  759. ehci_writel(&hcor->or_configflag, cmd);
  760. /* unblock posted write */
  761. cmd = ehci_readl(&hcor->or_usbcmd);
  762. wait_ms(5);
  763. reg = HC_VERSION(ehci_readl(&hccr->cr_capbase));
  764. printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
  765. rootdev = 0;
  766. return 0;
  767. }
  768. int
  769. submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  770. int length)
  771. {
  772. if (usb_pipetype(pipe) != PIPE_BULK) {
  773. debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
  774. return -1;
  775. }
  776. return ehci_submit_async(dev, pipe, buffer, length, NULL);
  777. }
  778. int
  779. submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  780. int length, struct devrequest *setup)
  781. {
  782. if (usb_pipetype(pipe) != PIPE_CONTROL) {
  783. debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
  784. return -1;
  785. }
  786. if (usb_pipedevice(pipe) == rootdev) {
  787. if (rootdev == 0)
  788. dev->speed = USB_SPEED_HIGH;
  789. return ehci_submit_root(dev, pipe, buffer, length, setup);
  790. }
  791. return ehci_submit_async(dev, pipe, buffer, length, setup);
  792. }
  793. int
  794. submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  795. int length, int interval)
  796. {
  797. debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
  798. dev, pipe, buffer, length, interval);
  799. return -1;
  800. }