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uboot-vybrid_public
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6790c55704
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phyCORE-Vybrid-PD15.1-rc1
vphyCORE-Vybrid-PD15.1-rc1
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Poonam_Aggrwal-b10812
e1be0d25ec
32bit BUg fix for DDR2 on 8572
16 anni fa
Dave Liu
22cca7e1cd
fsl-ddr: make the self refresh idle threshold configurable
16 anni fa
Dave Liu
22ff3d0134
fsl-ddr: clean up the ddr code for DDR3 controller
16 anni fa
Haiying Wang
dbbbb3abef
Make DDR interleaving mode work correctly
16 anni fa
Kumar Gala
58e5e9aff1
FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.
16 anni fa