phyus/uboot-vybrid_public

نویسنده	SHA1 پیام	تاریخ
Poonam_Aggrwal-b10812	e1be0d25ec 32bit BUg fix for DDR2 on 8572	16 سال پیش
Dave Liu	22cca7e1cd fsl-ddr: make the self refresh idle threshold configurable	16 سال پیش
Dave Liu	22ff3d0134 fsl-ddr: clean up the ddr code for DDR3 controller	16 سال پیش
Haiying Wang	dbbbb3abef Make DDR interleaving mode work correctly	16 سال پیش
Kumar Gala	58e5e9aff1 FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.	16 سال پیش