phyus/uboot-vybrid_public

Autor	SHA1 Mensaxe	Data
Haiying Wang	1f293b417a Add debug information for DDR controller registers	%!s(int64=16) %!d(string=hai) anos
Haiying Wang	dbbbb3abef Make DDR interleaving mode work correctly	%!s(int64=16) %!d(string=hai) anos
Kumar Gala	302e52e0b1 Fix compiler warning in mpc8xxx ddr code	%!s(int64=16) %!d(string=hai) anos
Kumar Gala	58e5e9aff1 FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.	%!s(int64=16) %!d(string=hai) anos