* Patch by Jon Loeliger, 24 Aug 2004:

  - Fix PCI window on MPC85xx; remove unneeded PCI initialization
    from board_early_init_f()
  - Provide SW workaround for PCI initialization on 85xx CDS
  - Convert MPC85xxADS to use common CFI flash driver

* Cleanup: avoid compiler warnings

* Add CMC PU2 board to MAKEALL script

CHANGELOG

@@ -2,6 +2,12 @@
 Changes since U-Boot 1.1.1:
 ======================================================================
 
+* Patch by Jon Loeliger, 24 Aug 2004:
+  - Fix PCI window on MPC85xx; remove unneeded PCI initialization
+    from board_early_init_f()
+  - Provide SW workaround for PCI initialization on 85xx CDS
+  - Convert MPC85xxADS to use common CFI flash driver
+
 * Patches by George G. Davis, 24 Aug 2004:
   - Enable ramdisk/initrd tagged param support for omap1610h2_config
   - Remove static network setup defaults from mx1ads_config

MAKEALL

@@ -140,10 +140,11 @@ LIST_ARM7="B2 ep7312 evb4510 impa7 modnet50"
 #########################################################################
 
 LIST_ARM9="	\
-	at91rm9200dk	integratorcp	integratorap 	lpd7a400	\
-	mx1ads		mx1fs2		omap1510inn	omap1610h2	\
-	omap1610inn	omap730p2	scb9328		smdk2400	\
-	smdk2410	trab		VCMA9		versatile	\
+	at91rm9200dk	cmc_pu2		integratorcp	integratorap 	\
+	lpd7a400	mx1ads		mx1fs2		omap1510inn	\
+	omap1610h2	omap1610inn	omap730p2	scb9328		\
+	smdk2400	smdk2410	trab		VCMA9		\
+	versatile							\
 "
 
 #########################################################################

board/mpc8540ads/Makefile

@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
 
 LIB	= lib$(BOARD).a
 
-OBJS	:= $(BOARD).o flash.o
+OBJS	:= $(BOARD).o
 SOBJS	:= init.o
 #SOBJS	:=
 

board/mpc8540ads/mpc8540ads.c

@@ -44,13 +44,6 @@ long int fixed_sdram(void);
 
 int board_early_init_f (void)
 {
-#if defined(CONFIG_PCI)
-    volatile immap_t *immr = (immap_t *)CFG_IMMR;
-    volatile ccsr_pcix_t *pci = &immr->im_pcix;
-
-    pci->peer &= 0xffffffdf; /* disable master abort */
-#endif
-
     return 0;
 }
 

board/mpc8560ads/Makefile

@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
 
 LIB	= lib$(BOARD).a
 
-OBJS	:= $(BOARD).o flash.o
+OBJS	:= $(BOARD).o
 SOBJS	:= init.o
 #SOBJS	:=
 

board/mpc8560ads/mpc8560ads.c

@@ -214,13 +214,6 @@ typedef struct bcsr_ {
 
 int board_early_init_f (void)
 {
-#if defined(CONFIG_PCI)
-    volatile immap_t *immr = (immap_t *)CFG_IMMR;
-    volatile ccsr_pcix_t *pci = &immr->im_pcix;
-
-    pci->peer &= 0xffffffdf; /* disable master abort */
-#endif
-
     return 0;
 }
 

cpu/at91rm9200/cpu.c

@@ -121,7 +121,7 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
     reset_cpu(0);
 #else
 #ifdef CONFIG_DBGU
-   AT91PS_USART us = AT91C_BASE_DBGU;
+   AT91PS_USART us = (AT91PS_USART) AT91C_BASE_DBGU;
 #endif
 #ifdef CONFIG_USART0
    AT91PS_USART us = AT91C_BASE_US0;

cpu/mpc85xx/pci.c

@@ -77,7 +77,7 @@ pci_mpc85xx_init(struct pci_controller *hose)
 	pcix->powbear1 = 0x00000000;
 	pcix->powar1   = 0x8004401c;	/* 512M MEM space */
 
-	pcix->potar2   = (CFG_PCI1_IO_BASE >> 12) & 0x000fffff;
+	pcix->potar2   = 0x00000000;
 	pcix->potear2  = 0x00000000;
 	pcix->powbar2  = (CFG_PCI1_IO_BASE >> 12) & 0x000fffff;
 	pcix->powbear2 = 0x00000000;
@@ -85,12 +85,38 @@ pci_mpc85xx_init(struct pci_controller *hose)
 
 	pcix->pitar1 = 0x00000000;
 	pcix->piwbar1 = 0x00000000;
-	pcix->piwar1 = 0xa0F5501f;
+	pcix->piwar1 = 0xa0f5501e;	/* Enable, Prefetch, Local Mem,
+					 * Snoop R/W, 2G */
 
 	/*
 	 * Hose scan.
 	 */
 	pci_register_hose(hose);
+
+#if defined(CONFIG_MPC8555CDS) || defined(CONFIG_MPC8541CDS)
+	/*
+	 * This is a SW workaround for an apparent HW problem
+	 * in the PCI controller on the MPC85555/41 CDS boards.
+	 * The first config cycle must be to a valid, known
+	 * device on the PCI bus in order to trick the PCI
+	 * controller state machine into a known valid state.
+	 * Without this, the first config cycle has the chance
+	 * of hanging the controller permanently, just leaving
+	 * it in a semi-working state, or leaving it working.
+	 *
+	 * Pick on the Tundra, Device 17, to get it right.
+	 */
+	{
+		u8 header_type;
+
+		pci_hose_read_config_byte(hose,
+					  PCI_BDF(0,17,0),
+					  PCI_HEADER_TYPE,
+					  &header_type);
+	}
+	
+#endif
+
 	hose->last_busno = pci_hose_scan(hose);
 }
 

include/configs/MPC8540ADS.h

@@ -137,13 +137,15 @@
 
 #define CFG_MONITOR_BASE    	TEXT_BASE	/* start of monitor */
 
-
 #if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
 #define CFG_RAMBOOT
 #else
 #undef  CFG_RAMBOOT
 #endif
 
+#define CFG_FLASH_CFI_DRIVER
+#define CFG_FLASH_CFI
+#define CFG_FLASH_EMPTY_INFO
 
 #undef CONFIG_CLOCKS_IN_MHZ
 
@@ -262,7 +264,7 @@
 #define CFG_GBL_DATA_OFFSET	(CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
 #define CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET
 
-#define CFG_MONITOR_LEN	    	(256 * 1024)    /* Reserve 256 kB for Mon */
+#define CFG_MONITOR_LEN	    	(512 * 1024)    /* Reserve 256 kB for Mon */
 #define CFG_MALLOC_LEN	    	(128 * 1024)    /* Reserved for malloc */
 
 /* Serial Port */

include/configs/MPC8560ADS.h

@@ -140,13 +140,15 @@
 
 #define CFG_MONITOR_BASE    	TEXT_BASE	/* start of monitor */
 
-
 #if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
 #define CFG_RAMBOOT
 #else
 #undef  CFG_RAMBOOT
 #endif
 
+#define CFG_FLASH_CFI_DRIVER
+#define CFG_FLASH_CFI
+#define CFG_FLASH_EMPTY_INFO
 
 #undef CONFIG_CLOCKS_IN_MHZ
 
@@ -265,7 +267,7 @@
 #define CFG_GBL_DATA_OFFSET	(CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
 #define CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET
 
-#define CFG_MONITOR_LEN	    	(256 * 1024)    /* Reserve 256 kB for Mon */
+#define CFG_MONITOR_LEN	    	(512 * 1024)    /* Reserve 256 kB for Mon */
 #define CFG_MALLOC_LEN	    	(128 * 1024)    /* Reserved for malloc */
 
 /* Serial Port */