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@@ -33,7 +33,9 @@ typedef struct t2 {
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unsigned int devconf0; /* 0x274 */
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unsigned int devconf0; /* 0x274 */
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unsigned char res2[0x060]; /* 0x278 */
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unsigned char res2[0x060]; /* 0x278 */
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unsigned int devconf1; /* 0x2D8 */
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unsigned int devconf1; /* 0x2D8 */
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- unsigned char res3[0x244]; /* 0x2DC */
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+ unsigned char res3[0x16C]; /* 0x2DC */
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+ unsigned int ctl_prog_io1; /* 0x448 */
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+ unsigned char res4[0x0D4]; /* 0x44C */
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unsigned int pbias_lite; /* 0x520 */
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unsigned int pbias_lite; /* 0x520 */
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} t2_t;
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} t2_t;
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@@ -48,6 +50,8 @@ typedef struct t2 {
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#define PBIASSPEEDCTRL0 (1 << 2)
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#define PBIASSPEEDCTRL0 (1 << 2)
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#define PBIASLITEPWRDNZ1 (1 << 9)
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#define PBIASLITEPWRDNZ1 (1 << 9)
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+#define CTLPROGIO1SPEEDCTRL (1 << 20)
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+
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/*
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/*
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* OMAP HSMMC register definitions
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* OMAP HSMMC register definitions
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*/
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*/
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@@ -191,6 +195,6 @@ struct hsmmc {
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#define mmc_reg_out(addr, mask, val)\
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#define mmc_reg_out(addr, mask, val)\
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writel((readl(addr) & (~(mask))) | ((val) & (mask)), (addr))
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writel((readl(addr) & (~(mask))) | ((val) & (mask)), (addr))
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-int omap_mmc_init(int dev_index);
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+int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max);
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#endif /* MMC_HOST_DEF_H */
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#endif /* MMC_HOST_DEF_H */
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