Merge branch 'master' of git://git.denx.de/u-boot-at91

MAKEALL

@@ -573,6 +573,7 @@ LIST_at91="		\
 	at91sam9260ek	\
 	at91sam9261ek	\
 	at91sam9263ek	\
+	at91sam9g20ek	\
 	at91sam9rlek	\
 	cmc_pu2		\
 	csb637		\

Makefile

@@ -2653,8 +2653,18 @@ at91cap9adk_config	:	unconfig
 at91sam9260ek_nandflash_config \
 at91sam9260ek_dataflash_cs0_config \
 at91sam9260ek_dataflash_cs1_config \
-at91sam9260ek_config	:	unconfig
-	@mkdir -p $(obj)include
+at91sam9260ek_config \
+at91sam9g20ek_nandflash_config \
+at91sam9g20ek_dataflash_cs0_config \
+at91sam9g20ek_dataflash_cs1_config \
+at91sam9g20ek_config	:	unconfig
+	@mkdir -p $(obj)include
+	@if [ "$(findstring 9g20,$@)" ] ; then \
+		echo "#define CONFIG_AT91SAM9G20EK 1"	>>$(obj)include/config.h ; \
+		$(XECHO) "... 9G20 Variant" ; \
+	else \
+		echo "#define CONFIG_AT91SAM9260EK 1"	>>$(obj)include/config.h ; \
+	fi;
 	@if [ "$(findstring _nandflash,$@)" ] ; then \
 		echo "#define CONFIG_SYS_USE_NANDFLASH 1"	>>$(obj)include/config.h ; \
 		$(XECHO) "... with environment variable in NAND FLASH" ; \
@@ -2682,7 +2692,7 @@ at91sam9xeek_config	:	unconfig
 		echo "#define CONFIG_SYS_USE_DATAFLASH_CS1 1"	>>$(obj)include/config.h ; \
 		$(XECHO) "... with environment variable in SPI DATAFLASH CS1" ; \
 	fi;
-	@$(MKCONFIG) -n at91sam9xeek -a at91sam9260ek arm arm926ejs at91sam9260ek atmel at91sam9
+	@$(MKCONFIG) -n at91sam9xeek -a at91sam9260ek arm arm926ejs at91sam9260ek atmel at91
 
 at91sam9261ek_nandflash_config \
 at91sam9261ek_dataflash_cs0_config \

board/afeb9260/Makefile

@@ -31,7 +31,6 @@ LIB	= $(obj)lib$(BOARD).a
 
 COBJS-y	+= afeb9260.o
 COBJS-y	+= partition.o
-COBJS-$(CONFIG_CMD_NAND) += nand.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS-y))

board/afeb9260/afeb9260.c

@@ -27,6 +27,7 @@
 #include <asm/arch/at91sam9260.h>
 #include <asm/arch/at91sam9260_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
+#include <asm/arch/at91_common.h>
 #include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
 #include <asm/arch/gpio.h>
@@ -44,33 +45,6 @@ DECLARE_GLOBAL_DATA_PTR;
  * Miscelaneous platform dependent initialisations
  */
 
-static void afeb9260_serial_hw_init(void)
-{
-#ifdef CONFIG_USART0
-	at91_set_A_periph(AT91_PIN_PB4, 1);		/* TXD0 */
-	at91_set_A_periph(AT91_PIN_PB5, 0);		/* RXD0 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US0);
-#endif
-
-#ifdef CONFIG_USART1
-	at91_set_A_periph(AT91_PIN_PB6, 1);		/* TXD1 */
-	at91_set_A_periph(AT91_PIN_PB7, 0);		/* RXD1 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US1);
-#endif
-
-#ifdef CONFIG_USART2
-	at91_set_A_periph(AT91_PIN_PB8, 1);		/* TXD2 */
-	at91_set_A_periph(AT91_PIN_PB9, 0);		/* RXD2 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US2);
-#endif
-
-#ifdef CONFIG_USART3	/* DBGU */
-	at91_set_A_periph(AT91_PIN_PB14, 0);		/* DRXD */
-	at91_set_A_periph(AT91_PIN_PB15, 1);		/* DTXD */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
-#endif
-}
-
 static void afeb9260_nand_hw_init(void)
 {
 	unsigned long csa;
@@ -98,23 +72,10 @@ static void afeb9260_nand_hw_init(void)
 	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC);
 
 	/* Configure RDY/BSY */
-	at91_set_gpio_input(AT91_PIN_PC13, 1);
+	at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
 
 	/* Enable NandFlash */
-	at91_set_gpio_output(AT91_PIN_PC14, 1);
-}
-
-static void afeb9260_spi_hw_init(void)
-{
-	at91_set_A_periph(AT91_PIN_PA3, 0);	/* SPI0_NPCS0 */
-	at91_set_B_periph(AT91_PIN_PC11, 0);	/* SPI0_NPCS1 */
-
-	at91_set_A_periph(AT91_PIN_PA0, 0);	/* SPI0_MISO */
-	at91_set_A_periph(AT91_PIN_PA1, 0);	/* SPI0_MOSI */
-	at91_set_A_periph(AT91_PIN_PA2, 0);	/* SPI0_SPCK */
-
-	/* Enable clock */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI0);
+	at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
 }
 
 #ifdef CONFIG_MACB
@@ -166,28 +127,7 @@ static void afeb9260_macb_hw_init(void)
 	       pin_to_mask(AT91_PIN_PA28),
 	       pin_to_controller(AT91_PIN_PA0) + PIO_PUER);
 
-	at91_set_A_periph(AT91_PIN_PA19, 0);	/* ETXCK_EREFCK */
-	at91_set_A_periph(AT91_PIN_PA17, 0);	/* ERXDV */
-	at91_set_A_periph(AT91_PIN_PA14, 0);	/* ERX0 */
-	at91_set_A_periph(AT91_PIN_PA15, 0);	/* ERX1 */
-	at91_set_A_periph(AT91_PIN_PA18, 0);	/* ERXER */
-	at91_set_A_periph(AT91_PIN_PA16, 0);	/* ETXEN */
-	at91_set_A_periph(AT91_PIN_PA12, 0);	/* ETX0 */
-	at91_set_A_periph(AT91_PIN_PA13, 0);	/* ETX1 */
-	at91_set_A_periph(AT91_PIN_PA21, 0);	/* EMDIO */
-	at91_set_A_periph(AT91_PIN_PA20, 0);	/* EMDC */
-
-#ifndef CONFIG_RMII
-	at91_set_B_periph(AT91_PIN_PA28, 0);	/* ECRS */
-	at91_set_B_periph(AT91_PIN_PA29, 0);	/* ECOL */
-	at91_set_B_periph(AT91_PIN_PA25, 0);	/* ERX2 */
-	at91_set_B_periph(AT91_PIN_PA26, 0);	/* ERX3 */
-	at91_set_B_periph(AT91_PIN_PA27, 0);	/* ERXCK */
-	at91_set_B_periph(AT91_PIN_PA10, 0);	/* ETX2 */
-	at91_set_B_periph(AT91_PIN_PA11, 0);	/* ETX3 */
-	at91_set_B_periph(AT91_PIN_PA22, 0);	/* ETXER */
-#endif
-
+	at91_macb_hw_init();
 }
 #endif
 
@@ -201,11 +141,11 @@ int board_init(void)
 	/* adress of boot parameters */
 	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 
-	afeb9260_serial_hw_init();
+	at91_serial_hw_init();
 #ifdef CONFIG_CMD_NAND
 	afeb9260_nand_hw_init();
 #endif
-	afeb9260_spi_hw_init();
+	at91_spi0_hw_init((1 << 0) || (1 << 1));
 #ifdef CONFIG_MACB
 	afeb9260_macb_hw_init();
 #endif

board/atmel/at91cap9adk/Makefile

@@ -31,8 +31,7 @@ LIB	= $(obj)lib$(BOARD).a
 
 COBJS-y	+= at91cap9adk.o
 COBJS-y	+= led.o
-COBJS-y	+= partition.o
-COBJS-$(CONFIG_CMD_NAND) += nand.o
+COBJS-$(CONFIG_HAS_DATAFLASH) += partition.o
 
 SRCS    := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
 OBJS    := $(addprefix $(obj),$(COBJS-y))

board/atmel/at91cap9adk/at91cap9adk.c

@@ -26,6 +26,7 @@
 #include <asm/arch/at91cap9.h>
 #include <asm/arch/at91cap9_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
+#include <asm/arch/at91_common.h>
 #include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
 #include <asm/arch/gpio.h>
@@ -47,33 +48,6 @@ DECLARE_GLOBAL_DATA_PTR;
  * Miscelaneous platform dependent initialisations
  */
 
-static void at91cap9_serial_hw_init(void)
-{
-#ifdef CONFIG_USART0
-	at91_set_A_periph(AT91_PIN_PA22, 1);		/* TXD0 */
-	at91_set_A_periph(AT91_PIN_PA23, 0);		/* RXD0 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US0);
-#endif
-
-#ifdef CONFIG_USART1
-	at91_set_A_periph(AT91_PIN_PD0, 1);		/* TXD1 */
-	at91_set_A_periph(AT91_PIN_PD1, 0);		/* RXD1 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US1);
-#endif
-
-#ifdef CONFIG_USART2
-	at91_set_A_periph(AT91_PIN_PD2, 1);		/* TXD2 */
-	at91_set_A_periph(AT91_PIN_PD3, 0);		/* RXD2 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US2);
-#endif
-
-#ifdef CONFIG_USART3	/* DBGU */
-	at91_set_A_periph(AT91_PIN_PC30, 0);		/* DRXD */
-	at91_set_A_periph(AT91_PIN_PC31, 1);		/* DTXD */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
-#endif
-}
-
 static void at91cap9_slowclock_hw_init(void)
 {
 	/*
@@ -159,21 +133,7 @@ static void at91cap9_nand_hw_init(void)
 	/* RDY/BSY is not connected */
 
 	/* Enable NandFlash */
-	at91_set_gpio_output(AT91_PIN_PD15, 1);
-}
-#endif
-
-#ifdef CONFIG_HAS_DATAFLASH
-static void at91cap9_spi_hw_init(void)
-{
-	at91_set_B_periph(AT91_PIN_PA5, 0);	/* SPI0_NPCS0 */
-
-	at91_set_B_periph(AT91_PIN_PA0, 0);	/* SPI0_MISO */
-	at91_set_B_periph(AT91_PIN_PA1, 0);	/* SPI0_MOSI */
-	at91_set_B_periph(AT91_PIN_PA2, 0);	/* SPI0_SPCK */
-
-	/* Enable clock */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_SPI0);
+	at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
 }
 #endif
 
@@ -217,27 +177,8 @@ static void at91cap9_macb_hw_init(void)
 	       pin_to_mask(AT91_PIN_PB26),
 	       pin_to_controller(AT91_PIN_PA0) + PIO_PUER);
 
-	at91_set_A_periph(AT91_PIN_PB21, 0);	/* ETXCK_EREFCK */
-	at91_set_A_periph(AT91_PIN_PB22, 0);	/* ERXDV */
-	at91_set_A_periph(AT91_PIN_PB25, 0);	/* ERX0 */
-	at91_set_A_periph(AT91_PIN_PB26, 0);	/* ERX1 */
-	at91_set_A_periph(AT91_PIN_PB27, 0);	/* ERXER */
-	at91_set_A_periph(AT91_PIN_PB28, 0);	/* ETXEN */
-	at91_set_A_periph(AT91_PIN_PB23, 0);	/* ETX0 */
-	at91_set_A_periph(AT91_PIN_PB24, 0);	/* ETX1 */
-	at91_set_A_periph(AT91_PIN_PB30, 0);	/* EMDIO */
-	at91_set_A_periph(AT91_PIN_PB29, 0);	/* EMDC */
-
-#ifndef CONFIG_RMII
-	at91_set_B_periph(AT91_PIN_PC25, 0);	/* ECRS */
-	at91_set_B_periph(AT91_PIN_PC26, 0);	/* ECOL */
-	at91_set_B_periph(AT91_PIN_PC22, 0);	/* ERX2 */
-	at91_set_B_periph(AT91_PIN_PC23, 0);	/* ERX3 */
-	at91_set_B_periph(AT91_PIN_PC27, 0);	/* ERXCK */
-	at91_set_B_periph(AT91_PIN_PC20, 0);	/* ETX2 */
-	at91_set_B_periph(AT91_PIN_PC21, 0);	/* ETX3 */
-	at91_set_B_periph(AT91_PIN_PC24, 0);	/* ETXER */
-#endif
+	at91_macb_hw_init();
+
 	/* Unlock EMAC, 3 0 2 1 sequence */
 #define MP_MAC_KEY0	0x5969cb2a
 #define MP_MAC_KEY1	0xb4a1872e
@@ -367,14 +308,14 @@ int board_init(void)
 	/* adress of boot parameters */
 	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 
-	at91cap9_serial_hw_init();
+	at91_serial_hw_init();
 	at91cap9_slowclock_hw_init();
 	at91cap9_nor_hw_init();
 #ifdef CONFIG_CMD_NAND
 	at91cap9_nand_hw_init();
 #endif
 #ifdef CONFIG_HAS_DATAFLASH
-	at91cap9_spi_hw_init();
+	at91_spi0_hw_init(1 << 0);
 #endif
 #ifdef CONFIG_MACB
 	at91cap9_macb_hw_init();

board/atmel/at91cap9adk/led.c

@@ -28,50 +28,16 @@
 #include <asm/arch/gpio.h>
 #include <asm/arch/io.h>
 
-#define	RED_LED		AT91_PIN_PC29	/* this is the power led */
-#define	GREEN_LED	AT91_PIN_PA10	/* this is the user1 led */
-#define	YELLOW_LED	AT91_PIN_PA11	/* this is the user1 led */
-
-void red_LED_on(void)
-{
-	at91_set_gpio_value(RED_LED, 1);
-}
-
-void red_LED_off(void)
-{
-	at91_set_gpio_value(RED_LED, 0);
-}
-
-void green_LED_on(void)
-{
-	at91_set_gpio_value(GREEN_LED, 0);
-}
-
-void green_LED_off(void)
-{
-	at91_set_gpio_value(GREEN_LED, 1);
-}
-
-void yellow_LED_on(void)
-{
-	at91_set_gpio_value(YELLOW_LED, 0);
-}
-
-void yellow_LED_off(void)
-{
-	at91_set_gpio_value(YELLOW_LED, 1);
-}
-
 void coloured_LED_init(void)
 {
 	/* Enable clock */
 	at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_PIOABCD);
 
-	at91_set_gpio_output(RED_LED, 1);
-	at91_set_gpio_output(GREEN_LED, 1);
-	at91_set_gpio_output(YELLOW_LED, 1);
+	at91_set_gpio_output(CONFIG_RED_LED, 1);
+	at91_set_gpio_output(CONFIG_GREEN_LED, 1);
+	at91_set_gpio_output(CONFIG_YELLOW_LED, 1);
 
-	at91_set_gpio_output(RED_LED, 0);
-	at91_set_gpio_output(GREEN_LED, 1);
-	at91_set_gpio_output(YELLOW_LED, 1);
+	at91_set_gpio_output(CONFIG_RED_LED, 0);
+	at91_set_gpio_output(CONFIG_GREEN_LED, 1);
+	at91_set_gpio_output(CONFIG_YELLOW_LED, 1);
 }

board/atmel/at91cap9adk/nand.c

@@ -1,72 +0,0 @@
-/*
- * (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop@leadtechdesign.com>
- * Lead Tech Design <www.leadtechdesign.com>
- *
- * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/arch/at91cap9.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/at91_pio.h>
-
-#include <nand.h>
-
-/*
- *	hardware specific access to control-lines
- */
-#define	MASK_ALE	(1 << 21)	/* our ALE is AD21 */
-#define	MASK_CLE	(1 << 22)	/* our CLE is AD22 */
-
-static void at91cap9adk_nand_hwcontrol(struct mtd_info *mtd,
-				       int cmd, unsigned int ctrl)
-{
-	struct nand_chip *this = mtd->priv;
-
-	if (ctrl & NAND_CTRL_CHANGE) {
-		ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
-		IO_ADDR_W &= ~(MASK_ALE | MASK_CLE);
-
-		if (ctrl & NAND_CLE)
-			IO_ADDR_W |= MASK_CLE;
-		if (ctrl & NAND_ALE)
-			IO_ADDR_W |= MASK_ALE;
-
-		at91_set_gpio_value(AT91_PIN_PD15, !(ctrl & NAND_NCE));
-		this->IO_ADDR_W = (void *) IO_ADDR_W;
-	}
-
-	if (cmd != NAND_CMD_NONE)
-		writeb(cmd, this->IO_ADDR_W);
-}
-
-int board_nand_init(struct nand_chip *nand)
-{
-	nand->ecc.mode = NAND_ECC_SOFT;
-#ifdef CONFIG_SYS_NAND_DBW_16
-	nand->options = NAND_BUSWIDTH_16;
-#endif
-	nand->cmd_ctrl = at91cap9adk_nand_hwcontrol;
-	nand->chip_delay = 20;
-
-	return 0;
-}

board/atmel/at91sam9260ek/Makefile

@@ -31,8 +31,7 @@ LIB	= $(obj)lib$(BOARD).a
 
 COBJS-y	+= at91sam9260ek.o
 COBJS-y	+= led.o
-COBJS-y	+= partition.o
-COBJS-$(CONFIG_CMD_NAND) += nand.o
+COBJS-$(CONFIG_HAS_DATAFLASH) += partition.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS-y))

board/atmel/at91sam9260ek/at91sam9260ek.c

@@ -26,6 +26,7 @@
 #include <asm/arch/at91sam9260.h>
 #include <asm/arch/at91sam9260_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
+#include <asm/arch/at91_common.h>
 #include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
 #include <asm/arch/gpio.h>
@@ -43,33 +44,6 @@ DECLARE_GLOBAL_DATA_PTR;
  * Miscelaneous platform dependent initialisations
  */
 
-static void at91sam9260ek_serial_hw_init(void)
-{
-#ifdef CONFIG_USART0
-	at91_set_A_periph(AT91_PIN_PB4, 1);		/* TXD0 */
-	at91_set_A_periph(AT91_PIN_PB5, 0);		/* RXD0 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US0);
-#endif
-
-#ifdef CONFIG_USART1
-	at91_set_A_periph(AT91_PIN_PB6, 1);		/* TXD1 */
-	at91_set_A_periph(AT91_PIN_PB7, 0);		/* RXD1 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US1);
-#endif
-
-#ifdef CONFIG_USART2
-	at91_set_A_periph(AT91_PIN_PB8, 1);		/* TXD2 */
-	at91_set_A_periph(AT91_PIN_PB9, 0);		/* RXD2 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US2);
-#endif
-
-#ifdef CONFIG_USART3	/* DBGU */
-	at91_set_A_periph(AT91_PIN_PB14, 0);		/* DRXD */
-	at91_set_A_periph(AT91_PIN_PB15, 1);		/* DTXD */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
-#endif
-}
-
 #ifdef CONFIG_CMD_NAND
 static void at91sam9260ek_nand_hw_init(void)
 {
@@ -102,25 +76,10 @@ static void at91sam9260ek_nand_hw_init(void)
 	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC);
 
 	/* Configure RDY/BSY */
-	at91_set_gpio_input(AT91_PIN_PC13, 1);
+	at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
 
 	/* Enable NandFlash */
-	at91_set_gpio_output(AT91_PIN_PC14, 1);
-}
-#endif
-
-#ifdef CONFIG_HAS_DATAFLASH
-static void at91sam9260ek_spi_hw_init(void)
-{
-	at91_set_A_periph(AT91_PIN_PA3, 0);	/* SPI0_NPCS0 */
-	at91_set_B_periph(AT91_PIN_PC11, 0);	/* SPI0_NPCS1 */
-
-	at91_set_A_periph(AT91_PIN_PA0, 0);	/* SPI0_MISO */
-	at91_set_A_periph(AT91_PIN_PA1, 0);	/* SPI0_MOSI */
-	at91_set_A_periph(AT91_PIN_PA2, 0);	/* SPI0_SPCK */
-
-	/* Enable clock */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI0);
+	at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
 }
 #endif
 
@@ -173,37 +132,7 @@ static void at91sam9260ek_macb_hw_init(void)
 	       pin_to_mask(AT91_PIN_PA28),
 	       pin_to_controller(AT91_PIN_PA0) + PIO_PUER);
 
-	at91_set_A_periph(AT91_PIN_PA19, 0);	/* ETXCK_EREFCK */
-	at91_set_A_periph(AT91_PIN_PA17, 0);	/* ERXDV */
-	at91_set_A_periph(AT91_PIN_PA14, 0);	/* ERX0 */
-	at91_set_A_periph(AT91_PIN_PA15, 0);	/* ERX1 */
-	at91_set_A_periph(AT91_PIN_PA18, 0);	/* ERXER */
-	at91_set_A_periph(AT91_PIN_PA16, 0);	/* ETXEN */
-	at91_set_A_periph(AT91_PIN_PA12, 0);	/* ETX0 */
-	at91_set_A_periph(AT91_PIN_PA13, 0);	/* ETX1 */
-	at91_set_A_periph(AT91_PIN_PA21, 0);	/* EMDIO */
-	at91_set_A_periph(AT91_PIN_PA20, 0);	/* EMDC */
-
-#ifndef CONFIG_RMII
-	at91_set_B_periph(AT91_PIN_PA28, 0);	/* ECRS */
-	at91_set_B_periph(AT91_PIN_PA29, 0);	/* ECOL */
-	at91_set_B_periph(AT91_PIN_PA25, 0);	/* ERX2 */
-	at91_set_B_periph(AT91_PIN_PA26, 0);	/* ERX3 */
-	at91_set_B_periph(AT91_PIN_PA27, 0);	/* ERXCK */
-#if defined(CONFIG_AT91SAM9260EK)
-	/*
-	 * use PA10, PA11 for ETX2, ETX3.
-	 * PA23 and PA24 are for TWI EEPROM
-	 */
-	at91_set_B_periph(AT91_PIN_PA10, 0);	/* ETX2 */
-	at91_set_B_periph(AT91_PIN_PA11, 0);	/* ETX3 */
-#else
-	at91_set_B_periph(AT91_PIN_PA23, 0);	/* ETX2 */
-	at91_set_B_periph(AT91_PIN_PA24, 0);	/* ETX3 */
-#endif
-	at91_set_B_periph(AT91_PIN_PA22, 0);	/* ETXER */
-#endif
-
+	at91_macb_hw_init();
 }
 #endif
 
@@ -212,17 +141,22 @@ int board_init(void)
 	/* Enable Ctrlc */
 	console_init_f();
 
+#ifdef CONFIG_AT91SAM9G20EK
+	/* arch number of AT91SAM9260EK-Board */
+	gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G20EK;
+#else
 	/* arch number of AT91SAM9260EK-Board */
 	gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9260EK;
+#endif
 	/* adress of boot parameters */
 	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 
-	at91sam9260ek_serial_hw_init();
+	at91_serial_hw_init();
 #ifdef CONFIG_CMD_NAND
 	at91sam9260ek_nand_hw_init();
 #endif
 #ifdef CONFIG_HAS_DATAFLASH
-	at91sam9260ek_spi_hw_init();
+	at91_spi0_hw_init((1 << 0) || (1 << 1));
 #endif
 #ifdef CONFIG_MACB
 	at91sam9260ek_macb_hw_init();

board/atmel/at91sam9260ek/led.c

@@ -28,37 +28,14 @@
 #include <asm/arch/gpio.h>
 #include <asm/arch/io.h>
 
-#define	RED_LED		AT91_PIN_PA9	/* this is the power led */
-#define	GREEN_LED	AT91_PIN_PA6	/* this is the user led */
-
-void red_LED_on(void)
-{
-	at91_set_gpio_value(RED_LED, 1);
-}
-
-void red_LED_off(void)
-{
-	at91_set_gpio_value(RED_LED, 0);
-}
-
-void green_LED_on(void)
-{
-	at91_set_gpio_value(GREEN_LED, 0);
-}
-
-void green_LED_off(void)
-{
-	at91_set_gpio_value(GREEN_LED, 1);
-}
-
 void coloured_LED_init(void)
 {
 	/* Enable clock */
 	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOA);
 
-	at91_set_gpio_output(RED_LED, 1);
-	at91_set_gpio_output(GREEN_LED, 1);
+	at91_set_gpio_output(CONFIG_RED_LED, 1);
+	at91_set_gpio_output(CONFIG_GREEN_LED, 1);
 
-	at91_set_gpio_value(RED_LED, 0);
-	at91_set_gpio_value(GREEN_LED, 1);
+	at91_set_gpio_value(CONFIG_RED_LED, 0);
+	at91_set_gpio_value(CONFIG_GREEN_LED, 1);
 }

board/atmel/at91sam9260ek/nand.c

@@ -1,78 +0,0 @@
-/*
- * (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop@leadtechdesign.com>
- * Lead Tech Design <www.leadtechdesign.com>
- *
- * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/arch/at91sam9260.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/at91_pio.h>
-
-#include <nand.h>
-
-/*
- *	hardware specific access to control-lines
- */
-#define	MASK_ALE	(1 << 21)	/* our ALE is AD21 */
-#define	MASK_CLE	(1 << 22)	/* our CLE is AD22 */
-
-static void at91sam9260ek_nand_hwcontrol(struct mtd_info *mtd,
-					 int cmd, unsigned int ctrl)
-{
-	struct nand_chip *this = mtd->priv;
-
-	if (ctrl & NAND_CTRL_CHANGE) {
-		ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
-		IO_ADDR_W &= ~(MASK_ALE | MASK_CLE);
-
-		if (ctrl & NAND_CLE)
-			IO_ADDR_W |= MASK_CLE;
-		if (ctrl & NAND_ALE)
-			IO_ADDR_W |= MASK_ALE;
-
-		at91_set_gpio_value(AT91_PIN_PC14, !(ctrl & NAND_NCE));
-		this->IO_ADDR_W = (void *) IO_ADDR_W;
-	}
-
-	if (cmd != NAND_CMD_NONE)
-		writeb(cmd, this->IO_ADDR_W);
-}
-
-static int at91sam9260ek_nand_ready(struct mtd_info *mtd)
-{
-	return at91_get_gpio_value(AT91_PIN_PC13);
-}
-
-int board_nand_init(struct nand_chip *nand)
-{
-	nand->ecc.mode = NAND_ECC_SOFT;
-#ifdef CONFIG_SYS_NAND_DBW_16
-	nand->options = NAND_BUSWIDTH_16;
-#endif
-	nand->cmd_ctrl = at91sam9260ek_nand_hwcontrol;
-	nand->dev_ready = at91sam9260ek_nand_ready;
-	nand->chip_delay = 20;
-
-	return 0;
-}

board/atmel/at91sam9261ek/Makefile

@@ -31,8 +31,7 @@ LIB	= $(obj)lib$(BOARD).a
 
 COBJS-y += at91sam9261ek.o
 COBJS-y += led.o
-COBJS-y	+= partition.o
-COBJS-$(CONFIG_CMD_NAND) += nand.o
+COBJS-$(CONFIG_HAS_DATAFLASH) += partition.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS-y))

board/atmel/at91sam9261ek/at91sam9261ek.c

@@ -26,6 +26,7 @@
 #include <asm/arch/at91sam9261.h>
 #include <asm/arch/at91sam9261_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
+#include <asm/arch/at91_common.h>
 #include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
 #include <asm/arch/gpio.h>
@@ -43,33 +44,6 @@ DECLARE_GLOBAL_DATA_PTR;
  * Miscelaneous platform dependent initialisations
  */
 
-static void at91sam9261ek_serial_hw_init(void)
-{
-#ifdef CONFIG_USART0
-	at91_set_A_periph(AT91_PIN_PC8, 1);		/* TXD0 */
-	at91_set_A_periph(AT91_PIN_PC9, 0);		/* RXD0 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US0);
-#endif
-
-#ifdef CONFIG_USART1
-	at91_set_A_periph(AT91_PIN_PC12, 1);		/* TXD1 */
-	at91_set_A_periph(AT91_PIN_PC13, 0);		/* RXD1 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US1);
-#endif
-
-#ifdef CONFIG_USART2
-	at91_set_A_periph(AT91_PIN_PC14, 1);		/* TXD2 */
-	at91_set_A_periph(AT91_PIN_PC15, 0);		/* RXD2 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US2);
-#endif
-
-#ifdef CONFIG_USART3	/* DBGU */
-	at91_set_A_periph(AT91_PIN_PA9, 0);		/* DRXD */
-	at91_set_A_periph(AT91_PIN_PA10, 1);		/* DTXD */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
-#endif
-}
-
 #ifdef CONFIG_CMD_NAND
 static void at91sam9261ek_nand_hw_init(void)
 {
@@ -102,30 +76,16 @@ static void at91sam9261ek_nand_hw_init(void)
 	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOC);
 
 	/* Configure RDY/BSY */
-	at91_set_gpio_input(AT91_PIN_PC15, 1);
+	at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
 
 	/* Enable NandFlash */
-	at91_set_gpio_output(AT91_PIN_PC14, 1);
+	at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
 
 	at91_set_A_periph(AT91_PIN_PC0, 0);	/* NANDOE */
 	at91_set_A_periph(AT91_PIN_PC1, 0);	/* NANDWE */
 }
 #endif
 
-#ifdef CONFIG_HAS_DATAFLASH
-static void at91sam9261ek_spi_hw_init(void)
-{
-	at91_set_A_periph(AT91_PIN_PA3, 0);	/* SPI0_NPCS0 */
-
-	at91_set_A_periph(AT91_PIN_PA0, 0);	/* SPI0_MISO */
-	at91_set_A_periph(AT91_PIN_PA1, 0);	/* SPI0_MOSI */
-	at91_set_A_periph(AT91_PIN_PA2, 0);	/* SPI0_SPCK */
-
-	/* Enable clock */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI0);
-}
-#endif
-
 #ifdef CONFIG_DRIVER_DM9000
 static void at91sam9261ek_dm9000_hw_init(void)
 {
@@ -250,12 +210,12 @@ int board_init(void)
 	/* adress of boot parameters */
 	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 
-	at91sam9261ek_serial_hw_init();
+	at91_serial_hw_init();
 #ifdef CONFIG_CMD_NAND
 	at91sam9261ek_nand_hw_init();
 #endif
 #ifdef CONFIG_HAS_DATAFLASH
-	at91sam9261ek_spi_hw_init();
+	at91_spi0_hw_init(1 << 0);
 #endif
 #ifdef CONFIG_DRIVER_DM9000
 	at91sam9261ek_dm9000_hw_init();

board/atmel/at91sam9261ek/led.c

@@ -28,51 +28,16 @@
 #include <asm/arch/gpio.h>
 #include <asm/arch/io.h>
 
-#define	RED_LED		AT91_PIN_PA23	/* this is the power led */
-#define	GREEN_LED	AT91_PIN_PA13	/* this is the user1 led */
-#define	YELLOW_LED	AT91_PIN_PA14	/* this is the user2 led */
-
-void red_LED_on(void)
-{
-	at91_set_gpio_value(RED_LED, 1);
-}
-
-void red_LED_off(void)
-{
-	at91_set_gpio_value(RED_LED, 0);
-}
-
-void green_LED_on(void)
-{
-	at91_set_gpio_value(GREEN_LED, 0);
-}
-
-void green_LED_off(void)
-{
-	at91_set_gpio_value(GREEN_LED, 1);
-}
-
-void yellow_LED_on(void)
-{
-	at91_set_gpio_value(YELLOW_LED, 0);
-}
-
-void yellow_LED_off(void)
-{
-	at91_set_gpio_value(YELLOW_LED, 1);
-}
-
-
 void coloured_LED_init(void)
 {
 	/* Enable clock */
 	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOA);
 
-	at91_set_gpio_output(RED_LED, 1);
-	at91_set_gpio_output(GREEN_LED, 1);
-	at91_set_gpio_output(YELLOW_LED, 1);
+	at91_set_gpio_output(CONFIG_RED_LED, 1);
+	at91_set_gpio_output(CONFIG_GREEN_LED, 1);
+	at91_set_gpio_output(CONFIG_YELLOW_LED, 1);
 
-	at91_set_gpio_value(RED_LED, 0);
-	at91_set_gpio_value(GREEN_LED, 1);
-	at91_set_gpio_value(YELLOW_LED, 1);
+	at91_set_gpio_value(CONFIG_RED_LED, 0);
+	at91_set_gpio_value(CONFIG_GREEN_LED, 1);
+	at91_set_gpio_value(CONFIG_YELLOW_LED, 1);
 }

board/atmel/at91sam9261ek/nand.c

@@ -1,78 +0,0 @@
-/*
- * (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop@leadtechdesign.com>
- * Lead Tech Design <www.leadtechdesign.com>
- *
- * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/arch/at91sam9261.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/at91_pio.h>
-
-#include <nand.h>
-
-/*
- *	hardware specific access to control-lines
- */
-#define	MASK_ALE	(1 << 22)	/* our ALE is AD22 */
-#define	MASK_CLE	(1 << 21)	/* our CLE is AD21 */
-
-static void at91sam9261ek_nand_hwcontrol(struct mtd_info *mtd,
-					 int cmd, unsigned int ctrl)
-{
-	struct nand_chip *this = mtd->priv;
-
-	if (ctrl & NAND_CTRL_CHANGE) {
-		ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
-		IO_ADDR_W &= ~(MASK_ALE | MASK_CLE);
-
-		if (ctrl & NAND_CLE)
-			IO_ADDR_W |= MASK_CLE;
-		if (ctrl & NAND_ALE)
-			IO_ADDR_W |= MASK_ALE;
-
-		at91_set_gpio_value(AT91_PIN_PC14, !(ctrl & NAND_NCE));
-		this->IO_ADDR_W = (void *) IO_ADDR_W;
-	}
-
-	if (cmd != NAND_CMD_NONE)
-		writeb(cmd, this->IO_ADDR_W);
-}
-
-static int at91sam9261ek_nand_ready(struct mtd_info *mtd)
-{
-	return at91_get_gpio_value(AT91_PIN_PC15);
-}
-
-int board_nand_init(struct nand_chip *nand)
-{
-	nand->ecc.mode = NAND_ECC_SOFT;
-#ifdef CONFIG_SYS_NAND_DBW_16
-	nand->options = NAND_BUSWIDTH_16;
-#endif
-	nand->cmd_ctrl = at91sam9261ek_nand_hwcontrol;
-	nand->dev_ready = at91sam9261ek_nand_ready;
-	nand->chip_delay = 20;
-
-	return 0;
-}

board/atmel/at91sam9263ek/Makefile

@@ -31,8 +31,7 @@ LIB	= $(obj)lib$(BOARD).a
 
 COBJS-y += at91sam9263ek.o
 COBJS-y += led.o
-COBJS-y	+= partition.o
-COBJS-$(CONFIG_CMD_NAND) += nand.o
+COBJS-$(CONFIG_HAS_DATAFLASH) += partition.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS-y))

board/atmel/at91sam9263ek/at91sam9263ek.c

@@ -27,6 +27,7 @@
 #include <asm/arch/at91sam9263.h>
 #include <asm/arch/at91sam9263_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
+#include <asm/arch/at91_common.h>
 #include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
 #include <asm/arch/gpio.h>
@@ -46,33 +47,6 @@ DECLARE_GLOBAL_DATA_PTR;
  * Miscelaneous platform dependent initialisations
  */
 
-static void at91sam9263ek_serial_hw_init(void)
-{
-#ifdef CONFIG_USART0
-	at91_set_A_periph(AT91_PIN_PA26, 1);		/* TXD0 */
-	at91_set_A_periph(AT91_PIN_PA27, 0);		/* RXD0 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US0);
-#endif
-
-#ifdef CONFIG_USART1
-	at91_set_A_periph(AT91_PIN_PD0, 1);		/* TXD1 */
-	at91_set_A_periph(AT91_PIN_PD1, 0);		/* RXD1 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US1);
-#endif
-
-#ifdef CONFIG_USART2
-	at91_set_A_periph(AT91_PIN_PD2, 1);		/* TXD2 */
-	at91_set_A_periph(AT91_PIN_PD3, 0);		/* RXD2 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US2);
-#endif
-
-#ifdef CONFIG_USART3	/* DBGU */
-	at91_set_A_periph(AT91_PIN_PC30, 0);		/* DRXD */
-	at91_set_A_periph(AT91_PIN_PC31, 1);		/* DTXD */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
-#endif
-}
-
 #ifdef CONFIG_CMD_NAND
 static void at91sam9263ek_nand_hw_init(void)
 {
@@ -106,24 +80,10 @@ static void at91sam9263ek_nand_hw_init(void)
 				      1 << AT91SAM9263_ID_PIOCDE);
 
 	/* Configure RDY/BSY */
-	at91_set_gpio_input(AT91_PIN_PA22, 1);
+	at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
 
 	/* Enable NandFlash */
-	at91_set_gpio_output(AT91_PIN_PD15, 1);
-}
-#endif
-
-#ifdef CONFIG_HAS_DATAFLASH
-static void at91sam9263ek_spi_hw_init(void)
-{
-	at91_set_B_periph(AT91_PIN_PA5, 0);	/* SPI0_NPCS0 */
-
-	at91_set_B_periph(AT91_PIN_PA0, 0);	/* SPI0_MISO */
-	at91_set_B_periph(AT91_PIN_PA1, 0);	/* SPI0_MOSI */
-	at91_set_B_periph(AT91_PIN_PA2, 0);	/* SPI0_SPCK */
-
-	/* Enable clock */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_SPI0);
+	at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
 }
 #endif
 
@@ -169,37 +129,7 @@ static void at91sam9263ek_macb_hw_init(void)
 	       pin_to_mask(AT91_PIN_PE26),
 	       pin_to_controller(AT91_PIN_PE0) + PIO_PUER);
 
-	at91_set_A_periph(AT91_PIN_PE21, 0);	/* ETXCK_EREFCK */
-	at91_set_B_periph(AT91_PIN_PC25, 0);	/* ERXDV */
-	at91_set_A_periph(AT91_PIN_PE25, 0);	/* ERX0 */
-	at91_set_A_periph(AT91_PIN_PE26, 0);	/* ERX1 */
-	at91_set_A_periph(AT91_PIN_PE27, 0);	/* ERXER */
-	at91_set_A_periph(AT91_PIN_PE28, 0);	/* ETXEN */
-	at91_set_A_periph(AT91_PIN_PE23, 0);	/* ETX0 */
-	at91_set_A_periph(AT91_PIN_PE24, 0);	/* ETX1 */
-	at91_set_A_periph(AT91_PIN_PE30, 0);	/* EMDIO */
-	at91_set_A_periph(AT91_PIN_PE29, 0);	/* EMDC */
-
-#ifndef CONFIG_RMII
-	at91_set_A_periph(AT91_PIN_PE22, 0);	/* ECRS */
-	at91_set_B_periph(AT91_PIN_PC26, 0);	/* ECOL */
-	at91_set_B_periph(AT91_PIN_PC22, 0);	/* ERX2 */
-	at91_set_B_periph(AT91_PIN_PC23, 0);	/* ERX3 */
-	at91_set_B_periph(AT91_PIN_PC27, 0);	/* ERXCK */
-	at91_set_B_periph(AT91_PIN_PC20, 0);	/* ETX2 */
-	at91_set_B_periph(AT91_PIN_PC21, 0);	/* ETX3 */
-	at91_set_B_periph(AT91_PIN_PC24, 0);	/* ETXER */
-#endif
-
-}
-#endif
-
-#ifdef CONFIG_USB_OHCI_NEW
-static void at91sam9263ek_uhp_hw_init(void)
-{
-	/* Enable VBus on UHP ports */
-	at91_set_gpio_output(AT91_PIN_PA21, 0);
-	at91_set_gpio_output(AT91_PIN_PA24, 0);
+	at91_macb_hw_init();
 }
 #endif
 
@@ -301,18 +231,19 @@ int board_init(void)
 	/* adress of boot parameters */
 	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 
-	at91sam9263ek_serial_hw_init();
+	at91_serial_hw_init();
 #ifdef CONFIG_CMD_NAND
 	at91sam9263ek_nand_hw_init();
 #endif
 #ifdef CONFIG_HAS_DATAFLASH
-	at91sam9263ek_spi_hw_init();
+	at91_set_gpio_output(AT91_PIN_PE20, 1);	/* select spi0 clock */
+	at91_spi0_hw_init(1 << 0);
 #endif
 #ifdef CONFIG_MACB
 	at91sam9263ek_macb_hw_init();
 #endif
 #ifdef CONFIG_USB_OHCI_NEW
-	at91sam9263ek_uhp_hw_init();
+	at91_uhp_hw_init();
 #endif
 #ifdef CONFIG_LCD
 	at91sam9263ek_lcd_hw_init();

board/atmel/at91sam9263ek/led.c

@@ -28,51 +28,17 @@
 #include <asm/arch/gpio.h>
 #include <asm/arch/io.h>
 
-#define	RED_LED		AT91_PIN_PB7	/* this is the power led */
-#define	GREEN_LED	AT91_PIN_PB8	/* this is the user1 led */
-#define	YELLOW_LED	AT91_PIN_PC29	/* this is the user2 led */
-
-void red_LED_on(void)
-{
-	at91_set_gpio_value(RED_LED, 1);
-}
-
-void red_LED_off(void)
-{
-	at91_set_gpio_value(RED_LED, 0);
-}
-
-void green_LED_on(void)
-{
-	at91_set_gpio_value(GREEN_LED, 0);
-}
-
-void green_LED_off(void)
-{
-	at91_set_gpio_value(GREEN_LED, 1);
-}
-
-void yellow_LED_on(void)
-{
-	at91_set_gpio_value(YELLOW_LED, 0);
-}
-
-void yellow_LED_off(void)
-{
-	at91_set_gpio_value(YELLOW_LED, 1);
-}
-
 void coloured_LED_init(void)
 {
 	/* Enable clock */
 	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_PIOB |
 				      1 << AT91SAM9263_ID_PIOCDE);
 
-	at91_set_gpio_output(RED_LED, 1);
-	at91_set_gpio_output(GREEN_LED, 1);
-	at91_set_gpio_output(YELLOW_LED, 1);
+	at91_set_gpio_output(CONFIG_RED_LED, 1);
+	at91_set_gpio_output(CONFIG_GREEN_LED, 1);
+	at91_set_gpio_output(CONFIG_YELLOW_LED, 1);
 
-	at91_set_gpio_value(RED_LED, 0);
-	at91_set_gpio_value(GREEN_LED, 1);
-	at91_set_gpio_value(YELLOW_LED, 1);
+	at91_set_gpio_value(CONFIG_RED_LED, 0);
+	at91_set_gpio_value(CONFIG_GREEN_LED, 1);
+	at91_set_gpio_value(CONFIG_YELLOW_LED, 1);
 }

board/atmel/at91sam9263ek/nand.c

@@ -1,78 +0,0 @@
-/*
- * (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop@leadtechdesign.com>
- * Lead Tech Design <www.leadtechdesign.com>
- *
- * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/arch/at91sam9263.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/at91_pio.h>
-
-#include <nand.h>
-
-/*
- *	hardware specific access to control-lines
- */
-#define	MASK_ALE	(1 << 21)	/* our ALE is AD21 */
-#define	MASK_CLE	(1 << 22)	/* our CLE is AD22 */
-
-static void at91sam9263ek_nand_hwcontrol(struct mtd_info *mtd,
-					 int cmd, unsigned int ctrl)
-{
-	struct nand_chip *this = mtd->priv;
-
-	if (ctrl & NAND_CTRL_CHANGE) {
-		ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
-		IO_ADDR_W &= ~(MASK_ALE | MASK_CLE);
-
-		if (ctrl & NAND_CLE)
-			IO_ADDR_W |= MASK_CLE;
-		if (ctrl & NAND_ALE)
-			IO_ADDR_W |= MASK_ALE;
-
-		at91_set_gpio_value(AT91_PIN_PD15, !(ctrl & NAND_NCE));
-		this->IO_ADDR_W = (void *) IO_ADDR_W;
-	}
-
-	if (cmd != NAND_CMD_NONE)
-		writeb(cmd, this->IO_ADDR_W);
-}
-
-static int at91sam9263ek_nand_ready(struct mtd_info *mtd)
-{
-	return at91_get_gpio_value(AT91_PIN_PA22);
-}
-
-int board_nand_init(struct nand_chip *nand)
-{
-	nand->ecc.mode = NAND_ECC_SOFT;
-#ifdef CONFIG_SYS_NAND_DBW_16
-	nand->options = NAND_BUSWIDTH_16;
-#endif
-	nand->cmd_ctrl = at91sam9263ek_nand_hwcontrol;
-	nand->dev_ready = at91sam9263ek_nand_ready;
-	nand->chip_delay = 20;
-
-	return 0;
-}

board/atmel/at91sam9rlek/Makefile

@@ -31,8 +31,7 @@ LIB	= $(obj)lib$(BOARD).a
 
 COBJS-y += at91sam9rlek.o
 COBJS-y += led.o
-COBJS-y	+= partition.o
-COBJS-$(CONFIG_CMD_NAND) += nand.o
+COBJS-$(CONFIG_HAS_DATAFLASH) += partition.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS-y))

board/atmel/at91sam9rlek/at91sam9rlek.c

@@ -26,6 +26,7 @@
 #include <asm/arch/at91sam9rl.h>
 #include <asm/arch/at91sam9rl_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
+#include <asm/arch/at91_common.h>
 #include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
 #include <asm/arch/gpio.h>
@@ -43,33 +44,6 @@ DECLARE_GLOBAL_DATA_PTR;
  * Miscelaneous platform dependent initialisations
  */
 
-static void at91sam9rlek_serial_hw_init(void)
-{
-#ifdef CONFIG_USART0
-	at91_set_A_periph(AT91_PIN_PA6, 1);		/* TXD0 */
-	at91_set_A_periph(AT91_PIN_PA7, 0);		/* RXD0 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US0);
-#endif
-
-#ifdef CONFIG_USART1
-	at91_set_A_periph(AT91_PIN_PA11, 1);		/* TXD1 */
-	at91_set_A_periph(AT91_PIN_PA12, 0);		/* RXD1 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US1);
-#endif
-
-#ifdef CONFIG_USART2
-	at91_set_A_periph(AT91_PIN_PA13, 1);		/* TXD2 */
-	at91_set_A_periph(AT91_PIN_PA14, 0);		/* RXD2 */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US2);
-#endif
-
-#ifdef CONFIG_USART3	/* DBGU */
-	at91_set_A_periph(AT91_PIN_PA21, 0);		/* DRXD */
-	at91_set_A_periph(AT91_PIN_PA22, 1);		/* DTXD */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
-#endif
-}
-
 #ifdef CONFIG_CMD_NAND
 static void at91sam9rlek_nand_hw_init(void)
 {
@@ -102,30 +76,16 @@ static void at91sam9rlek_nand_hw_init(void)
 	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_PIOD);
 
 	/* Configure RDY/BSY */
-	at91_set_gpio_input(AT91_PIN_PD17, 1);
+	at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
 
 	/* Enable NandFlash */
-	at91_set_gpio_output(AT91_PIN_PB6, 1);
+	at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
 
 	at91_set_A_periph(AT91_PIN_PB4, 0);		/* NANDOE */
 	at91_set_A_periph(AT91_PIN_PB5, 0);		/* NANDWE */
 }
 #endif
 
-#ifdef CONFIG_HAS_DATAFLASH
-static void at91sam9rlek_spi_hw_init(void)
-{
-	at91_set_A_periph(AT91_PIN_PA28, 0);	/* SPI0_NPCS0 */
-
-	at91_set_A_periph(AT91_PIN_PA25, 0);	/* SPI0_MISO */
-	at91_set_A_periph(AT91_PIN_PA26, 0);	/* SPI0_MOSI */
-	at91_set_A_periph(AT91_PIN_PA27, 0);	/* SPI0_SPCK */
-
-	/* Enable clock */
-	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_SPI);
-}
-#endif
-
 #ifdef CONFIG_LCD
 vidinfo_t panel_info = {
 	vl_col:		240,
@@ -223,12 +183,12 @@ int board_init(void)
 	/* adress of boot parameters */
 	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 
-	at91sam9rlek_serial_hw_init();
+	at91_serial_hw_init();
 #ifdef CONFIG_CMD_NAND
 	at91sam9rlek_nand_hw_init();
 #endif
 #ifdef CONFIG_HAS_DATAFLASH
-	at91sam9rlek_spi_hw_init();
+	at91_spi0_hw_init(1 << 0);
 #endif
 #ifdef CONFIG_LCD
 	at91sam9rlek_lcd_hw_init();

board/atmel/at91sam9rlek/led.c

@@ -28,50 +28,16 @@
 #include <asm/arch/gpio.h>
 #include <asm/arch/io.h>
 
-#define	RED_LED		AT91_PIN_PD14	/* this is the power led */
-#define	GREEN_LED	AT91_PIN_PD15	/* this is the user1 led */
-#define	YELLOW_LED	AT91_PIN_PD16	/* this is the user2 led */
-
-void red_LED_on(void)
-{
-	at91_set_gpio_value(RED_LED, 1);
-}
-
-void red_LED_off(void)
-{
-	at91_set_gpio_value(RED_LED, 0);
-}
-
-void green_LED_on(void)
-{
-	at91_set_gpio_value(GREEN_LED, 0);
-}
-
-void green_LED_off(void)
-{
-	at91_set_gpio_value(GREEN_LED, 1);
-}
-
-void yellow_LED_on(void)
-{
-	at91_set_gpio_value(YELLOW_LED, 0);
-}
-
-void yellow_LED_off(void)
-{
-	at91_set_gpio_value(YELLOW_LED, 1);
-}
-
 void coloured_LED_init(void)
 {
 	/* Enable clock */
 	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_PIOD);
 
-	at91_set_gpio_output(RED_LED, 1);
-	at91_set_gpio_output(GREEN_LED, 1);
-	at91_set_gpio_output(YELLOW_LED, 1);
+	at91_set_gpio_output(CONFIG_RED_LED, 1);
+	at91_set_gpio_output(CONFIG_GREEN_LED, 1);
+	at91_set_gpio_output(CONFIG_YELLOW_LED, 1);
 
-	at91_set_gpio_value(RED_LED, 0);
-	at91_set_gpio_value(GREEN_LED, 1);
-	at91_set_gpio_value(YELLOW_LED, 1);
+	at91_set_gpio_value(CONFIG_RED_LED, 0);
+	at91_set_gpio_value(CONFIG_GREEN_LED, 1);
+	at91_set_gpio_value(CONFIG_YELLOW_LED, 1);
 }

board/atmel/at91sam9rlek/nand.c

@@ -1,78 +0,0 @@
-/*
- * (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop@leadtechdesign.com>
- * Lead Tech Design <www.leadtechdesign.com>
- *
- * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/arch/at91sam9rl.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/at91_pio.h>
-
-#include <nand.h>
-
-/*
- *	hardware specific access to control-lines
- */
-#define	MASK_ALE	(1 << 21)	/* our ALE is AD21 */
-#define	MASK_CLE	(1 << 22)	/* our CLE is AD22 */
-
-static void at91sam9rlek_nand_hwcontrol(struct mtd_info *mtd,
-					int cmd, unsigned int ctrl)
-{
-	struct nand_chip *this = mtd->priv;
-
-	if (ctrl & NAND_CTRL_CHANGE) {
-		ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
-		IO_ADDR_W &= ~(MASK_ALE | MASK_CLE);
-
-		if (ctrl & NAND_CLE)
-			IO_ADDR_W |= MASK_CLE;
-		if (ctrl & NAND_ALE)
-			IO_ADDR_W |= MASK_ALE;
-
-		at91_set_gpio_value(AT91_PIN_PB6, !(ctrl & NAND_NCE));
-		this->IO_ADDR_W = (void *) IO_ADDR_W;
-	}
-
-	if (cmd != NAND_CMD_NONE)
-		writeb(cmd, this->IO_ADDR_W);
-}
-
-static int at91sam9rlek_nand_ready(struct mtd_info *mtd)
-{
-	return at91_get_gpio_value(AT91_PIN_PD17);
-}
-
-int board_nand_init(struct nand_chip *nand)
-{
-	nand->ecc.mode = NAND_ECC_SOFT;
-#ifdef CONFIG_SYS_NAND_DBW_16
-	nand->options = NAND_BUSWIDTH_16;
-#endif
-	nand->cmd_ctrl = at91sam9rlek_nand_hwcontrol;
-	nand->dev_ready = at91sam9rlek_nand_ready;
-	nand->chip_delay = 20;
-
-	return 0;
-}

board/cmc_pu2/load_sernum_ethaddr.c

@@ -27,6 +27,7 @@
 /* #define DEBUG */
 
 #include <common.h>
+#include <net.h>
 
 #define I2C_CHIP	0x50	/* I2C bus address of onboard EEPROM */
 #define I2C_ALEN	1	/* length of EEPROM addresses in bytes */
@@ -66,7 +67,7 @@ int i2c_read (unsigned char chip, unsigned int addr, int alen,
  * Internal structure: see struct definition
  */
 
-void misc_init_r(void)
+int misc_init_r(void)
 {
 	struct manufacturer_data data;
 	char  serial [9];
@@ -80,7 +81,7 @@ void misc_init_r(void)
 	if (i2c_read(I2C_CHIP, I2C_OFFSET, I2C_ALEN, (unsigned char *)&data,
 		     sizeof(data)) != 0) {
 		puts ("Error reading manufacturer data from EEPROM\n");
-		return;
+		return -1;
 	}
 
 	/* check if manufacturer data block is valid  */
@@ -93,7 +94,7 @@ void misc_init_r(void)
 
 	if (chksum != data.chksum) {
 		puts ("Error: manufacturer data block has invalid checksum\n");
-		return;
+		return -1;
 	}
 
 	/* copy serial number */
@@ -107,4 +108,6 @@ void misc_init_r(void)
 	if (getenv("ethaddr") == NULL) {
 		eth_setenv_enetaddr("ethaddr", data.macadr);
 	}
+
+	return 0;
 }

cpu/arm926ejs/at91/Makefile

@@ -25,8 +25,38 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(SOC).a
 
+ifdef CONFIG_AT91CAP9
+COBJS-$(CONFIG_MACB)		+= at91cap9_macb.o
+COBJS-y				+= at91cap9_serial.o
+COBJS-$(CONFIG_HAS_DATAFLASH)	+= at91cap9_spi.o
+endif
+ifdef CONFIG_AT91SAM9260
+COBJS-$(CONFIG_MACB)		+= at91sam9260_macb.o
+COBJS-y				+= at91sam9260_serial.o
+COBJS-$(CONFIG_HAS_DATAFLASH)	+= at91sam9260_spi.o
+endif
+ifdef CONFIG_AT91SAM9G20
+COBJS-$(CONFIG_MACB)		+= at91sam9260_macb.o
+COBJS-y				+= at91sam9260_serial.o
+COBJS-$(CONFIG_HAS_DATAFLASH)	+= at91sam9260_spi.o
+endif
+ifdef CONFIG_AT91SAM9261
+COBJS-y				+= at91sam9261_serial.o
+COBJS-$(CONFIG_HAS_DATAFLASH)	+= at91sam9261_spi.o
+endif
+ifdef CONFIG_AT91SAM9263
+COBJS-$(CONFIG_MACB)		+= at91sam9263_macb.o
+COBJS-y				+= at91sam9263_serial.o
+COBJS-$(CONFIG_HAS_DATAFLASH)	+= at91sam9263_spi.o
+COBJS-$(CONFIG_USB_OHCI_NEW)	+= at91sam9263_usb.o
+endif
+ifdef CONFIG_AT91SAM9RL
+COBJS-y				+= at91sam9rl_serial.o
+COBJS-$(CONFIG_HAS_DATAFLASH)	+= at91sam9rl_spi.o
+endif
+COBJS-$(CONFIG_AT91_LED)	+= led.o
+COBJS-$(CONFIG_HAS_DATAFLASH)	+= spi.o
 COBJS-y	+= timer.o
-COBJS-$(CONFIG_HAS_DATAFLASH) +=spi.o
 COBJS-y	+= usb.o
 SOBJS	= lowlevel_init.o
 

cpu/arm926ejs/at91/at91cap9_macb.c

@@ -0,0 +1,54 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/io.h>
+
+void at91_macb_hw_init(void)
+{
+	at91_set_A_periph(AT91_PIN_PB21, 0);	/* ETXCK_EREFCK */
+	at91_set_A_periph(AT91_PIN_PB22, 0);	/* ERXDV */
+	at91_set_A_periph(AT91_PIN_PB25, 0);	/* ERX0 */
+	at91_set_A_periph(AT91_PIN_PB26, 0);	/* ERX1 */
+	at91_set_A_periph(AT91_PIN_PB27, 0);	/* ERXER */
+	at91_set_A_periph(AT91_PIN_PB28, 0);	/* ETXEN */
+	at91_set_A_periph(AT91_PIN_PB23, 0);	/* ETX0 */
+	at91_set_A_periph(AT91_PIN_PB24, 0);	/* ETX1 */
+	at91_set_A_periph(AT91_PIN_PB30, 0);	/* EMDIO */
+	at91_set_A_periph(AT91_PIN_PB29, 0);	/* EMDC */
+
+#ifndef CONFIG_RMII
+	at91_set_B_periph(AT91_PIN_PC25, 0);	/* ECRS */
+	at91_set_B_periph(AT91_PIN_PC26, 0);	/* ECOL */
+	at91_set_B_periph(AT91_PIN_PC22, 0);	/* ERX2 */
+	at91_set_B_periph(AT91_PIN_PC23, 0);	/* ERX3 */
+	at91_set_B_periph(AT91_PIN_PC27, 0);	/* ERXCK */
+	at91_set_B_periph(AT91_PIN_PC20, 0);	/* ETX2 */
+	at91_set_B_periph(AT91_PIN_PC21, 0);	/* ETX3 */
+	at91_set_B_periph(AT91_PIN_PC24, 0);	/* ETXER */
+#endif
+}

cpu/arm926ejs/at91/at91cap9_serial.c

@@ -0,0 +1,76 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/io.h>
+
+void at91_serial0_hw_init(void)
+{
+	at91_set_A_periph(AT91_PIN_PA22, 1);		/* TXD0 */
+	at91_set_A_periph(AT91_PIN_PA23, 0);		/* RXD0 */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US0);
+}
+
+void at91_serial1_hw_init(void)
+{
+	at91_set_A_periph(AT91_PIN_PD0, 1);		/* TXD1 */
+	at91_set_A_periph(AT91_PIN_PD1, 0);		/* RXD1 */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US1);
+}
+
+void at91_serial2_hw_init(void)
+{
+	at91_set_A_periph(AT91_PIN_PD2, 1);		/* TXD2 */
+	at91_set_A_periph(AT91_PIN_PD3, 0);		/* RXD2 */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_US2);
+}
+
+void at91_serial3_hw_init(void)
+{
+	at91_set_A_periph(AT91_PIN_PC30, 0);		/* DRXD */
+	at91_set_A_periph(AT91_PIN_PC31, 1);		/* DTXD */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
+}
+
+void at91_serial_hw_init(void)
+{
+#ifdef CONFIG_USART0
+	at91_serial0_hw_init();
+#endif
+
+#ifdef CONFIG_USART1
+	at91_serial1_hw_init();
+#endif
+
+#ifdef CONFIG_USART2
+	at91_serial2_hw_init();
+#endif
+
+#ifdef CONFIG_USART3	/* DBGU */
+	at91_serial3_hw_init();
+#endif
+}

cpu/arm926ejs/at91/at91cap9_spi.c

@@ -0,0 +1,75 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/io.h>
+
+void at91_spi0_hw_init(unsigned long cs_mask)
+{
+	at91_set_B_periph(AT91_PIN_PA0, 0);	/* SPI0_MISO */
+	at91_set_B_periph(AT91_PIN_PA1, 0);	/* SPI0_MOSI */
+	at91_set_B_periph(AT91_PIN_PA2, 0);	/* SPI0_SPCK */
+
+	/* Enable clock */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_SPI0);
+
+	if (cs_mask & (1 << 0)) {
+		at91_set_gpio_output(AT91_PIN_PA5, 1);
+	}
+	if (cs_mask & (1 << 1)) {
+		at91_set_gpio_output(AT91_PIN_PA3, 1);
+	}
+	if (cs_mask & (1 << 2)) {
+		at91_set_gpio_output(AT91_PIN_PD0, 1);
+	}
+	if (cs_mask & (1 << 3)) {
+		at91_set_gpio_output(AT91_PIN_PD1, 1);
+	}
+}
+
+void at91_spi1_hw_init(unsigned long cs_mask)
+{
+	at91_set_A_periph(AT91_PIN_PB12, 0);	/* SPI1_MISO */
+	at91_set_A_periph(AT91_PIN_PB13, 0);	/* SPI1_MOSI */
+	at91_set_A_periph(AT91_PIN_PB14, 0);	/* SPI1_SPCK */
+
+	/* Enable clock */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_SPI1);
+
+	if (cs_mask & (1 << 0)) {
+		at91_set_gpio_output(AT91_PIN_PB15, 1);
+	}
+	if (cs_mask & (1 << 1)) {
+		at91_set_gpio_output(AT91_PIN_PB16, 1);
+	}
+	if (cs_mask & (1 << 2)) {
+		at91_set_gpio_output(AT91_PIN_PB17, 1);
+	}
+	if (cs_mask & (1 << 3)) {
+		at91_set_gpio_output(AT91_PIN_PB18, 1);
+	}
+}

cpu/arm926ejs/at91/at91sam9260_macb.c

@@ -0,0 +1,63 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/io.h>
+
+void at91_macb_hw_init(void)
+{
+	at91_set_A_periph(AT91_PIN_PA19, 0);	/* ETXCK_EREFCK */
+	at91_set_A_periph(AT91_PIN_PA17, 0);	/* ERXDV */
+	at91_set_A_periph(AT91_PIN_PA14, 0);	/* ERX0 */
+	at91_set_A_periph(AT91_PIN_PA15, 0);	/* ERX1 */
+	at91_set_A_periph(AT91_PIN_PA18, 0);	/* ERXER */
+	at91_set_A_periph(AT91_PIN_PA16, 0);	/* ETXEN */
+	at91_set_A_periph(AT91_PIN_PA12, 0);	/* ETX0 */
+	at91_set_A_periph(AT91_PIN_PA13, 0);	/* ETX1 */
+	at91_set_A_periph(AT91_PIN_PA21, 0);	/* EMDIO */
+	at91_set_A_periph(AT91_PIN_PA20, 0);	/* EMDC */
+
+#ifndef CONFIG_RMII
+	at91_set_B_periph(AT91_PIN_PA28, 0);	/* ECRS */
+	at91_set_B_periph(AT91_PIN_PA29, 0);	/* ECOL */
+	at91_set_B_periph(AT91_PIN_PA25, 0);	/* ERX2 */
+	at91_set_B_periph(AT91_PIN_PA26, 0);	/* ERX3 */
+	at91_set_B_periph(AT91_PIN_PA27, 0);	/* ERXCK */
+#if defined(CONFIG_AT91SAM9260EK)
+	/*
+	 * use PA10, PA11 for ETX2, ETX3.
+	 * PA23 and PA24 are for TWI EEPROM
+	 */
+	at91_set_B_periph(AT91_PIN_PA10, 0);	/* ETX2 */
+	at91_set_B_periph(AT91_PIN_PA11, 0);	/* ETX3 */
+#else
+	at91_set_B_periph(AT91_PIN_PA23, 0);	/* ETX2 */
+	at91_set_B_periph(AT91_PIN_PA24, 0);	/* ETX3 */
+#endif
+	at91_set_B_periph(AT91_PIN_PA22, 0);	/* ETXER */
+#endif
+}

cpu/arm926ejs/at91/at91sam9260_serial.c

@@ -0,0 +1,76 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/io.h>
+
+void at91_serial0_hw_init(void)
+{
+	at91_set_A_periph(AT91_PIN_PB4, 1);		/* TXD0 */
+	at91_set_A_periph(AT91_PIN_PB5, 0);		/* RXD0 */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US0);
+}
+
+void at91_serial1_hw_init(void)
+{
+	at91_set_A_periph(AT91_PIN_PB6, 1);		/* TXD1 */
+	at91_set_A_periph(AT91_PIN_PB7, 0);		/* RXD1 */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US1);
+}
+
+void at91_serial2_hw_init(void)
+{
+	at91_set_A_periph(AT91_PIN_PB8, 1);		/* TXD2 */
+	at91_set_A_periph(AT91_PIN_PB9, 0);		/* RXD2 */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_US2);
+}
+
+void at91_serial3_hw_init(void)
+{
+	at91_set_A_periph(AT91_PIN_PB14, 0);		/* DRXD */
+	at91_set_A_periph(AT91_PIN_PB15, 1);		/* DTXD */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
+}
+
+void at91_serial_hw_init(void)
+{
+#ifdef CONFIG_USART0
+	at91_serial0_hw_init();
+#endif
+
+#ifdef CONFIG_USART1
+	at91_serial1_hw_init();
+#endif
+
+#ifdef CONFIG_USART2
+	at91_serial2_hw_init();
+#endif
+
+#ifdef CONFIG_USART3	/* DBGU */
+	at91_serial3_hw_init();
+#endif
+}

cpu/arm926ejs/at91/at91sam9260_spi.c

@@ -0,0 +1,75 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/io.h>
+
+void at91_spi0_hw_init(unsigned long cs_mask)
+{
+	at91_set_A_periph(AT91_PIN_PA0, 0);	/* SPI0_MISO */
+	at91_set_A_periph(AT91_PIN_PA1, 0);	/* SPI0_MOSI */
+	at91_set_A_periph(AT91_PIN_PA2, 0);	/* SPI0_SPCK */
+
+	/* Enable clock */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI0);
+
+	if (cs_mask & (1 << 0)) {
+		at91_set_gpio_output(AT91_PIN_PA3, 1);
+	}
+	if (cs_mask & (1 << 1)) {
+		at91_set_gpio_output(AT91_PIN_PC11, 1);
+	}
+	if (cs_mask & (1 << 2)) {
+		at91_set_gpio_output(AT91_PIN_PC16, 1);
+	}
+	if (cs_mask & (1 << 3)) {
+		at91_set_gpio_output(AT91_PIN_PC17, 1);
+	}
+}
+
+void at91_spi1_hw_init(unsigned long cs_mask)
+{
+	at91_set_A_periph(AT91_PIN_PB0, 0);	/* SPI1_MISO */
+	at91_set_A_periph(AT91_PIN_PB1, 0);	/* SPI1_MOSI */
+	at91_set_A_periph(AT91_PIN_PB2, 0);	/* SPI1_SPCK */
+
+	/* Enable clock */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_SPI1);
+
+	if (cs_mask & (1 << 0)) {
+		at91_set_gpio_output(AT91_PIN_PB3, 1);
+	}
+	if (cs_mask & (1 << 1)) {
+		at91_set_gpio_output(AT91_PIN_PC5, 1);
+	}
+	if (cs_mask & (1 << 2)) {
+		at91_set_gpio_output(AT91_PIN_PC4, 1);
+	}
+	if (cs_mask & (1 << 3)) {
+		at91_set_gpio_output(AT91_PIN_PC3, 1);
+	}
+}

cpu/arm926ejs/at91/at91sam9261_serial.c

@@ -0,0 +1,76 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/io.h>
+
+void at91_serial0_hw_init(void)
+{
+	at91_set_A_periph(AT91_PIN_PC8, 1);		/* TXD0 */
+	at91_set_A_periph(AT91_PIN_PC9, 0);		/* RXD0 */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US0);
+}
+
+void at91_serial1_hw_init(void)
+{
+	at91_set_A_periph(AT91_PIN_PC12, 1);		/* TXD1 */
+	at91_set_A_periph(AT91_PIN_PC13, 0);		/* RXD1 */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US1);
+}
+
+void at91_serial2_hw_init(void)
+{
+	at91_set_A_periph(AT91_PIN_PC14, 1);		/* TXD2 */
+	at91_set_A_periph(AT91_PIN_PC15, 0);		/* RXD2 */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_US2);
+}
+
+void at91_serial3_hw_init(void)
+{
+	at91_set_A_periph(AT91_PIN_PA9, 0);		/* DRXD */
+	at91_set_A_periph(AT91_PIN_PA10, 1);		/* DTXD */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
+}
+
+void at91_serial_hw_init(void)
+{
+#ifdef CONFIG_USART0
+	at91_serial0_hw_init();
+#endif
+
+#ifdef CONFIG_USART1
+	at91_serial1_hw_init();
+#endif
+
+#ifdef CONFIG_USART2
+	at91_serial2_hw_init();
+#endif
+
+#ifdef CONFIG_USART3	/* DBGU */
+	at91_serial3_hw_init();
+#endif
+}

cpu/arm926ejs/at91/at91sam9261_spi.c

@@ -0,0 +1,75 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/io.h>
+
+void at91_spi0_hw_init(unsigned long cs_mask)
+{
+	at91_set_A_periph(AT91_PIN_PA0, 0);	/* SPI0_MISO */
+	at91_set_A_periph(AT91_PIN_PA1, 0);	/* SPI0_MOSI */
+	at91_set_A_periph(AT91_PIN_PA2, 0);	/* SPI0_SPCK */
+
+	/* Enable clock */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI0);
+
+	if (cs_mask & (1 << 0)) {
+		at91_set_gpio_output(AT91_PIN_PA3, 1);
+	}
+	if (cs_mask & (1 << 1)) {
+		at91_set_gpio_output(AT91_PIN_PA4, 1);
+	}
+	if (cs_mask & (1 << 2)) {
+		at91_set_gpio_output(AT91_PIN_PA5, 1);
+	}
+	if (cs_mask & (1 << 3)) {
+		at91_set_gpio_output(AT91_PIN_PA6, 1);
+	}
+}
+
+void at91_spi1_hw_init(unsigned long cs_mask)
+{
+	at91_set_A_periph(AT91_PIN_PB30, 0);	/* SPI1_MISO */
+	at91_set_A_periph(AT91_PIN_PB31, 0);	/* SPI1_MOSI */
+	at91_set_A_periph(AT91_PIN_PB29, 0);	/* SPI1_SPCK */
+
+	/* Enable clock */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI1);
+
+	if (cs_mask & (1 << 0)) {
+		at91_set_gpio_output(AT91_PIN_PB28, 1);
+	}
+	if (cs_mask & (1 << 1)) {
+		at91_set_gpio_output(AT91_PIN_PA24, 1);
+	}
+	if (cs_mask & (1 << 2)) {
+		at91_set_gpio_output(AT91_PIN_PA25, 1);
+	}
+	if (cs_mask & (1 << 3)) {
+		at91_set_gpio_output(AT91_PIN_PA26, 1);
+	}
+}

cpu/arm926ejs/at91/at91sam9263_macb.c

@@ -0,0 +1,54 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/io.h>
+
+void at91_macb_hw_init(void)
+{
+	at91_set_A_periph(AT91_PIN_PE21, 0);	/* ETXCK_EREFCK */
+	at91_set_B_periph(AT91_PIN_PC25, 0);	/* ERXDV */
+	at91_set_A_periph(AT91_PIN_PE25, 0);	/* ERX0 */
+	at91_set_A_periph(AT91_PIN_PE26, 0);	/* ERX1 */
+	at91_set_A_periph(AT91_PIN_PE27, 0);	/* ERXER */
+	at91_set_A_periph(AT91_PIN_PE28, 0);	/* ETXEN */
+	at91_set_A_periph(AT91_PIN_PE23, 0);	/* ETX0 */
+	at91_set_A_periph(AT91_PIN_PE24, 0);	/* ETX1 */
+	at91_set_A_periph(AT91_PIN_PE30, 0);	/* EMDIO */
+	at91_set_A_periph(AT91_PIN_PE29, 0);	/* EMDC */
+
+#ifndef CONFIG_RMII
+	at91_set_A_periph(AT91_PIN_PE22, 0);	/* ECRS */
+	at91_set_B_periph(AT91_PIN_PC26, 0);	/* ECOL */
+	at91_set_B_periph(AT91_PIN_PC22, 0);	/* ERX2 */
+	at91_set_B_periph(AT91_PIN_PC23, 0);	/* ERX3 */
+	at91_set_B_periph(AT91_PIN_PC27, 0);	/* ERXCK */
+	at91_set_B_periph(AT91_PIN_PC20, 0);	/* ETX2 */
+	at91_set_B_periph(AT91_PIN_PC21, 0);	/* ETX3 */
+	at91_set_B_periph(AT91_PIN_PC24, 0);	/* ETXER */
+#endif
+}

cpu/arm926ejs/at91/at91sam9263_serial.c

@@ -0,0 +1,76 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/io.h>
+
+void at91_serial0_hw_init(void)
+{
+	at91_set_A_periph(AT91_PIN_PA26, 1);		/* TXD0 */
+	at91_set_A_periph(AT91_PIN_PA27, 0);		/* RXD0 */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US0);
+}
+
+void at91_serial1_hw_init(void)
+{
+	at91_set_A_periph(AT91_PIN_PD0, 1);		/* TXD1 */
+	at91_set_A_periph(AT91_PIN_PD1, 0);		/* RXD1 */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US1);
+}
+
+void at91_serial2_hw_init(void)
+{
+	at91_set_A_periph(AT91_PIN_PD2, 1);		/* TXD2 */
+	at91_set_A_periph(AT91_PIN_PD3, 0);		/* RXD2 */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_US2);
+}
+
+void at91_serial3_hw_init(void)
+{
+	at91_set_A_periph(AT91_PIN_PC30, 0);		/* DRXD */
+	at91_set_A_periph(AT91_PIN_PC31, 1);		/* DTXD */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
+}
+
+void at91_serial_hw_init(void)
+{
+#ifdef CONFIG_USART0
+	at91_serial0_hw_init();
+#endif
+
+#ifdef CONFIG_USART1
+	at91_serial1_hw_init();
+#endif
+
+#ifdef CONFIG_USART2
+	at91_serial2_hw_init();
+#endif
+
+#ifdef CONFIG_USART3	/* DBGU */
+	at91_serial3_hw_init();
+#endif
+}

cpu/arm926ejs/at91/at91sam9263_spi.c

@@ -0,0 +1,75 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/io.h>
+
+void at91_spi0_hw_init(unsigned long cs_mask)
+{
+	at91_set_B_periph(AT91_PIN_PA0, 0);	/* SPI0_MISO */
+	at91_set_B_periph(AT91_PIN_PA1, 0);	/* SPI0_MOSI */
+	at91_set_B_periph(AT91_PIN_PA2, 0);	/* SPI0_SPCK */
+
+	/* Enable clock */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_SPI0);
+
+	if (cs_mask & (1 << 0)) {
+		at91_set_gpio_output(AT91_PIN_PA5, 1);
+	}
+	if (cs_mask & (1 << 1)) {
+		at91_set_gpio_output(AT91_PIN_PA3, 1);
+	}
+	if (cs_mask & (1 << 2)) {
+		at91_set_gpio_output(AT91_PIN_PA4, 1);
+	}
+	if (cs_mask & (1 << 3)) {
+		at91_set_gpio_output(AT91_PIN_PB11, 1);
+	}
+}
+
+void at91_spi1_hw_init(unsigned long cs_mask)
+{
+	at91_set_A_periph(AT91_PIN_PB12, 0);	/* SPI1_MISO */
+	at91_set_A_periph(AT91_PIN_PB13, 0);	/* SPI1_MOSI */
+	at91_set_A_periph(AT91_PIN_PB14, 0);	/* SPI1_SPCK */
+
+	/* Enable clock */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_SPI1);
+
+	if (cs_mask & (1 << 0)) {
+		at91_set_gpio_output(AT91_PIN_PB15, 1);
+	}
+	if (cs_mask & (1 << 1)) {
+		at91_set_gpio_output(AT91_PIN_PB16, 1);
+	}
+	if (cs_mask & (1 << 2)) {
+		at91_set_gpio_output(AT91_PIN_PB17, 1);
+	}
+	if (cs_mask & (1 << 3)) {
+		at91_set_gpio_output(AT91_PIN_PB18, 1);
+	}
+}

cpu/arm926ejs/at91/at91sam9263_usb.c

@@ -0,0 +1,35 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/io.h>
+
+void at91_uhp_hw_init(void)
+{
+	/* Enable VBus on UHP ports */
+	at91_set_gpio_output(AT91_PIN_PA21, 0);
+	at91_set_gpio_output(AT91_PIN_PA24, 0);
+}

cpu/arm926ejs/at91/at91sam9rl_serial.c

@@ -0,0 +1,76 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/io.h>
+
+void at91_serial0_hw_init(void)
+{
+	at91_set_A_periph(AT91_PIN_PA6, 1);		/* TXD0 */
+	at91_set_A_periph(AT91_PIN_PA7, 0);		/* RXD0 */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US0);
+}
+
+void at91_serial1_hw_init(void)
+{
+	at91_set_A_periph(AT91_PIN_PA11, 1);		/* TXD1 */
+	at91_set_A_periph(AT91_PIN_PA12, 0);		/* RXD1 */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US1);
+}
+
+void at91_serial2_hw_init(void)
+{
+	at91_set_A_periph(AT91_PIN_PA13, 1);		/* TXD2 */
+	at91_set_A_periph(AT91_PIN_PA14, 0);		/* RXD2 */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_US2);
+}
+
+void at91_serial3_hw_init(void)
+{
+	at91_set_A_periph(AT91_PIN_PA21, 0);		/* DRXD */
+	at91_set_A_periph(AT91_PIN_PA22, 1);		/* DTXD */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);
+}
+
+void at91_serial_hw_init(void)
+{
+#ifdef CONFIG_USART0
+	at91_serial0_hw_init();
+#endif
+
+#ifdef CONFIG_USART1
+	at91_serial1_hw_init();
+#endif
+
+#ifdef CONFIG_USART2
+	at91_serial2_hw_init();
+#endif
+
+#ifdef CONFIG_USART3	/* DBGU */
+	at91_serial3_hw_init();
+#endif
+}

cpu/arm926ejs/at91/at91sam9rl_spi.c

@@ -0,0 +1,52 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/io.h>
+
+void at91_spi0_hw_init(unsigned long cs_mask)
+{
+	at91_set_A_periph(AT91_PIN_PA25, 0);	/* SPI0_MISO */
+	at91_set_A_periph(AT91_PIN_PA26, 0);	/* SPI0_MOSI */
+	at91_set_A_periph(AT91_PIN_PA27, 0);	/* SPI0_SPCK */
+
+	/* Enable clock */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_SPI);
+
+	if (cs_mask & (1 << 0)) {
+		at91_set_gpio_output(AT91_PIN_PA28, 1);
+	}
+	if (cs_mask & (1 << 1)) {
+		at91_set_gpio_output(AT91_PIN_PB7, 1);
+	}
+	if (cs_mask & (1 << 2)) {
+		at91_set_gpio_output(AT91_PIN_PD8, 1);
+	}
+	if (cs_mask & (1 << 3)) {
+		at91_set_gpio_output(AT91_PIN_PD9, 1);
+	}
+}

cpu/arm926ejs/at91/led.c

@@ -0,0 +1,64 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/at91_pmc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/io.h>
+
+#ifdef CONFIG_RED_LED
+void red_LED_on(void)
+{
+	at91_set_gpio_value(CONFIG_RED_LED, 1);
+}
+
+void red_LED_off(void)
+{
+	at91_set_gpio_value(CONFIG_RED_LED, 0);
+}
+#endif
+
+#ifdef CONFIG_GREEN_LED
+void green_LED_on(void)
+{
+	at91_set_gpio_value(CONFIG_GREEN_LED, 0);
+}
+
+void green_LED_off(void)
+{
+	at91_set_gpio_value(CONFIG_GREEN_LED, 1);
+}
+#endif
+
+#ifdef CONFIG_YELLOW_LED
+void yellow_LED_on(void)
+{
+	at91_set_gpio_value(CONFIG_YELLOW_LED, 0);
+}
+
+void yellow_LED_off(void)
+{
+	at91_set_gpio_value(CONFIG_YELLOW_LED, 1);
+}
+#endif

cpu/arm926ejs/at91/usb.c

@@ -33,7 +33,7 @@ int usb_cpu_init(void)
 {
 
 #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
-    defined(CONFIG_AT91SAM9263)
+    defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20)
 	/* Enable PLLB */
 	at91_sys_write(AT91_CKGR_PLLBR, CONFIG_SYS_AT91_PLLB);
 	while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
@@ -62,7 +62,7 @@ int usb_cpu_stop(void)
 #endif
 
 #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
-    defined(CONFIG_AT91SAM9263)
+    defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20)
 	/* Disable PLLB */
 	at91_sys_write(AT91_CKGR_PLLBR, 0);
 	while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != 0)

doc/README.at91

@@ -3,7 +3,7 @@ Atmel AT91 Evaluation kits
 http://atmel.com/dyn/products/tools.asp?family_id=605#1443
 
 ------------------------------------------------------------------------------
-AT91SAM9260EK & AT91SAM9XEEK
+AT91SAM9260EK, AT91SAM9G20EK & AT91SAM9XEEK
 ------------------------------------------------------------------------------
 
 Memory map

drivers/mtd/nand/Makefile

@@ -35,6 +35,7 @@ COBJS-y += nand_ids.o
 COBJS-y += nand_util.o
 endif
 
+COBJS-$(CONFIG_NAND_ATMEL) += atmel_nand.o
 COBJS-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o
 COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o
 COBJS-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o

board/afeb9260/nand.c → drivers/mtd/nand/atmel_nand.c

@@ -25,33 +25,29 @@
  */
 
 #include <common.h>
-#include <asm/arch/at91sam9260.h>
+#include <asm/arch/hardware.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/at91_pio.h>
 
 #include <nand.h>
 
-/*
- *	hardware specific access to control-lines
- */
-#define	MASK_ALE	(1 << 21)	/* our ALE is AD21 */
-#define	MASK_CLE	(1 << 22)	/* our CLE is AD22 */
-
-static void at91sam9260ek_nand_hwcontrol(struct mtd_info *mtd,
+static void at91_nand_hwcontrol(struct mtd_info *mtd,
 					 int cmd, unsigned int ctrl)
 {
 	struct nand_chip *this = mtd->priv;
 
 	if (ctrl & NAND_CTRL_CHANGE) {
 		ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
-		IO_ADDR_W &= ~(MASK_ALE | MASK_CLE);
+		IO_ADDR_W &= ~(CONFIG_SYS_NAND_MASK_ALE
+			     | CONFIG_SYS_NAND_MASK_CLE);
 
 		if (ctrl & NAND_CLE)
-			IO_ADDR_W |= MASK_CLE;
+			IO_ADDR_W |= CONFIG_SYS_NAND_MASK_CLE;
 		if (ctrl & NAND_ALE)
-			IO_ADDR_W |= MASK_ALE;
+			IO_ADDR_W |= CONFIG_SYS_NAND_MASK_ALE;
 
-		at91_set_gpio_value(AT91_PIN_PC14, !(ctrl & NAND_NCE));
+		at91_set_gpio_value(CONFIG_SYS_NAND_ENABLE_PIN,
+				    !(ctrl & NAND_NCE));
 		this->IO_ADDR_W = (void *) IO_ADDR_W;
 	}
 
@@ -59,10 +55,12 @@ static void at91sam9260ek_nand_hwcontrol(struct mtd_info *mtd,
 		writeb(cmd, this->IO_ADDR_W);
 }
 
-static int at91sam9260ek_nand_ready(struct mtd_info *mtd)
+#ifdef CONFIG_SYS_NAND_READY_PIN
+static int at91_nand_ready(struct mtd_info *mtd)
 {
-	return at91_get_gpio_value(AT91_PIN_PC13);
+	return at91_get_gpio_value(CONFIG_SYS_NAND_READY_PIN);
 }
+#endif
 
 int board_nand_init(struct nand_chip *nand)
 {
@@ -70,8 +68,10 @@ int board_nand_init(struct nand_chip *nand)
 #ifdef CONFIG_SYS_NAND_DBW_16
 	nand->options = NAND_BUSWIDTH_16;
 #endif
-	nand->cmd_ctrl = at91sam9260ek_nand_hwcontrol;
-	nand->dev_ready = at91sam9260ek_nand_ready;
+	nand->cmd_ctrl = at91_nand_hwcontrol;
+#ifdef CONFIG_SYS_NAND_READY_PIN
+	nand->dev_ready = at91_nand_ready;
+#endif
 	nand->chip_delay = 20;
 
 	return 0;

drivers/net/macb.c

@@ -447,14 +447,14 @@ static int macb_init(struct eth_device *netdev, bd_t *bd)
 	/* choose RMII or MII mode. This depends on the board */
 #ifdef CONFIG_RMII
 #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
-    defined(CONFIG_AT91SAM9263)
+    defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20)
 	macb_writel(macb, USRIO, MACB_BIT(RMII) | MACB_BIT(CLKEN));
 #else
 	macb_writel(macb, USRIO, 0);
 #endif
 #else
 #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
-    defined(CONFIG_AT91SAM9263)
+    defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20)
 	macb_writel(macb, USRIO, MACB_BIT(CLKEN));
 #else
 	macb_writel(macb, USRIO, MACB_BIT(MII));

include/asm-arm/arch-at91/at91_common.h

@@ -0,0 +1,38 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef AT91_COMMON_H
+#define AT91_COMMON_H
+
+void at91_macb_hw_init(void);
+void at91_serial_hw_init(void);
+void at91_serial0_hw_init(void);
+void at91_serial1_hw_init(void);
+void at91_serial2_hw_init(void);
+void at91_serial3_hw_init(void);
+void at91_spi0_hw_init(unsigned long cs_mask);
+void at91_spi1_hw_init(unsigned long cs_mask);
+void at91_uhp_hw_init(void);
+
+#endif /* AT91_COMMON_H */

include/asm-arm/arch-at91/hardware.h

@@ -18,7 +18,7 @@
 
 #if defined(CONFIG_AT91RM9200)
 #include <asm/arch/at91rm9200.h>
-#elif defined(CONFIG_AT91SAM9260)
+#elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20)
 #include <asm/arch/at91sam9260.h>
 #define AT91_BASE_SPI	AT91SAM9260_BASE_SPI0
 #define AT91_ID_UHP	AT91SAM9260_ID_UHP

include/configs/afeb9260.h

@@ -97,9 +97,18 @@
 #define DATAFLASH_TCHS			(0x1 << 24)
 
 /* NAND flash */
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_SYS_NAND_BASE			0x40000000
 #define CONFIG_SYS_NAND_DBW_8			1
+/* our ALE is AD21 */
+#define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
+/* our CLE is AD22 */
+#define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
+#define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PC14
+#define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PC13
+#endif
 
 /* NOR flash - no real flash on this board */
 #define CONFIG_SYS_NO_FLASH		1

include/configs/at91cap9adk.h

@@ -70,6 +70,12 @@
 #define CONFIG_ATMEL_LCD_BGR555		1
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV		1
 
+/* LED */
+#define CONFIG_AT91_LED
+#define	CONFIG_RED_LED		AT91_PIN_PC29	/* this is the power led */
+#define	CONFIG_GREEN_LED	AT91_PIN_PA10	/* this is the user1 led */
+#define	CONFIG_YELLOW_LED	AT91_PIN_PA11	/* this is the user1 led */
+
 #define CONFIG_BOOTDELAY	3
 
 /*
@@ -116,8 +122,16 @@
 #define CONFIG_SYS_FLASH_BASE			PHYS_FLASH_1
 #define CONFIG_SYS_MAX_FLASH_SECT		256
 #define CONFIG_SYS_MAX_FLASH_BANKS		1
+/* our ALE is AD21 */
+#define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
+/* our CLE is AD22 */
+#define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
+#define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PD15
+#endif
 
 /* NAND flash */
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_SYS_NAND_BASE			0x40000000
 #define CONFIG_SYS_NAND_DBW_8			1

include/configs/at91sam9260ek.h

@@ -3,7 +3,7 @@
  * Stelian Pop <stelian.pop@leadtechdesign.com>
  * Lead Tech Design <www.leadtechdesign.com>
  *
- * Configuation settings for the AT91SAM9260EK board.
+ * Configuation settings for the AT91SAM9260EK & AT91SAM9G20EK boards.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -28,18 +28,26 @@
 #define __CONFIG_H
 
 /* ARM asynchronous clock */
-#define AT91_CPU_NAME		"AT91SAM9260"
 #define AT91_MAIN_CLOCK		18432000	/* 18.432 MHz crystal */
-#define AT91_MASTER_CLOCK	100000000	/* peripheral */
-#define AT91_CPU_CLOCK		200000000	/* cpu */
 #define CONFIG_SYS_AT91_PLLB	0x107c3e18	/* PLLB settings for USB */
 #define CONFIG_SYS_HZ		1000000		/* 1us resolution */
 
 #define AT91_SLOW_CLOCK		32768	/* slow clock */
 
 #define CONFIG_ARM926EJS	1	/* This is an ARM926EJS Core	*/
+
+#ifdef CONFIG_AT91SAM9G20EK
+#define AT91_CPU_NAME		"AT91SAM9G20"
+#define AT91_MASTER_CLOCK	132000000	/* peripheral */
+#define AT91_CPU_CLOCK		396000000	/* cpu */
+#define CONFIG_AT91SAM9G20	1	/* It's an Atmel AT91SAM9G20 SoC*/
+#else
+#define AT91_CPU_NAME		"AT91SAM9260"
+#define AT91_MASTER_CLOCK	100000000	/* peripheral */
+#define AT91_CPU_CLOCK		200000000	/* cpu */
 #define CONFIG_AT91SAM9260	1	/* It's an Atmel AT91SAM9260 SoC*/
-#define CONFIG_AT91SAM9260EK	1	/* on an AT91SAM9260EK Board	*/
+#endif
+
 #undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/
 
 #define CONFIG_CMDLINE_TAG	1	/* enable passing of ATAGs	*/
@@ -58,6 +66,11 @@
 #undef CONFIG_USART2
 #define CONFIG_USART3		1	/* USART 3 is DBGU */
 
+/* LED */
+#define CONFIG_AT91_LED
+#define	CONFIG_RED_LED		AT91_PIN_PA9	/* this is the power led */
+#define	CONFIG_GREEN_LED	AT91_PIN_PA6	/* this is the user led */
+
 #define CONFIG_BOOTDELAY	3
 
 /*
@@ -96,13 +109,27 @@
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000	/* CS0 */
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1	0xD0000000	/* CS1 */
 #define AT91_SPI_CLK			15000000
+
+#ifdef CONFIG_AT91SAM9G20EK
+#define DATAFLASH_TCSS			(0x22 << 16)
+#else
 #define DATAFLASH_TCSS			(0x1a << 16)
+#endif
 #define DATAFLASH_TCHS			(0x1 << 24)
 
 /* NAND flash */
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_SYS_NAND_BASE			0x40000000
 #define CONFIG_SYS_NAND_DBW_8			1
+/* our ALE is AD21 */
+#define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
+/* our CLE is AD22 */
+#define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
+#define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PC14
+#define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PC13
+#endif
 
 /* NOR flash - no real flash on this board */
 #define CONFIG_SYS_NO_FLASH			1

include/configs/at91sam9261ek.h

@@ -69,6 +69,12 @@
 #define CONFIG_ATMEL_LCD_BGR555		1
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV		1
 
+/* LED */
+#define CONFIG_AT91_LED
+#define	CONFIG_RED_LED		AT91_PIN_PA23	/* this is the power led */
+#define	CONFIG_GREEN_LED	AT91_PIN_PA13	/* this is the user1 led */
+#define	CONFIG_YELLOW_LED	AT91_PIN_PA14	/* this is the user2 led */
+
 #define CONFIG_BOOTDELAY	3
 
 /*
@@ -111,9 +117,18 @@
 #define DATAFLASH_TCHS			(0x1 << 24)
 
 /* NAND flash */
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_SYS_NAND_BASE			0x40000000
 #define CONFIG_SYS_NAND_DBW_8			1
+/* our ALE is AD22 */
+#define CONFIG_SYS_NAND_MASK_ALE		(1 << 22)
+/* our CLE is AD21 */
+#define CONFIG_SYS_NAND_MASK_CLE		(1 << 21)
+#define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PC14
+#define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PC15
+#endif
 
 /* NOR flash - no real flash on this board */
 #define CONFIG_SYS_NO_FLASH			1

include/configs/at91sam9263ek.h

@@ -70,6 +70,12 @@
 #define CONFIG_ATMEL_LCD_BGR555		1
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV		1
 
+/* LED */
+#define CONFIG_AT91_LED
+#define	CONFIG_RED_LED		AT91_PIN_PB7	/* this is the power led */
+#define	CONFIG_GREEN_LED	AT91_PIN_PB8	/* this is the user1 led */
+#define	CONFIG_YELLOW_LED	AT91_PIN_PC29	/* this is the user2 led */
+
 #define CONFIG_BOOTDELAY	3
 
 /*
@@ -123,9 +129,18 @@
 #endif
 
 /* NAND flash */
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_SYS_NAND_BASE			0x40000000
 #define CONFIG_SYS_NAND_DBW_8			1
+/* our ALE is AD21 */
+#define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
+/* our CLE is AD22 */
+#define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
+#define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PD15
+#define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PA22
+#endif
 
 /* Ethernet */
 #define CONFIG_MACB			1

include/configs/at91sam9rlek.h

@@ -69,6 +69,12 @@
 #define CONFIG_ATMEL_LCD_RGB565		1
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV		1
 
+/* LED */
+#define CONFIG_AT91_LED
+#define	CONFIG_RED_LED		AT91_PIN_PD14	/* this is the power led */
+#define	CONFIG_GREEN_LED	AT91_PIN_PD15	/* this is the user1 led */
+#define	CONFIG_YELLOW_LED	AT91_PIN_PD16	/* this is the user2 led */
+
 #define CONFIG_BOOTDELAY	3
 
 /*
@@ -104,9 +110,18 @@
 #define CONFIG_SYS_NO_FLASH			1
 
 /* NAND flash */
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_SYS_NAND_BASE			0x40000000
 #define CONFIG_SYS_NAND_DBW_8			1
+/* our ALE is AD21 */
+#define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
+/* our CLE is AD22 */
+#define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
+#define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PB6
+#define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PD17
+#endif
 
 /* Ethernet - not present */