Selaa lähdekoodia

OMAP: rename timer divisor

Divisor field is called PTV not PVT.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Ladislav Michl 16 vuotta sitten
vanhempi
commit
81472d893f

+ 1 - 1
cpu/arm1136/omap24xx/interrupts.c

@@ -49,7 +49,7 @@ int interrupt_init (void)
 
 	/* Start the counter ticking up */
 	*((int32_t *) (CONFIG_SYS_TIMERBASE + TLDR)) = TIMER_LOAD_VAL;	/* reload value on overflow*/
-	val = (CONFIG_SYS_PVT << 2) | BIT5 | BIT1 | BIT0;		/* mask to enable timer*/
+	val = (CONFIG_SYS_PTV << 2) | BIT5 | BIT1 | BIT0;		/* mask to enable timer*/
 	*((int32_t *) (CONFIG_SYS_TIMERBASE + TCLR)) = val;	/* start timer */
 
 	reset_timer_masked(); /* init the timestamp and lastinc value */

+ 1 - 1
cpu/arm925t/interrupts.c

@@ -51,7 +51,7 @@ int interrupt_init (void)
 
 	/* Start the decrementer ticking down from 0xffffffff */
 	*((int32_t *) (CONFIG_SYS_TIMERBASE + LOAD_TIM)) = TIMER_LOAD_VAL;
-	val = MPUTIM_ST | MPUTIM_AR | MPUTIM_CLOCK_ENABLE | (CONFIG_SYS_PVT << MPUTIM_PTV_BIT);
+	val = MPUTIM_ST | MPUTIM_AR | MPUTIM_CLOCK_ENABLE | (CONFIG_SYS_PTV << MPUTIM_PTV_BIT);
 	*((int32_t *) (CONFIG_SYS_TIMERBASE + CNTL_TIMER)) = val;
 
 	/* init the timestamp and lastdec value */

+ 1 - 1
cpu/arm926ejs/omap/timer.c

@@ -52,7 +52,7 @@ int timer_init (void)
 
 	/* Start the decrementer ticking down from 0xffffffff */
 	*((int32_t *) (CONFIG_SYS_TIMERBASE + LOAD_TIM)) = TIMER_LOAD_VAL;
-	val = MPUTIM_ST | MPUTIM_AR | MPUTIM_CLOCK_ENABLE | (CONFIG_SYS_PVT << MPUTIM_PTV_BIT);
+	val = MPUTIM_ST | MPUTIM_AR | MPUTIM_CLOCK_ENABLE | (CONFIG_SYS_PTV << MPUTIM_PTV_BIT);
 	*((int32_t *) (CONFIG_SYS_TIMERBASE + CNTL_TIMER)) = val;
 
 	/* init the timestamp and lastdec value */

+ 1 - 1
cpu/arm_cortexa8/omap3/interrupts.c

@@ -175,7 +175,7 @@ int interrupt_init(void)
 	/* start the counter ticking up, reload value on overflow */
 	writel(TIMER_LOAD_VAL, &timer_base->tldr);
 	/* enable timer */
-	writel((CONFIG_SYS_PVT << 2) | TCLR_PRE | TCLR_AR | TCLR_ST,
+	writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST,
 		&timer_base->tclr);
 
 	reset_timer_masked();	/* init the timestamp and lastinc value */

+ 3 - 3
include/configs/SX1.h

@@ -138,9 +138,9 @@
 /* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1.
  * This time is further subdivided by a local divisor.
  */
-#define CONFIG_SYS_TIMERBASE	0xFFFEC500	    /* use timer 1 */
-#define CONFIG_SYS_PVT		7		    /* 2^(pvt+1), divide by 256 */
-#define CONFIG_SYS_HZ			((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_TIMERBASE	OMAP1510_TIMER1_BASE	/* use timer 1 */
+#define CONFIG_SYS_PTV		7	/* 2^(PTV+1), divide by 256 */
+#define CONFIG_SYS_HZ		((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
 
 /*-----------------------------------------------------------------------
  * Stack sizes

+ 2 - 4
include/configs/apollon.h

@@ -203,11 +203,9 @@
  * or by 32KHz clk, or from external sig. This rate is divided by a local
  * divisor.
  */
-#define	V_PVT	7	/* use with 12MHz/128 */
-
 #define	CONFIG_SYS_TIMERBASE	OMAP2420_GPT2
-#define	CONFIG_SYS_PVT	V_PVT	/* 2^(pvt+1) */
-#define	CONFIG_SYS_HZ		((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT))
+#define	CONFIG_SYS_PTV		7	/* 2^(PTV+1) */
+#define	CONFIG_SYS_HZ		((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
 
 /*-----------------------------------------------------------------------
  * Stack sizes

+ 2 - 2
include/configs/netstar.h

@@ -226,8 +226,8 @@
  * This time is further subdivided by a local divisor.
  */
 #define CONFIG_SYS_TIMERBASE		OMAP1510_TIMER1_BASE
-#define CONFIG_SYS_PVT			7		/* 2^(pvt+1), divide by 256 */
-#define CONFIG_SYS_HZ			((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_PTV			7		/* 2^(pvt+1), divide by 256 */
+#define CONFIG_SYS_HZ			((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
 
 #define OMAP5910_DPLL_DIV	1
 #define OMAP5910_DPLL_MUL	((CONFIG_SYS_CLK_FREQ * \

+ 3 - 3
include/configs/omap1510inn.h

@@ -135,9 +135,9 @@
 /* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1.
  * This time is further subdivided by a local divisor.
  */
-#define CONFIG_SYS_TIMERBASE	0xFFFEC500	    /* use timer 1 */
-#define CONFIG_SYS_PVT		7		    /* 2^(pvt+1), divide by 256 */
-#define CONFIG_SYS_HZ			((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_TIMERBASE	OMAP1510_TIMER1_BASE	/* use timer 1 */
+#define CONFIG_SYS_PTV		7	/* 2^(PTV+1), divide by 256 */
+#define CONFIG_SYS_HZ		((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
 
 /*-----------------------------------------------------------------------
  * Stack sizes

+ 2 - 2
include/configs/omap1610h2.h

@@ -131,8 +131,8 @@
  * DPLL1. This time is further subdivided by a local divisor.
  */
 #define CONFIG_SYS_TIMERBASE	0xFFFEC500	/* use timer 1 */
-#define CONFIG_SYS_PVT	7	/* 2^(pvt+1), divide by 256 */
-#define CONFIG_SYS_HZ	((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_PTV		7	/* 2^(PTV+1), divide by 256 */
+#define CONFIG_SYS_HZ		((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
 
 /*-----------------------------------------------------------------------
  * Stack sizes

+ 2 - 2
include/configs/omap1610inn.h

@@ -136,8 +136,8 @@
  * DPLL1. This time is further subdivided by a local divisor.
  */
 #define CONFIG_SYS_TIMERBASE	0xFFFEC500	/* use timer 1 */
-#define CONFIG_SYS_PVT	7	/* 2^(pvt+1), divide by 256 */
-#define CONFIG_SYS_HZ	((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_PTV		7	/* 2^(PTV+1), divide by 256 */
+#define CONFIG_SYS_HZ		((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
 
 /*-----------------------------------------------------------------------
  * Stack sizes

+ 5 - 5
include/configs/omap2420h4.h

@@ -222,14 +222,14 @@
  * 32KHz clk, or from external sig. This rate is divided by a local divisor.
  */
 #ifdef CONFIG_APTIX
-#define V_PVT                    3
+#define V_PTV			3
 #else
-#define V_PVT                    7  /* use with 12MHz/128 */
+#define V_PTV			7	/* use with 12MHz/128 */
 #endif
 
-#define CONFIG_SYS_TIMERBASE            OMAP2420_GPT2
-#define CONFIG_SYS_PVT                  V_PVT  /* 2^(pvt+1) */
-#define CONFIG_SYS_HZ	                 ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_TIMERBASE		OMAP2420_GPT2
+#define CONFIG_SYS_PTV			V_PTV	/* 2^(PTV+1) */
+#define CONFIG_SYS_HZ			((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
 
 /*-----------------------------------------------------------------------
  * Stack sizes

+ 2 - 4
include/configs/omap3_beagle.h

@@ -226,11 +226,9 @@
  * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
  * 32KHz clk, or from external sig. This rate is divided by a local divisor.
  */
-#define V_PVT				7
-
 #define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
-#define CONFIG_SYS_PVT			V_PVT	/* 2^(pvt+1) */
-#define CONFIG_SYS_HZ			((V_SCLK) / (2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_PTV			7	/* 2^(PTV+1) */
+#define CONFIG_SYS_HZ			((V_SCLK) / (2 << CONFIG_SYS_PTV))
 
 /*-----------------------------------------------------------------------
  * Stack sizes

+ 2 - 4
include/configs/omap3_evm.h

@@ -219,11 +219,9 @@
  * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
  * 32KHz clk, or from external sig. This rate is divided by a local divisor.
  */
-#define V_PVT				7
-
 #define CONFIG_SYS_TIMERBASE		OMAP34XX_GPT2
-#define CONFIG_SYS_PVT			V_PVT	/* 2^(pvt+1) */
-#define CONFIG_SYS_HZ			((V_SCLK) / (2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_PTV			7	/* 2^(PTV+1) */
+#define CONFIG_SYS_HZ			((V_SCLK) / (2 << CONFIG_SYS_PTV))
 
 /*-----------------------------------------------------------------------
  * Stack sizes

+ 2 - 4
include/configs/omap3_overo.h

@@ -213,11 +213,9 @@
  * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
  * 32KHz clk, or from external sig. This rate is divided by a local divisor.
  */
-#define V_PVT				7
-
 #define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
-#define CONFIG_SYS_PVT			V_PVT	/* 2^(pvt+1) */
-#define CONFIG_SYS_HZ			((V_SCLK) / (2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_PTV			7	/* 2^(PTV+1) */
+#define CONFIG_SYS_HZ			((V_SCLK) / (2 << CONFIG_SYS_PTV))
 
 /*-----------------------------------------------------------------------
  * Stack sizes

+ 2 - 4
include/configs/omap3_pandora.h

@@ -215,11 +215,9 @@
  * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
  * 32KHz clk, or from external sig. This rate is divided by a local divisor.
  */
-#define V_PVT				7
-
 #define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
-#define CONFIG_SYS_PVT			V_PVT	/* 2^(pvt+1) */
-#define CONFIG_SYS_HZ			((V_SCLK) / (2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_PTV			7	/* 2^(PTV+1) */
+#define CONFIG_SYS_HZ			((V_SCLK) / (2 << CONFIG_SYS_PTV))
 
 /*-----------------------------------------------------------------------
  * Stack sizes

+ 2 - 4
include/configs/omap3_zoom1.h

@@ -223,11 +223,9 @@
  * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
  * 32KHz clk, or from external sig. This rate is divided by a local divisor.
  */
-#define V_PVT				7
-
 #define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
-#define CONFIG_SYS_PVT			V_PVT	/* 2^(pvt+1) */
-#define CONFIG_SYS_HZ			((V_SCLK) / (2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_PTV			7	/* 2^(PTV+1) */
+#define CONFIG_SYS_HZ			((V_SCLK) / (2 << CONFIG_SYS_PTV))
 
 /*-----------------------------------------------------------------------
  * Stack sizes

+ 2 - 2
include/configs/omap5912osk.h

@@ -140,8 +140,8 @@
  * DPLL1. This time is further subdivided by a local divisor.
  */
 #define CONFIG_SYS_TIMERBASE	0xFFFEC500	/* use timer 1 */
-#define CONFIG_SYS_PVT	7	/* 2^(pvt+1), divide by 256 */
-#define CONFIG_SYS_HZ	((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_PTV		7	/* 2^(PTV+1), divide by 256 */
+#define CONFIG_SYS_HZ		((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
 
 /*-----------------------------------------------------------------------
  * Stack sizes

+ 3 - 4
include/configs/omap730p2.h

@@ -148,10 +148,9 @@
  * the RefClk (12Mhz) or by DPLL1. This time is further subdivided by a
  * local divisor.
  */
-
-#define CONFIG_SYS_TIMERBASE		   0xFFFEC500	       /* use timer 1 */
-#define CONFIG_SYS_PVT			   7		       /* 2^(pvt+1), divide by 256 */
-#define CONFIG_SYS_HZ			   ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_TIMERBASE		0xFFFEC500	/* use timer 1 */
+#define CONFIG_SYS_PTV			7	/* 2^(PTV+1), divide by 256 */
+#define CONFIG_SYS_HZ			((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
 
 /*-----------------------------------------------------------------------
  * Stack sizes

+ 3 - 3
include/configs/voiceblue.h

@@ -213,9 +213,9 @@
 /* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1.
  * This time is further subdivided by a local divisor.
  */
-#define CONFIG_SYS_TIMERBASE		OMAP1510_TIMER1_BASE
-#define CONFIG_SYS_PVT			7		/* 2^(pvt+1), divide by 256 */
-#define CONFIG_SYS_HZ			((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_TIMERBASE	OMAP1510_TIMER1_BASE
+#define CONFIG_SYS_PTV		7	/* 2^(PTV+1), divide by 256 */
+#define CONFIG_SYS_HZ		((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
 
 #define OMAP5910_DPLL_DIV	1
 #define OMAP5910_DPLL_MUL	((CONFIG_SYS_CLK_FREQ * \