Merge branch 'master' of git://git.denx.de/u-boot-nand-flash

common/cmd_nand.c

@@ -160,10 +160,51 @@ out:
 	if (*size == nand->size)
 		puts("whole chip\n");
 	else
-		printf("offset 0x%lx, size 0x%x\n", *off, *size);
+		printf("offset 0x%lx, size 0x%zx\n", *off, *size);
 	return 0;
 }
 
+#ifdef CONFIG_CMD_NAND_LOCK_UNLOCK
+static void print_status(ulong start, ulong end, ulong erasesize, int status)
+{
+	printf("%08lx - %08lx: %08lx blocks %s%s%s\n",
+		start,
+		end - 1,
+		(end - start) / erasesize,
+		((status & NAND_LOCK_STATUS_TIGHT) ?  "TIGHT " : ""),
+		((status & NAND_LOCK_STATUS_LOCK) ?  "LOCK " : ""),
+		((status & NAND_LOCK_STATUS_UNLOCK) ?  "UNLOCK " : ""));
+}
+
+static void do_nand_status(nand_info_t *nand)
+{
+	ulong block_start = 0;
+	ulong off;
+	int last_status = -1;
+
+	struct nand_chip *nand_chip = nand->priv;
+	/* check the WP bit */
+	nand_chip->cmdfunc(nand, NAND_CMD_STATUS, -1, -1);
+	printf("device is %swrite protected\n",
+		(nand_chip->read_byte(nand) & 0x80 ?
+		"NOT " : ""));
+
+	for (off = 0; off < nand->size; off += nand->erasesize) {
+		int s = nand_get_lock_status(nand, off);
+
+		/* print message only if status has changed */
+		if (s != last_status && off != 0) {
+			print_status(block_start, off, nand->erasesize,
+					last_status);
+			block_start = off;
+		}
+		last_status = s;
+	}
+	/* Print the last block info */
+	print_status(block_start, off, nand->erasesize, last_status);
+}
+#endif
+
 int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 {
 	int i, dev, ret = 0;
@@ -357,7 +398,7 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 			return 1;
 		}
 
-		printf(" %d bytes %s: %s\n", size,
+		printf(" %zu bytes %s: %s\n", size,
 		       read ? "read" : "written", ret ? "ERROR" : "OK");
 
 		return ret == 0 ? 0 : 1;
@@ -383,8 +424,9 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 		return 1;
 	}
 
+#ifdef CONFIG_CMD_NAND_LOCK_UNLOCK
 	if (strcmp(cmd, "lock") == 0) {
-		int tight  = 0;
+		int tight = 0;
 		int status = 0;
 		if (argc == 3) {
 			if (!strcmp("tight", argv[2]))
@@ -392,44 +434,8 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 			if (!strcmp("status", argv[2]))
 				status = 1;
 		}
-/*
- * ! BROKEN !
- *
- * TODO: must be implemented and tested by someone with HW
- */
-#if 0
 		if (status) {
-			ulong block_start = 0;
-			ulong off;
-			int last_status = -1;
-
-			struct nand_chip *nand_chip = nand->priv;
-			/* check the WP bit */
-			nand_chip->cmdfunc (nand, NAND_CMD_STATUS, -1, -1);
-			printf("device is %swrite protected\n",
-			       (nand_chip->read_byte(nand) & 0x80 ?
-			       "NOT " : ""));
-
-			for (off = 0; off < nand->size; off += nand->writesize) {
-				int s = nand_get_lock_status(nand, off);
-
-				/* print message only if status has changed
-				 * or at end of chip
-				 */
-				if (off == nand->size - nand->writesize
-				    || (s != last_status && off != 0))	{
-
-					printf("%08lx - %08lx: %8d pages %s%s%s\n",
-					       block_start,
-					       off-1,
-					       (off-block_start)/nand->writesize,
-					       ((last_status & NAND_LOCK_STATUS_TIGHT) ? "TIGHT " : ""),
-					       ((last_status & NAND_LOCK_STATUS_LOCK) ? "LOCK " : ""),
-					       ((last_status & NAND_LOCK_STATUS_UNLOCK) ? "UNLOCK " : ""));
-				}
-
-				last_status = s;
-			}
+			do_nand_status(nand);
 		} else {
 			if (!nand_lock(nand, tight)) {
 				puts("NAND flash successfully locked\n");
@@ -438,7 +444,6 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 				return 1;
 			}
 		}
-#endif
 		return 0;
 	}
 
@@ -446,12 +451,6 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 		if (arg_off_size(argc - 2, argv + 2, nand, &off, &size) < 0)
 			return 1;
 
-/*
- * ! BROKEN !
- *
- * TODO: must be implemented and tested by someone with HW
- */
-#if 0
 		if (!nand_unlock(nand, off, size)) {
 			puts("NAND flash successfully unlocked\n");
 		} else {
@@ -459,9 +458,9 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 			     "write and erase will probably fail\n");
 			return 1;
 		}
-#endif
 		return 0;
 	}
+#endif
 
 usage:
 	printf("Usage:\n%s\n", cmdtp->usage);
@@ -483,9 +482,12 @@ U_BOOT_CMD(nand, 5, 1, do_nand,
 	   "nand scrub - really clean NAND erasing bad blocks (UNSAFE)\n"
 	   "nand markbad off - mark bad block at offset (UNSAFE)\n"
 	   "nand biterr off - make a bit error at offset (UNSAFE)\n"
+#ifdef CONFIG_CMD_NAND_LOCK_UNLOCK
 	   "nand lock [tight] [status]\n"
 	   "    bring nand to lock state or display locked pages\n"
-	   "nand unlock [offset] [size] - unlock section\n");
+	   "nand unlock [offset] [size] - unlock section\n"
+#endif
+);
 
 static int nand_load_image(cmd_tbl_t *cmdtp, nand_info_t *nand,
 			   ulong offset, ulong addr, char *cmd)
@@ -854,13 +856,12 @@ int do_nand (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 							      (u_char *) addr);
 				}
 				return ret;
-			} else if (cmdtail && !strncmp (cmdtail, ".jffs2", 2))
-				cmd |= NANDRW_JFFS2;	/* skip bad blocks */
-			else if (cmdtail && !strncmp (cmdtail, ".jffs2s", 2)) {
+			} else if (cmdtail && !strncmp (cmdtail, ".jffs2s", 7)) {
 				cmd |= NANDRW_JFFS2;	/* skip bad blocks (on read too) */
 				if (cmd & NANDRW_READ)
 					cmd |= NANDRW_JFFS2_SKIP;	/* skip bad blocks (on read too) */
-			}
+			} else if (cmdtail && !strncmp (cmdtail, ".jffs2", 2))
+				cmd |= NANDRW_JFFS2;	/* skip bad blocks */
 #ifdef SXNI855T
 			/* need ".e" same as ".j" for compatibility with older units */
 			else if (cmdtail && !strcmp (cmdtail, ".e"))

common/cmd_onenand.c

@@ -1,7 +1,7 @@
 /*
  *  U-Boot command for OneNAND support
  *
- *  Copyright (C) 2005-2007 Samsung Electronics
+ *  Copyright (C) 2005-2008 Samsung Electronics
  *  Kyungmin Park <kyungmin.park@samsung.com>
  *
  * This program is free software; you can redistribute it and/or modify
@@ -11,6 +11,7 @@
 
 #include <common.h>
 #include <command.h>
+#include <malloc.h>
 
 #include <linux/mtd/compat.h>
 #include <linux/mtd/mtd.h>
@@ -18,159 +19,468 @@
 
 #include <asm/io.h>
 
-extern struct mtd_info onenand_mtd;
-extern struct onenand_chip onenand_chip;
+static struct mtd_info *mtd;
+
+static loff_t next_ofs;
+static loff_t skip_ofs;
+
+static inline int str2long(char *p, ulong *num)
+{
+	char *endptr;
+
+	*num = simple_strtoul(p, &endptr, 16);
+	return (*p != '\0' && *endptr == '\0') ? 1 : 0;
+}
+
+static int arg_off_size(int argc, char *argv[], ulong *off, size_t *size)
+{
+	if (argc >= 1) {
+		if (!(str2long(argv[0], off))) {
+			printf("'%s' is not a number\n", argv[0]);
+			return -1;
+		}
+	} else {
+		*off = 0;
+	}
+
+	if (argc >= 2) {
+		if (!(str2long(argv[1], (ulong *)size))) {
+			printf("'%s' is not a number\n", argv[1]);
+			return -1;
+		}
+	} else {
+		*size = mtd->size - *off;
+	}
+
+	if ((*off + *size) > mtd->size) {
+		printf("total chip size (0x%x) exceeded!\n", mtd->size);
+		return -1;
+	}
+
+	if (*size == mtd->size)
+		puts("whole chip\n");
+	else
+		printf("offset 0x%lx, size 0x%x\n", *off, *size);
+
+	return 0;
+}
+
+static int onenand_block_read(loff_t from, size_t len,
+			      size_t *retlen, u_char *buf, int oob)
+{
+	struct onenand_chip *this = mtd->priv;
+	int blocks = (int) len >> this->erase_shift;
+	int blocksize = (1 << this->erase_shift);
+	loff_t ofs = from;
+	struct mtd_oob_ops ops = {
+		.retlen		= 0,
+	};
+	int ret;
+
+	if (oob)
+		ops.ooblen = blocksize;
+	else
+		ops.len = blocksize;
+
+	while (blocks) {
+		ret = mtd->block_isbad(mtd, ofs);
+		if (ret) {
+			printk("Bad blocks %d at 0x%x\n",
+			       (u32)(ofs >> this->erase_shift), (u32)ofs);
+			ofs += blocksize;
+			continue;
+		}
+
+		if (oob)
+			ops.oobbuf = buf;
+		else
+			ops.datbuf = buf;
+
+		ops.retlen = 0;
+		ret = mtd->read_oob(mtd, ofs, &ops);
+		if (ret) {
+			printk("Read failed 0x%x, %d\n", (u32)ofs, ret);
+			ofs += blocksize;
+			continue;
+		}
+		ofs += blocksize;
+		buf += blocksize;
+		blocks--;
+		*retlen += ops.retlen;
+	}
+
+	return 0;
+}
+
+static int onenand_block_write(loff_t to, size_t len,
+			       size_t *retlen, const u_char * buf)
+{
+	struct onenand_chip *this = mtd->priv;
+	int blocks = len >> this->erase_shift;
+	int blocksize = (1 << this->erase_shift);
+	loff_t ofs;
+	size_t _retlen = 0;
+	int ret;
+
+	if (to == next_ofs) {
+		next_ofs = to + len;
+		to += skip_ofs;
+	} else {
+		next_ofs = to + len;
+		skip_ofs = 0;
+	}
+	ofs = to;
+
+	while (blocks) {
+		ret = mtd->block_isbad(mtd, ofs);
+		if (ret) {
+			printk("Bad blocks %d at 0x%x\n",
+			       (u32)(ofs >> this->erase_shift), (u32)ofs);
+			skip_ofs += blocksize;
+			goto next;
+		}
+
+		ret = mtd->write(mtd, ofs, blocksize, &_retlen, buf);
+		if (ret) {
+			printk("Write failed 0x%x, %d", (u32)ofs, ret);
+			skip_ofs += blocksize;
+			goto next;
+		}
+
+		buf += blocksize;
+		blocks--;
+		*retlen += _retlen;
+next:
+		ofs += blocksize;
+	}
+
+	return 0;
+}
+
+static int onenand_block_erase(u32 start, u32 size, int force)
+{
+	struct onenand_chip *this = mtd->priv;
+	struct erase_info instr = {
+		.callback	= NULL,
+	};
+	loff_t ofs;
+	int ret;
+	int blocksize = 1 << this->erase_shift;
+
+	for (ofs = start; ofs < (start + size); ofs += blocksize) {
+		ret = mtd->block_isbad(mtd, ofs);
+		if (ret && !force) {
+			printf("Skip erase bad block %d at 0x%x\n",
+			       (u32)(ofs >> this->erase_shift), (u32)ofs);
+			continue;
+		}
+
+		instr.addr = ofs;
+		instr.len = blocksize;
+		instr.priv = force;
+		instr.mtd = mtd;
+		ret = mtd->erase(mtd, &instr);
+		if (ret) {
+			printf("erase failed block %d at 0x%x\n",
+			       (u32)(ofs >> this->erase_shift), (u32)ofs);
+			continue;
+		}
+	}
+
+	return 0;
+}
+
+static int onenand_block_test(u32 start, u32 size)
+{
+	struct onenand_chip *this = mtd->priv;
+	struct erase_info instr = {
+		.callback	= NULL,
+		.priv		= 0,
+	};
+
+	int blocks;
+	loff_t ofs;
+	int blocksize = 1 << this->erase_shift;
+	int start_block, end_block;
+	size_t retlen;
+	u_char *buf;
+	u_char *verify_buf;
+	int ret;
+
+	buf = malloc(blocksize);
+	if (!buf) {
+		printf("Not enough malloc space available!\n");
+		return -1;
+	}
+
+	verify_buf = malloc(blocksize);
+	if (!verify_buf) {
+		printf("Not enough malloc space available!\n");
+		return -1;
+	}
+
+	start_block = start >> this->erase_shift;
+	end_block = (start + size) >> this->erase_shift;
+
+	/* Protect boot-loader from badblock testing */
+	if (start_block < 2)
+		start_block = 2;
+
+	if (end_block > (mtd->size >> this->erase_shift))
+		end_block = mtd->size >> this->erase_shift;
+
+	blocks = start_block;
+	ofs = start;
+	while (blocks < end_block) {
+		printf("\rTesting block %d at 0x%x", (u32)(ofs >> this->erase_shift), (u32)ofs);
+
+		ret = mtd->block_isbad(mtd, ofs);
+		if (ret) {
+			printf("Skip erase bad block %d at 0x%x\n",
+			       (u32)(ofs >> this->erase_shift), (u32)ofs);
+			goto next;
+		}
+
+		instr.addr = ofs;
+		instr.len = blocksize;
+		ret = mtd->erase(mtd, &instr);
+		if (ret) {
+			printk("Erase failed 0x%x, %d\n", (u32)ofs, ret);
+			goto next;
+		}
+
+		ret = mtd->write(mtd, ofs, blocksize, &retlen, buf);
+		if (ret) {
+			printk("Write failed 0x%x, %d\n", (u32)ofs, ret);
+			goto next;
+		}
+
+		ret = mtd->read(mtd, ofs, blocksize, &retlen, verify_buf);
+		if (ret) {
+			printk("Read failed 0x%x, %d\n", (u32)ofs, ret);
+			goto next;
+		}
+
+		if (memcmp(buf, verify_buf, blocksize))
+			printk("\nRead/Write test failed at 0x%x\n", (u32)ofs);
+
+next:
+		ofs += blocksize;
+		blocks++;
+	}
+	printf("...Done\n");
+
+	free(buf);
+	free(verify_buf);
+
+	return 0;
+}
+
+static int onenand_dump(struct mtd_info *mtd, ulong off, int only_oob)
+{
+	int i;
+	u_char *datbuf, *oobbuf, *p;
+	struct mtd_oob_ops ops;
+	loff_t addr;
+
+	datbuf = malloc(mtd->writesize + mtd->oobsize);
+	oobbuf = malloc(mtd->oobsize);
+	if (!datbuf || !oobbuf) {
+		puts("No memory for page buffer\n");
+		return 1;
+	}
+	off &= ~(mtd->writesize - 1);
+	addr = (loff_t) off;
+	memset(&ops, 0, sizeof(ops));
+	ops.datbuf = datbuf;
+	ops.oobbuf = oobbuf; /* must exist, but oob data will be appended to ops.datbuf */
+	ops.len = mtd->writesize;
+	ops.ooblen = mtd->oobsize;
+	ops.retlen = 0;
+	i = mtd->read_oob(mtd, addr, &ops);
+	if (i < 0) {
+		printf("Error (%d) reading page %08lx\n", i, off);
+		free(datbuf);
+		free(oobbuf);
+		return 1;
+	}
+	printf("Page %08lx dump:\n", off);
+	i = mtd->writesize >> 4;
+	p = datbuf;
+
+	while (i--) {
+		if (!only_oob)
+			printf("\t%02x %02x %02x %02x %02x %02x %02x %02x"
+			       "  %02x %02x %02x %02x %02x %02x %02x %02x\n",
+			       p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7],
+			       p[8], p[9], p[10], p[11], p[12], p[13], p[14],
+			       p[15]);
+		p += 16;
+	}
+	puts("OOB:\n");
+	i = mtd->oobsize >> 3;
+	while (i--) {
+		printf("\t%02x %02x %02x %02x %02x %02x %02x %02x\n",
+		       p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7]);
+		p += 8;
+	}
+	free(datbuf);
+	free(oobbuf);
+
+	return 0;
+}
 
 int do_onenand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 {
-	int ret = 0;
+	struct onenand_chip *this;
+	int blocksize;
+	ulong addr, ofs;
+	size_t len, retlen = 0;
+	int ret;
+	char *cmd, *s;
+
+	mtd = &onenand_mtd;
+	this = mtd->priv;
+	blocksize = (1 << this->erase_shift);
+
+	cmd = argv[1];
 
 	switch (argc) {
 	case 0:
 	case 1:
-		printf("Usage:\n%s\n", cmdtp->usage);
-		return 1;
+		goto usage;
 
 	case 2:
-		if (strncmp(argv[1], "open", 4) == 0) {
-			onenand_init();
+		if (strcmp(cmd, "info") == 0) {
+			printf("%s\n", mtd->name);
+			return 0;
+		}
+
+		if (strcmp(cmd, "bad") == 0) {
+			/* Currently only one OneNAND device is supported */
+			printf("\nDevice %d bad blocks:\n", 0);
+			for (ofs = 0; ofs < mtd->size; ofs += mtd->erasesize) {
+				if (mtd->block_isbad(mtd, ofs))
+					printf("  %08x\n", (u32)ofs);
+			}
+
 			return 0;
 		}
-		printf("%s\n", onenand_mtd.name);
-		return 0;
 
 	default:
 		/* At least 4 args */
-		if (strncmp(argv[1], "erase", 5) == 0) {
-			struct erase_info instr = {
-				.callback	= NULL,
-			};
-			ulong start, end;
-			ulong block;
-			char *endtail;
-
-			if (strncmp(argv[2], "block", 5) == 0) {
-				start = simple_strtoul(argv[3], NULL, 10);
-				endtail = strchr(argv[3], '-');
-				end = simple_strtoul(endtail + 1, NULL, 10);
-			} else {
-				start = simple_strtoul(argv[2], NULL, 10);
-				end = simple_strtoul(argv[3], NULL, 10);
 
-				start >>= onenand_chip.erase_shift;
-				end >>= onenand_chip.erase_shift;
-				/* Don't include the end block */
-				end--;
-			}
+		/*
+		 * Syntax is:
+		 *   0       1     2       3    4
+		 *   onenand erase [force] [off size]
+		 */
+		if ((strcmp(cmd, "erase") == 0) || (strcmp(cmd, "test") == 0)) {
+			int force = argc > 2 && !strcmp("force", argv[2]);
+			int o = force ? 3 : 2;
+			int erase;
 
-			if (!end || end < 0)
-				end = start;
+			erase = strcmp(cmd, "erase") == 0; /* 1 = erase, 0 = test */
+			printf("\nOneNAND %s: ", erase ? "erase" : "test");
 
-			printf("Erase block from %lu to %lu\n", start, end);
+			/* skip first two or three arguments, look for offset and size */
+			if (arg_off_size(argc - o, argv + o, &ofs, &len) != 0)
+				return 1;
 
-			for (block = start; block <= end; block++) {
-				instr.addr = block << onenand_chip.erase_shift;
-				instr.len = 1 << onenand_chip.erase_shift;
-				ret = onenand_erase(&onenand_mtd, &instr);
-				if (ret) {
-					printf("erase failed %lu\n", block);
-					break;
-				}
-			}
+			if (erase)
+				ret = onenand_block_erase(ofs, len, force);
+			else
+				ret = onenand_block_test(ofs, len);
 
-			return 0;
+			printf("%s\n", ret ? "ERROR" : "OK");
+
+			return ret == 0 ? 0 : 1;
 		}
 
-		if (strncmp(argv[1], "read", 4) == 0) {
-			ulong addr = simple_strtoul(argv[2], NULL, 16);
-			ulong ofs = simple_strtoul(argv[3], NULL, 16);
-			size_t len = simple_strtoul(argv[4], NULL, 16);
-			int oob = strncmp(argv[1], "read.oob", 8) ? 0 : 1;
-			struct mtd_oob_ops ops;
+		if (strncmp(cmd, "read", 4) == 0 || strncmp(cmd, "write", 5) == 0) {
+			int read;
+			int oob = 0;
 
-			ops.mode = MTD_OOB_PLACE;
+			if (argc < 4)
+				goto usage;
 
-			if (oob) {
-				ops.len = 0;
-				ops.datbuf = NULL;
-				ops.ooblen = len;
-				ops.oobbuf = (u_char *) addr;
-			} else {
-				ops.len = len;
-				ops.datbuf = (u_char *) addr;
-				ops.ooblen = 0;
-				ops.oobbuf = NULL;
-			}
-			ops.retlen = ops.oobretlen = 0;
+			addr = (ulong)simple_strtoul(argv[2], NULL, 16);
 
-			onenand_mtd.read_oob(&onenand_mtd, ofs, &ops);
-			printf("Done\n");
+			read = strncmp(cmd, "read", 4) == 0; /* 1 = read, 0 = write */
+			printf("\nOneNAND %s: ", read ? "read" : "write");
+			if (arg_off_size(argc - 3, argv + 3, &ofs, &len) != 0)
+				return 1;
 
-			return 0;
-		}
+			s = strchr(cmd, '.');
+			if ((s != NULL) && (!strcmp(s, ".oob")))
+				oob = 1;
 
-		if (strncmp(argv[1], "write", 5) == 0) {
-			ulong addr = simple_strtoul(argv[2], NULL, 16);
-			ulong ofs = simple_strtoul(argv[3], NULL, 16);
-			size_t len = simple_strtoul(argv[4], NULL, 16);
-			size_t retlen = 0;
+			if (read) {
+				ret = onenand_block_read(ofs, len, &retlen,
+							 (u8 *)addr, oob);
+			} else {
+				ret = onenand_block_write(ofs, len, &retlen,
+							  (u8 *)addr);
+			}
 
-			onenand_write(&onenand_mtd, ofs, len, &retlen,
-				      (u_char *) addr);
-			printf("Done\n");
+			printf(" %d bytes %s: %s\n", retlen,
+			       read ? "read" : "written", ret ? "ERROR" : "OK");
 
-			return 0;
+			return ret == 0 ? 0 : 1;
 		}
 
-		if (strncmp(argv[1], "block", 5) == 0) {
-			ulong addr = simple_strtoul(argv[2], NULL, 16);
-			ulong block = simple_strtoul(argv[3], NULL, 10);
-			ulong page = simple_strtoul(argv[4], NULL, 10);
-			size_t len = simple_strtol(argv[5], NULL, 10);
-			ulong ofs;
-			int oob = strncmp(argv[1], "block.oob", 9) ? 0 : 1;
-			struct mtd_oob_ops ops;
-
-			ops.mode = MTD_OOB_PLACE;
+		if (strcmp(cmd, "markbad") == 0) {
+			addr = (ulong)simple_strtoul(argv[2], NULL, 16);
 
+			int ret = mtd->block_markbad(mtd, addr);
+			if (ret == 0) {
+				printf("block 0x%08lx successfully marked as bad\n",
+						(ulong) addr);
+				return 0;
+			} else {
+				printf("block 0x%08lx NOT marked as bad! ERROR %d\n",
+						(ulong) addr, ret);
+			}
+			return 1;
+		}
 
-			ofs = block << onenand_chip.erase_shift;
-			if (page)
-				ofs += page << onenand_chip.page_shift;
+		if (strncmp(cmd, "dump", 4) == 0) {
+			if (argc < 3)
+				goto usage;
 
-			if (!len) {
-				if (oob)
-					ops.ooblen = 64;
-				else
-					ops.len = 512;
-			}
+			s = strchr(cmd, '.');
+			ofs = (int)simple_strtoul(argv[2], NULL, 16);
 
-			if (oob) {
-				ops.datbuf = NULL;
-				ops.oobbuf = (u_char *) addr;
-			} else {
-				ops.datbuf = (u_char *) addr;
-				ops.oobbuf = NULL;
-			}
-			ops.retlen = ops.oobretlen = 0;
+			if (s != NULL && strcmp(s, ".oob") == 0)
+				ret = onenand_dump(mtd, ofs, 1);
+			else
+				ret = onenand_dump(mtd, ofs, 0);
 
-			onenand_read_oob(&onenand_mtd, ofs, &ops);
-			return 0;
+			return ret == 0 ? 1 : 0;
 		}
 
 		break;
 	}
 
 	return 0;
+
+usage:
+	printf("Usage:\n%s\n", cmdtp->usage);
+	return 1;
 }
 
 U_BOOT_CMD(
 	onenand,	6,	1,	do_onenand,
 	"onenand - OneNAND sub-system\n",
-	"info   - show available OneNAND devices\n"
-	"onenand read[.oob] addr ofs len - read data at ofs with len to addr\n"
-	"onenand write addr ofs len - write data at ofs with len from addr\n"
-	"onenand erase saddr eaddr - erase block start addr to end addr\n"
-	"onenand block[.oob] addr block [page] [len] - "
-		"read data with (block [, page]) to addr"
+	"info - show available OneNAND devices\n"
+	"onenand bad - show bad blocks\n"
+	"onenand read[.oob] addr off size\n"
+	"onenand write[.oob] addr off size\n"
+	"    read/write 'size' bytes starting at offset 'off'\n"
+	"    to/from memory address 'addr', skipping bad blocks.\n"
+	"onenand erase [force] [off size] - erase 'size' bytes from\n"
+	"onenand test [off size] - test 'size' bytes from\n"
+	"    offset 'off' (entire device if not specified)\n"
+	"onenand dump[.oob] off - dump page\n"
+	"onenand markbad off - mark bad block at offset (UNSAFE)\n"
 );

doc/README.nand

@@ -172,7 +172,7 @@ More Definitions:
    #define ADDR_COLUMN_PAGE 3
    #define NAND_ChipID_UNKNOWN 0x00
    #define NAND_MAX_FLOORS 1
-   #define NAND_MAX_CHIPS 1
+   #define CONFIG_SYS_NAND_MAX_CHIPS 1
 
    #define CONFIG_SYS_DAVINCI_BROKEN_ECC
       Versions of U-Boot <= 1.3.3 and Montavista Linux kernels

drivers/mtd/nand/nand.c

@@ -36,8 +36,6 @@ static ulong base_address[CONFIG_SYS_MAX_NAND_DEVICE] = CONFIG_SYS_NAND_BASE_LIS
 
 static const char default_nand_name[] = "nand";
 
-extern int board_nand_init(struct nand_chip *nand);
-
 static void nand_init_chip(struct mtd_info *mtd, struct nand_chip *nand,
 			   ulong base_addr)
 {

drivers/mtd/nand/nand_base.c

@@ -2144,7 +2144,7 @@ int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
 {
 	int page, len, status, pages_per_block, ret, chipnr;
 	struct nand_chip *chip = mtd->priv;
-	int rewrite_bbt[NAND_MAX_CHIPS]={0};
+	int rewrite_bbt[CONFIG_SYS_NAND_MAX_CHIPS]={0};
 	unsigned int bbt_masked_page = 0xffffffff;
 
 	MTDDEBUG (MTD_DEBUG_LEVEL3, "nand_erase: start = 0x%08x, len = %i\n",

drivers/mtd/nand/nand_util.c

@@ -238,7 +238,8 @@ static struct nand_ecclayout autoplace_ecclayout = {
 #endif
 
 /* XXX U-BOOT XXX */
-#if 0
+#ifdef CONFIG_CMD_NAND_LOCK_UNLOCK
+
 /******************************************************************************
  * Support for locking / unlocking operations of some NAND devices
  *****************************************************************************/
@@ -253,7 +254,7 @@ static struct nand_ecclayout autoplace_ecclayout = {
  * nand_lock: Set all pages of NAND flash chip to the LOCK or LOCK-TIGHT
  *	      state
  *
- * @param meminfo	nand mtd instance
+ * @param mtd		nand mtd instance
  * @param tight		bring device in lock tight mode
  *
  * @return		0 on success, -1 in case of error
@@ -270,21 +271,21 @@ static struct nand_ecclayout autoplace_ecclayout = {
  *   calls will fail. It is only posible to leave lock-tight state by
  *   an hardware signal (low pulse on _WP pin) or by power down.
  */
-int nand_lock(nand_info_t *meminfo, int tight)
+int nand_lock(struct mtd_info *mtd, int tight)
 {
 	int ret = 0;
 	int status;
-	struct nand_chip *this = meminfo->priv;
+	struct nand_chip *chip = mtd->priv;
 
 	/* select the NAND device */
-	this->select_chip(meminfo, 0);
+	chip->select_chip(mtd, 0);
 
-	this->cmdfunc(meminfo,
+	chip->cmdfunc(mtd,
 		      (tight ? NAND_CMD_LOCK_TIGHT : NAND_CMD_LOCK),
 		      -1, -1);
 
 	/* call wait ready function */
-	status = this->waitfunc(meminfo, this, FL_WRITING);
+	status = chip->waitfunc(mtd, chip);
 
 	/* see if device thinks it succeeded */
 	if (status & 0x01) {
@@ -292,7 +293,7 @@ int nand_lock(nand_info_t *meminfo, int tight)
 	}
 
 	/* de-select the NAND device */
-	this->select_chip(meminfo, -1);
+	chip->select_chip(mtd, -1);
 	return ret;
 }
 
@@ -300,7 +301,7 @@ int nand_lock(nand_info_t *meminfo, int tight)
  * nand_get_lock_status: - query current lock state from one page of NAND
  *			   flash
  *
- * @param meminfo	nand mtd instance
+ * @param mtd		nand mtd instance
  * @param offset	page address to query (muss be page aligned!)
  *
  * @return		-1 in case of error
@@ -311,19 +312,19 @@ int nand_lock(nand_info_t *meminfo, int tight)
  *			  NAND_LOCK_STATUS_UNLOCK: page unlocked
  *
  */
-int nand_get_lock_status(nand_info_t *meminfo, ulong offset)
+int nand_get_lock_status(struct mtd_info *mtd, ulong offset)
 {
 	int ret = 0;
 	int chipnr;
 	int page;
-	struct nand_chip *this = meminfo->priv;
+	struct nand_chip *chip = mtd->priv;
 
 	/* select the NAND device */
-	chipnr = (int)(offset >> this->chip_shift);
-	this->select_chip(meminfo, chipnr);
+	chipnr = (int)(offset >> chip->chip_shift);
+	chip->select_chip(mtd, chipnr);
 
 
-	if ((offset & (meminfo->writesize - 1)) != 0) {
+	if ((offset & (mtd->writesize - 1)) != 0) {
 		printf ("nand_get_lock_status: "
 			"Start address must be beginning of "
 			"nand page!\n");
@@ -332,16 +333,16 @@ int nand_get_lock_status(nand_info_t *meminfo, ulong offset)
 	}
 
 	/* check the Lock Status */
-	page = (int)(offset >> this->page_shift);
-	this->cmdfunc(meminfo, NAND_CMD_LOCK_STATUS, -1, page & this->pagemask);
+	page = (int)(offset >> chip->page_shift);
+	chip->cmdfunc(mtd, NAND_CMD_LOCK_STATUS, -1, page & chip->pagemask);
 
-	ret = this->read_byte(meminfo) & (NAND_LOCK_STATUS_TIGHT
+	ret = chip->read_byte(mtd) & (NAND_LOCK_STATUS_TIGHT
 					  | NAND_LOCK_STATUS_LOCK
 					  | NAND_LOCK_STATUS_UNLOCK);
 
  out:
 	/* de-select the NAND device */
-	this->select_chip(meminfo, -1);
+	chip->select_chip(mtd, -1);
 	return ret;
 }
 
@@ -349,59 +350,65 @@ int nand_get_lock_status(nand_info_t *meminfo, ulong offset)
  * nand_unlock: - Unlock area of NAND pages
  *		  only one consecutive area can be unlocked at one time!
  *
- * @param meminfo	nand mtd instance
+ * @param mtd		nand mtd instance
  * @param start		start byte address
  * @param length	number of bytes to unlock (must be a multiple of
  *			page size nand->writesize)
  *
  * @return		0 on success, -1 in case of error
  */
-int nand_unlock(nand_info_t *meminfo, ulong start, ulong length)
+int nand_unlock(struct mtd_info *mtd, ulong start, ulong length)
 {
 	int ret = 0;
 	int chipnr;
 	int status;
 	int page;
-	struct nand_chip *this = meminfo->priv;
+	struct nand_chip *chip = mtd->priv;
 	printf ("nand_unlock: start: %08x, length: %d!\n",
 		(int)start, (int)length);
 
 	/* select the NAND device */
-	chipnr = (int)(start >> this->chip_shift);
-	this->select_chip(meminfo, chipnr);
+	chipnr = (int)(start >> chip->chip_shift);
+	chip->select_chip(mtd, chipnr);
 
 	/* check the WP bit */
-	this->cmdfunc(meminfo, NAND_CMD_STATUS, -1, -1);
-	if ((this->read_byte(meminfo) & 0x80) == 0) {
+	chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
+	if (!(chip->read_byte(mtd) & NAND_STATUS_WP)) {
 		printf ("nand_unlock: Device is write protected!\n");
 		ret = -1;
 		goto out;
 	}
 
-	if ((start & (meminfo->writesize - 1)) != 0) {
+	if ((start & (mtd->erasesize - 1)) != 0) {
 		printf ("nand_unlock: Start address must be beginning of "
-			"nand page!\n");
+			"nand block!\n");
 		ret = -1;
 		goto out;
 	}
 
-	if (length == 0 || (length & (meminfo->writesize - 1)) != 0) {
-		printf ("nand_unlock: Length must be a multiple of nand page "
-			"size!\n");
+	if (length == 0 || (length & (mtd->erasesize - 1)) != 0) {
+		printf ("nand_unlock: Length must be a multiple of nand block "
+			"size %08x!\n", mtd->erasesize);
 		ret = -1;
 		goto out;
 	}
 
+	/*
+	 * Set length so that the last address is set to the
+	 * starting address of the last block
+	 */
+	length -= mtd->erasesize;
+
 	/* submit address of first page to unlock */
-	page = (int)(start >> this->page_shift);
-	this->cmdfunc(meminfo, NAND_CMD_UNLOCK1, -1, page & this->pagemask);
+	page = (int)(start >> chip->page_shift);
+	chip->cmdfunc(mtd, NAND_CMD_UNLOCK1, -1, page & chip->pagemask);
 
 	/* submit ADDRESS of LAST page to unlock */
-	page += (int)(length >> this->page_shift) - 1;
-	this->cmdfunc(meminfo, NAND_CMD_UNLOCK2, -1, page & this->pagemask);
+	page += (int)(length >> chip->page_shift);
+	chip->cmdfunc(mtd, NAND_CMD_UNLOCK2, -1, page & chip->pagemask);
 
 	/* call wait ready function */
-	status = this->waitfunc(meminfo, this, FL_WRITING);
+	status = chip->waitfunc(mtd, chip);
 	/* see if device thinks it succeeded */
 	if (status & 0x01) {
 		/* there was an error */
@@ -411,7 +418,7 @@ int nand_unlock(nand_info_t *meminfo, ulong start, ulong length)
 
  out:
 	/* de-select the NAND device */
-	this->select_chip(meminfo, -1);
+	chip->select_chip(mtd, -1);
 	return ret;
 }
 #endif
@@ -488,7 +495,7 @@ int nand_write_skip_bad(nand_info_t *nand, size_t offset, size_t *length,
 	if (len_incl_bad == *length) {
 		rval = nand_write (nand, offset, length, buffer);
 		if (rval != 0)
-			printf ("NAND write to offset %x failed %d\n",
+			printf ("NAND write to offset %zx failed %d\n",
 				offset, rval);
 
 		return rval;
@@ -499,7 +506,7 @@ int nand_write_skip_bad(nand_info_t *nand, size_t offset, size_t *length,
 		size_t write_size;
 
 		if (nand_block_isbad (nand, offset & ~(nand->erasesize - 1))) {
-			printf ("Skip bad block 0x%08x\n",
+			printf ("Skip bad block 0x%08zx\n",
 				offset & ~(nand->erasesize - 1));
 			offset += nand->erasesize - block_offset;
 			continue;
@@ -512,7 +519,7 @@ int nand_write_skip_bad(nand_info_t *nand, size_t offset, size_t *length,
 
 		rval = nand_write (nand, offset, &write_size, p_buffer);
 		if (rval != 0) {
-			printf ("NAND write to offset %x failed %d\n",
+			printf ("NAND write to offset %zx failed %d\n",
 				offset, rval);
 			*length -= left_to_write;
 			return rval;
@@ -558,7 +565,7 @@ int nand_read_skip_bad(nand_info_t *nand, size_t offset, size_t *length,
 	if (len_incl_bad == *length) {
 		rval = nand_read (nand, offset, length, buffer);
 		if (rval != 0)
-			printf ("NAND read from offset %x failed %d\n",
+			printf ("NAND read from offset %zx failed %d\n",
 				offset, rval);
 
 		return rval;
@@ -569,7 +576,7 @@ int nand_read_skip_bad(nand_info_t *nand, size_t offset, size_t *length,
 		size_t read_length;
 
 		if (nand_block_isbad (nand, offset & ~(nand->erasesize - 1))) {
-			printf ("Skipping bad block 0x%08x\n",
+			printf ("Skipping bad block 0x%08zx\n",
 				offset & ~(nand->erasesize - 1));
 			offset += nand->erasesize - block_offset;
 			continue;
@@ -582,7 +589,7 @@ int nand_read_skip_bad(nand_info_t *nand, size_t offset, size_t *length,
 
 		rval = nand_read (nand, offset, &read_length, p_buffer);
 		if (rval != 0) {
-			printf ("NAND read from offset %x failed %d\n",
+			printf ("NAND read from offset %zx failed %d\n",
 				offset, rval);
 			*length -= left_to_read;
 			return rval;

drivers/mtd/nand_legacy/nand_legacy.c

@@ -457,7 +457,7 @@ static void NanD_ScanChips(struct nand_chip *nand)
 {
 	int floor, chip;
 	int numchips[NAND_MAX_FLOORS];
-	int maxchips = NAND_MAX_CHIPS;
+	int maxchips = CONFIG_SYS_NAND_MAX_CHIPS;
 	int ret = 1;
 
 	nand->numchips = 0;

drivers/mtd/onenand/onenand_bbt.c

@@ -3,7 +3,7 @@
  *
  *  Bad Block Table support for the OneNAND driver
  *
- *  Copyright(c) 2005-2007 Samsung Electronics
+ *  Copyright(c) 2005-2008 Samsung Electronics
  *  Kyungmin Park <kyungmin.park@samsung.com>
  *
  *  TODO:
@@ -54,7 +54,7 @@ static int check_short_pattern(uint8_t * buf, int len, int paglen,
  * @param buf		temporary buffer
  * @param bd		descriptor for the good/bad block search pattern
  * @param chip		create the table for a specific chip, -1 read all chips.
- *		Applies only if NAND_BBT_PERCHIP option is set
+ *              Applies only if NAND_BBT_PERCHIP option is set
  *
  * Create a bad block table by scanning the device
  * for the given good/bad block identify pattern
@@ -156,8 +156,8 @@ static int onenand_isbad_bbt(struct mtd_info *mtd, loff_t offs, int allowbbt)
 	res = (bbm->bbt[block >> 3] >> (block & 0x06)) & 0x03;
 
 	MTDDEBUG (MTD_DEBUG_LEVEL2,
-		  "onenand_isbad_bbt: bbt info for offs 0x%08x: (block %d) 0x%02x\n",
-		  (unsigned int)offs, block >> 1, res);
+		"onenand_isbad_bbt: bbt info for offs 0x%08x: (block %d) 0x%02x\n",
+		(unsigned int)offs, block >> 1, res);
 
 	switch ((int)res) {
 	case 0x00:

drivers/mtd/onenand/onenand_uboot.c

@@ -26,9 +26,17 @@ void onenand_init(void)
 	memset(&onenand_mtd, 0, sizeof(struct mtd_info));
 	memset(&onenand_chip, 0, sizeof(struct onenand_chip));
 
-	onenand_chip.base = (void *) CONFIG_SYS_ONENAND_BASE;
 	onenand_mtd.priv = &onenand_chip;
 
+#ifdef CONFIG_USE_ONENAND_BOARD_INIT
+	/*
+	 * It's used for some board init required
+	 */
+	onenand_board_init(&onenand_mtd);
+#else
+	onenand_chip.base = (void *) CONFIG_SYS_ONENAND_BASE;
+#endif
+
 	onenand_scan(&onenand_mtd, 1);
 
 	puts("OneNAND: ");

include/configs/ASH405.h

@@ -150,7 +150,6 @@
  *-----------------------------------------------------------------------
  */
 #define CONFIG_SYS_NAND_BASE_LIST	{ CONFIG_SYS_NAND_BASE }
-#define NAND_MAX_CHIPS          1
 #define CONFIG_SYS_MAX_NAND_DEVICE	1         /* Max number of NAND devices */
 #define NAND_BIG_DELAY_US	25
 

include/configs/CATcenter.h

@@ -219,7 +219,6 @@
 
 #define NAND_ChipID_UNKNOWN	0x00
 #define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
 
 #define CONFIG_SYS_NAND0_CE  (0x80000000 >> 1)	 /* our CE is GPIO1 */
 #define CONFIG_SYS_NAND0_CLE (0x80000000 >> 2)	 /* our CLE is GPIO2 */

include/configs/CMS700.h

@@ -157,7 +157,6 @@
  *-----------------------------------------------------------------------
  */
 #define CONFIG_SYS_NAND_BASE_LIST	{ CONFIG_SYS_NAND_BASE }
-#define NAND_MAX_CHIPS          1
 #define CONFIG_SYS_MAX_NAND_DEVICE	1         /* Max number of NAND devices */
 #define NAND_BIG_DELAY_US	25
 

include/configs/DU440.h

@@ -411,7 +411,6 @@ int du440_phy_addr(int devnum);
  * NAND FLASH
  */
 #define CONFIG_SYS_MAX_NAND_DEVICE	2
-#define NAND_MAX_CHIPS		CONFIG_SYS_MAX_NAND_DEVICE
 #define CONFIG_SYS_NAND_SELECT_DEVICE  1	/* nand driver supports mutipl. chips */
 #define CONFIG_SYS_NAND_BASE_LIST	{CONFIG_SYS_NAND0_ADDR + CONFIG_SYS_NAND0_CS, \
 				 CONFIG_SYS_NAND1_ADDR + CONFIG_SYS_NAND1_CS}

include/configs/G2000.h

@@ -205,7 +205,6 @@
 
 #define NAND_ChipID_UNKNOWN	0x00
 #define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
 
 #define CONFIG_SYS_NAND_CE  (0x80000000 >> 1)	/* our CE is GPIO1 */
 #define CONFIG_SYS_NAND_CLE (0x80000000 >> 2)	/* our CLE is GPIO2 */

include/configs/HH405.h

@@ -209,7 +209,6 @@
  *-----------------------------------------------------------------------
  */
 #define CONFIG_SYS_NAND_BASE_LIST	{ CONFIG_SYS_NAND_BASE }
-#define NAND_MAX_CHIPS          1
 #define CONFIG_SYS_MAX_NAND_DEVICE	1         /* Max number of NAND devices */
 #define NAND_BIG_DELAY_US	25
 

include/configs/HUB405.h

@@ -149,7 +149,6 @@
  *-----------------------------------------------------------------------
  */
 #define CONFIG_SYS_NAND_BASE_LIST	{ CONFIG_SYS_NAND_BASE }
-#define NAND_MAX_CHIPS          1
 #define CONFIG_SYS_MAX_NAND_DEVICE	1         /* Max number of NAND devices */
 #define NAND_BIG_DELAY_US	25
 

include/configs/IDS8247.h

@@ -275,7 +275,6 @@
 
 #define NAND_ChipID_UNKNOWN     0x00
 #define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
 
 #define NAND_DISABLE_CE(nand) do \
 { \

include/configs/M5329EVB.h

@@ -215,7 +215,6 @@
 #	define CONFIG_SYS_NAND_BASE		CONFIG_SYS_CS2_BASE
 #	define CONFIG_SYS_NAND_SIZE		1
 #	define CONFIG_SYS_NAND_BASE_LIST	{ CONFIG_SYS_NAND_BASE }
-#	define NAND_MAX_CHIPS		1
 #	define NAND_ALLOW_ERASE_ALL	1
 #	define CONFIG_JFFS2_NAND	1
 #	define CONFIG_JFFS2_DEV		"nand0"

include/configs/M5373EVB.h

@@ -215,7 +215,6 @@
 #	define CONFIG_SYS_NAND_BASE		CONFIG_SYS_CS2_BASE
 #	define CONFIG_SYS_NAND_SIZE		1
 #	define CONFIG_SYS_NAND_BASE_LIST	{ CONFIG_SYS_NAND_BASE }
-#	define NAND_MAX_CHIPS		1
 #	define NAND_ALLOW_ERASE_ALL	1
 #	define CONFIG_JFFS2_NAND	1
 #	define CONFIG_JFFS2_DEV		"nand0"

include/configs/MPC8313ERDB.h

@@ -232,7 +232,6 @@
 #endif
 
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define NAND_MAX_CHIPS		1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
 #define CONFIG_CMD_NAND 1
 #define CONFIG_NAND_FSL_ELBC 1

include/configs/MPC8315ERDB.h

@@ -166,7 +166,7 @@
 #undef CONFIG_SYS_RAMBOOT
 #endif
 
-#define CONFIG_SYS_MONITOR_LEN		(256 * 1024) /* Reserve 256 kB for Mon */
+#define CONFIG_SYS_MONITOR_LEN		(384 * 1024) /* Reserve 384 kB for Mon */
 #define CONFIG_SYS_MALLOC_LEN		(512 * 1024) /* Reserved for malloc */
 
 /*
@@ -223,15 +223,16 @@
  */
 #define CONFIG_SYS_NAND_BASE		0xE0600000	/* 0xE0600000 */
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define NAND_MAX_CHIPS		1
-#define CONFIG_MTD_NAND_VERIFY_WRITE
+#define CONFIG_MTD_NAND_VERIFY_WRITE	1
+#define CONFIG_CMD_NAND			1
+#define CONFIG_NAND_FSL_ELBC		1
 
-#define CONFIG_SYS_BR1_PRELIM		( CONFIG_SYS_NAND_BASE \
+#define CONFIG_SYS_BR1_PRELIM	( CONFIG_SYS_NAND_BASE \
 				| (2<<BR_DECC_SHIFT)	/* Use HW ECC */ \
 				| BR_PS_8		/* Port Size = 8 bit */ \
 				| BR_MS_FCM		/* MSEL = FCM */ \
 				| BR_V )		/* valid */
-#define CONFIG_SYS_OR1_PRELIM		( 0xFFFF8000		/* length 32K */ \
+#define CONFIG_SYS_OR1_PRELIM	( 0xFFFF8000		/* length 32K */ \
 				| OR_FCM_CSCT \
 				| OR_FCM_CST \
 				| OR_FCM_CHT \

include/configs/MPC8360ERDK.h

@@ -211,7 +211,6 @@
 #define CONFIG_CMD_NAND		1
 #define CONFIG_NAND_FSL_UPM	1
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define NAND_MAX_CHIPS		1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
 
 #define CONFIG_SYS_LBLAWBAR1_PRELIM	CONFIG_SYS_NAND_BASE

include/configs/MPC837XEMDS.h

@@ -271,7 +271,6 @@
 #define CONFIG_CMD_NAND		1
 #define CONFIG_MTD_NAND_VERIFY_WRITE	1
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define NAND_MAX_CHIPS		1
 #define CONFIG_NAND_FSL_ELBC 	1
 
 #define CONFIG_SYS_NAND_BASE		0xE0600000	/* 0xE0600000 */

include/configs/MPC8536DS.h

@@ -248,7 +248,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 				CONFIG_SYS_NAND_BASE + 0x80000, \
 				CONFIG_SYS_NAND_BASE + 0xC0000}
 #define CONFIG_SYS_MAX_NAND_DEVICE	4
-#define NAND_MAX_CHIPS		1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
 #define CONFIG_CMD_NAND		1
 #define CONFIG_NAND_FSL_ELBC	1

include/configs/MPC8572DS.h

@@ -267,7 +267,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 				CONFIG_SYS_NAND_BASE + 0x80000,\
 				CONFIG_SYS_NAND_BASE + 0xC0000}
 #define CONFIG_SYS_MAX_NAND_DEVICE    4
-#define NAND_MAX_CHIPS		1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
 #define CONFIG_CMD_NAND		1
 #define CONFIG_NAND_FSL_ELBC	1

include/configs/NC650.h

@@ -250,7 +250,6 @@
  * NAND flash support
  */
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define NAND_MAX_CHIPS		1
 
 /*-----------------------------------------------------------------------
  * SYPCR - System Protection Control					11-9

include/configs/NETPHONE.h

@@ -514,7 +514,6 @@
 #define ADDR_COLUMN_PAGE	3
 #define NAND_ChipID_UNKNOWN	0x00
 #define NAND_MAX_FLOORS		1
-#define NAND_MAX_CHIPS		1
 
 /* ALE = PD17, CLE = PE18, CE = PE20, F_RY_BY = PE31 */
 #define NAND_DISABLE_CE(nand) \

include/configs/NETTA.h

@@ -633,7 +633,6 @@
 #define ADDR_COLUMN_PAGE	3
 #define NAND_ChipID_UNKNOWN	0x00
 #define NAND_MAX_FLOORS		1
-#define NAND_MAX_CHIPS		1
 
 /* ALE = PD3, CLE = PD4, CE = PD5, F_RY_BY = PC13 */
 #define NAND_DISABLE_CE(nand) \

include/configs/NETTA2.h

@@ -515,7 +515,6 @@
 #define ADDR_COLUMN_PAGE	3
 #define NAND_ChipID_UNKNOWN	0x00
 #define NAND_MAX_FLOORS		1
-#define NAND_MAX_CHIPS		1
 
 /* ALE = PD17, CLE = PE18, CE = PE20, F_RY_BY = PE31 */
 #define NAND_DISABLE_CE(nand) \

include/configs/NETVIA.h

@@ -411,7 +411,6 @@
 #define ADDR_COLUMN_PAGE	3
 #define NAND_ChipID_UNKNOWN	0x00
 #define NAND_MAX_FLOORS		1
-#define NAND_MAX_CHIPS		1
 
 #define NAND_DISABLE_CE(nand) \
 	do { \

include/configs/PLU405.h

@@ -173,7 +173,6 @@
  * NAND-FLASH stuff
  */
 #define CONFIG_SYS_NAND_BASE_LIST	{CONFIG_SYS_NAND_BASE}
-#define NAND_MAX_CHIPS          1
 #define CONFIG_SYS_MAX_NAND_DEVICE	1         /* Max number of NAND devices */
 #define NAND_BIG_DELAY_US	25
 

include/configs/PMC440.h

@@ -505,7 +505,6 @@
  * NAND FLASH
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define NAND_MAX_CHIPS		1
 #define CONFIG_SYS_NAND_BASE		(CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS)
 #define CONFIG_SYS_NAND_SELECT_DEVICE	1 /* nand driver supports mutipl. chips */
 #define CONFIG_SYS_NAND_QUIET_TEST	1

include/configs/PPChameleonEVB.h

@@ -224,8 +224,6 @@
 #define NAND_BIG_DELAY_US	25
 #define CONFIG_SYS_MAX_NAND_DEVICE	2	/* Max number of NAND devices */
 
-#define NAND_MAX_CHIPS 1
-
 #define CONFIG_SYS_NAND0_CE  (0x80000000 >> 1)	 /* our CE is GPIO1 */
 #define CONFIG_SYS_NAND0_RDY (0x80000000 >> 4)	 /* our RDY is GPIO4 */
 #define CONFIG_SYS_NAND0_CLE (0x80000000 >> 2)	 /* our CLE is GPIO2 */

include/configs/SXNI855T.h

@@ -206,7 +206,6 @@
 
 #define NAND_ChipID_UNKNOWN	0x00
 #define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
 
 /* DFBUSY is available on Port C, bit 12; 0 if busy */
 #define NAND_WAIT_READY(nand)	\

include/configs/TQM8272.h

@@ -424,7 +424,6 @@
 #define CONFIG_SYS_NAND3_BASE (CONFIG_SYS_NAND2_BASE + CONFIG_SYS_NAND_CS_DIST)
 
 #define CONFIG_SYS_MAX_NAND_DEVICE     4       /* Max number of NAND devices           */
-#define NAND_MAX_CHIPS 1
 
 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND0_BASE, \
 			     CONFIG_SYS_NAND1_BASE, \

include/configs/TQM85xx.h

@@ -363,7 +363,6 @@
 #define CONFIG_SYS_NAND3_BASE		(CONFIG_SYS_NAND2_BASE + CONFIG_SYS_NAND_CS_DIST)
 
 #define CONFIG_SYS_MAX_NAND_DEVICE     2	/* Max number of NAND devices	*/
-#define NAND_MAX_CHIPS		1
 
 #if (CONFIG_SYS_MAX_NAND_DEVICE == 1)
 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND0_BASE }

include/configs/VCMA9.h

@@ -264,7 +264,6 @@
 
 #define NAND_ChipID_UNKNOWN	0x00
 #define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
 
 #define NAND_WAIT_READY(nand)	NF_WaitRB()
 

include/configs/VOH405.h

@@ -159,7 +159,6 @@
  *-----------------------------------------------------------------------
  */
 #define CONFIG_SYS_NAND_BASE_LIST	{ CONFIG_SYS_NAND_BASE }
-#define NAND_MAX_CHIPS          1
 #define CONFIG_SYS_MAX_NAND_DEVICE	1         /* Max number of NAND devices */
 #define NAND_BIG_DELAY_US	25
 

include/configs/WUH405.h

@@ -147,7 +147,6 @@
  *-----------------------------------------------------------------------
  */
 #define CONFIG_SYS_NAND_BASE_LIST	{ CONFIG_SYS_NAND_BASE }
-#define NAND_MAX_CHIPS          1
 #define CONFIG_SYS_MAX_NAND_DEVICE	1         /* Max number of NAND devices */
 #define NAND_BIG_DELAY_US	25
 

include/configs/acadia.h

@@ -262,7 +262,6 @@
  * NAND FLASH
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define NAND_MAX_CHIPS		1
 #define CONFIG_SYS_NAND_BASE		(CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS)
 #define CONFIG_SYS_NAND_SELECT_DEVICE  1	/* nand driver supports mutipl. chips	*/
 

include/configs/afeb9260.h

@@ -97,7 +97,6 @@
 #define DATAFLASH_TCHS			(0x1 << 24)
 
 /* NAND flash */
-#define NAND_MAX_CHIPS			1
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_SYS_NAND_BASE			0x40000000
 #define CONFIG_SYS_NAND_DBW_8			1

include/configs/alpr.h

@@ -335,7 +335,6 @@
  * NAND-FLASH stuff
  *-----------------------------------------------------------------------*/
 #define CONFIG_SYS_MAX_NAND_DEVICE	4
-#define NAND_MAX_CHIPS		CONFIG_SYS_MAX_NAND_DEVICE
 #define CONFIG_SYS_NAND_BASE		0xF0000000	/* NAND FLASH Base Address	*/
 #define CONFIG_SYS_NAND_BASE_LIST	{ CONFIG_SYS_NAND_BASE + 0, CONFIG_SYS_NAND_BASE + 2,	\
 				  CONFIG_SYS_NAND_BASE + 4, CONFIG_SYS_NAND_BASE + 6 }

include/configs/at91cap9adk.h

@@ -118,7 +118,6 @@
 #define CONFIG_SYS_MAX_FLASH_BANKS		1
 
 /* NAND flash */
-#define NAND_MAX_CHIPS			1
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_SYS_NAND_BASE			0x40000000
 #define CONFIG_SYS_NAND_DBW_8			1

include/configs/at91rm9200dk.h

@@ -129,7 +129,6 @@
 
 #define NAND_ChipID_UNKNOWN	0x00
 #define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
 
 #define AT91_SMART_MEDIA_ALE (1 << 22)	/* our ALE is AD22 */
 #define AT91_SMART_MEDIA_CLE (1 << 21)	/* our CLE is AD21 */

include/configs/at91sam9260ek.h

@@ -100,7 +100,6 @@
 #define DATAFLASH_TCHS			(0x1 << 24)
 
 /* NAND flash */
-#define NAND_MAX_CHIPS			1
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_SYS_NAND_BASE			0x40000000
 #define CONFIG_SYS_NAND_DBW_8			1

include/configs/at91sam9261ek.h

@@ -111,7 +111,6 @@
 #define DATAFLASH_TCHS			(0x1 << 24)
 
 /* NAND flash */
-#define NAND_MAX_CHIPS			1
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_SYS_NAND_BASE			0x40000000
 #define CONFIG_SYS_NAND_DBW_8			1

include/configs/at91sam9263ek.h

@@ -123,7 +123,6 @@
 #endif
 
 /* NAND flash */
-#define NAND_MAX_CHIPS			1
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_SYS_NAND_BASE			0x40000000
 #define CONFIG_SYS_NAND_DBW_8			1

include/configs/at91sam9rlek.h

@@ -104,7 +104,6 @@
 #define CONFIG_SYS_NO_FLASH			1
 
 /* NAND flash */
-#define NAND_MAX_CHIPS			1
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_SYS_NAND_BASE			0x40000000
 #define CONFIG_SYS_NAND_DBW_8			1

include/configs/bamboo.h

@@ -197,7 +197,6 @@
  * NAND FLASH
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_MAX_NAND_DEVICE	2
-#define NAND_MAX_CHIPS		CONFIG_SYS_MAX_NAND_DEVICE
 #define CONFIG_SYS_NAND_BASE		(CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS)
 #define CONFIG_SYS_NAND_BASE_LIST	{ CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_ADDR + 2 }
 #define CONFIG_SYS_NAND_SELECT_DEVICE  1	/* nand driver supports mutipl. chips	*/

include/configs/bf537-stamp.h

@@ -278,7 +278,6 @@
 #define ADDR_COLUMN_PAGE	3
 #define NAND_ChipID_UNKNOWN	0x00
 #define NAND_MAX_FLOORS		1
-#define NAND_MAX_CHIPS		1
 #define BFIN_NAND_READY		PF3
 
 #define NAND_WAIT_READY(nand)			\

include/configs/canyonlands.h

@@ -234,7 +234,6 @@
  * NAND-FLASH related
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define NAND_MAX_CHIPS		1
 #define CONFIG_SYS_NAND_BASE		(CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS)
 #define CONFIG_SYS_NAND_SELECT_DEVICE  1	/* nand driver supports mutipl. chips	*/
 

include/configs/csb637.h

@@ -131,7 +131,6 @@
 
 #define NAND_ChipID_UNKNOWN	0x00
 #define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
 
 #define AT91_SMART_MEDIA_ALE (1 << 22)	/* our ALE is AD22 */
 #define AT91_SMART_MEDIA_CLE (1 << 21)	/* our CLE is AD21 */

include/configs/davinci_dvevm.h

@@ -127,7 +127,6 @@
 #define CONFIG_SYS_NAND_BASE		0x02000000
 #define CONFIG_SYS_NAND_HW_ECC
 #define CONFIG_SYS_MAX_NAND_DEVICE	1	/* Max number of NAND devices */
-#define NAND_MAX_CHIPS		1
 #define CONFIG_ENV_OFFSET		0x0	/* Block 0--not used by bootcode */
 #define DEF_BOOTM		""
 #elif defined(CONFIG_SYS_USE_NOR)

include/configs/davinci_schmoogie.h

@@ -89,7 +89,6 @@
 #define CONFIG_SYS_NAND_BASE		0x02000000
 #define CONFIG_SYS_NAND_HW_ECC
 #define CONFIG_SYS_MAX_NAND_DEVICE	1	/* Max number of NAND devices */
-#define NAND_MAX_CHIPS		1
 #define CONFIG_ENV_OFFSET		0x0	/* Block 0--not used by bootcode */
 /*=====================*/
 /* Board related stuff */

include/configs/davinci_sffsdr.h

@@ -85,7 +85,6 @@
 #define CONFIG_SYS_NAND_BASE		0x02000000
 #define CONFIG_SYS_NAND_HW_ECC
 #define CONFIG_SYS_MAX_NAND_DEVICE	1	/* Max number of NAND devices */
-#define NAND_MAX_CHIPS		1
 #define CONFIG_ENV_OFFSET		0x0	/* Block 0--not used by bootcode */
 /* I2C switch definitions for PCA9543 chip */
 #define CONFIG_SYS_I2C_PCA9543_ADDR		0x70

include/configs/davinci_sonata.h

@@ -122,7 +122,6 @@
 #define CONFIG_SYS_NAND_BASE		0x02000000
 #define CONFIG_SYS_NAND_HW_ECC
 #define CONFIG_SYS_MAX_NAND_DEVICE	1	/* Max number of NAND devices */
-#define NAND_MAX_CHIPS		1
 #define CONFIG_ENV_OFFSET		0x0	/* Block 0--not used by bootcode */
 #define DEF_BOOTM		""
 #elif defined(CONFIG_SYS_USE_NOR)

include/configs/delta.h

@@ -258,7 +258,6 @@
 
 #define NAND_ChipID_UNKNOWN	0x00
 #define NAND_MAX_FLOORS		1
-#define NAND_MAX_CHIPS		1
 
 #define CONFIG_SYS_NO_FLASH		1
 

include/configs/kilauea.h

@@ -214,7 +214,6 @@
  * NAND FLASH
  *----------------------------------------------------------------------*/
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define NAND_MAX_CHIPS		1
 #define CONFIG_SYS_NAND_BASE		(CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS)
 #define CONFIG_SYS_NAND_SELECT_DEVICE  1	/* nand driver supports mutipl. chips	*/
 

include/configs/netstar.h

@@ -120,7 +120,6 @@
  * NAND flash
  */
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define NAND_MAX_CHIPS		1
 #define CONFIG_SYS_NAND_BASE	0x04000000 + (2 << 23)
 #define NAND_ALLOW_ERASE_ALL	1
 

include/configs/omap2420h4.h

@@ -163,7 +163,6 @@
 
 #define NAND_ChipID_UNKNOWN 0x00
 #define NAND_MAX_FLOORS     1
-#define NAND_MAX_CHIPS      1
 
 #define WRITE_NAND_COMMAND(d, adr) do {*(volatile u16 *)0x6800A07C = d;} while(0)
 #define WRITE_NAND_ADDRESS(d, adr) do {*(volatile u16 *)0x6800A080 = d;} while(0)

include/configs/pdnb3.h

@@ -264,7 +264,6 @@
  * NAND-FLASH stuff
  */
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define NAND_MAX_CHIPS		1
 #define CONFIG_SYS_NAND_BASE		0x51000000	/* NAND FLASH Base Address	*/
 #endif
 

include/configs/quad100hd.h

@@ -224,7 +224,6 @@
 #define CONFIG_SYS_NAND_CE	24   /* our CE is GPIO24  */
 #define CONFIG_SYS_NAND_CLE	31   /* our CLE is GPIO31 */
 #define CONFIG_SYS_NAND_ALE	30   /* our ALE is GPIO30 */
-#define NAND_MAX_CHIPS	1
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #endif
 

include/configs/sbc2410x.h

@@ -209,7 +209,6 @@
 
 #define NAND_ChipID_UNKNOWN	0x00
 #define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
 
 #define NAND_WAIT_READY(nand)	NF_WaitRB()
 #define NAND_DISABLE_CE(nand)	NF_SetCE(NFCE_HIGH)

include/configs/sc3.h

@@ -424,7 +424,6 @@ extern unsigned long offsetOfEnvironment;
  * NAND-FLASH stuff
  */
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define NAND_MAX_CHIPS		1
 #define CONFIG_SYS_NAND_BASE		0x77D00000
 
 

include/configs/sequoia.h

@@ -373,7 +373,6 @@
  * NAND FLASH
  */
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define NAND_MAX_CHIPS		1
 #define CONFIG_SYS_NAND_BASE		(CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS)
 #define CONFIG_SYS_NAND_SELECT_DEVICE  1	/* nand driver supports mutipl. chips */
 

include/configs/smdk6400.h

@@ -227,7 +227,6 @@
 /* NAND configuration */
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		0x70200010
-#define NAND_MAX_CHIPS		1
 #define CONFIG_SYS_S3C_NAND_HWECC
 
 #define CONFIG_SYS_NAND_SKIP_BAD_DOT_I	1  /* ".i" read skips bad blocks	      */

include/configs/socrates.h

@@ -186,7 +186,6 @@
 
 #define CONFIG_SYS_NAND_BASE		(CONFIG_SYS_FPGA_BASE + 0x70)
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define NAND_MAX_CHIPS		1
 #define CONFIG_CMD_NAND
 
 /* LIME GDC */

include/configs/stxxtc.h

@@ -464,7 +464,6 @@
 #define ADDR_COLUMN_PAGE	3
 #define NAND_ChipID_UNKNOWN	0x00
 #define NAND_MAX_FLOORS		1
-#define NAND_MAX_CHIPS		1
 
 /* ALE = PC15, CLE = PB23, CE = PA7, F_RY_BY = PA6 */
 #define NAND_DISABLE_CE(nand) \

include/configs/zylonite.h

@@ -227,7 +227,6 @@
 
 #define NAND_ChipID_UNKNOWN	0x00
 #define NAND_MAX_FLOORS		1
-#define NAND_MAX_CHIPS		1
 
 #define CONFIG_SYS_NO_FLASH		1
 

include/linux/mtd/bbm.h

@@ -18,8 +18,8 @@
 #define __LINUX_MTD_BBM_H
 
 /* The maximum number of NAND chips in an array */
-#ifndef NAND_MAX_CHIPS
-#define NAND_MAX_CHIPS		8
+#ifndef CONFIG_SYS_NAND_MAX_CHIPS
+#define CONFIG_SYS_NAND_MAX_CHIPS	1
 #endif
 
 /**
@@ -48,10 +48,10 @@
  */
 struct nand_bbt_descr {
 	int options;
-	int pages[NAND_MAX_CHIPS];
+	int pages[CONFIG_SYS_NAND_MAX_CHIPS];
 	int offs;
 	int veroffs;
-	uint8_t version[NAND_MAX_CHIPS];
+	uint8_t version[CONFIG_SYS_NAND_MAX_CHIPS];
 	int len;
 	int maxblocks;
 	int reserved_block_code;

include/linux/mtd/nand.h

@@ -46,11 +46,6 @@ extern void nand_release (struct mtd_info *mtd);
 /* Internal helper for board drivers which need to override command function */
 extern void nand_wait_ready(struct mtd_info *mtd);
 
-/* The maximum number of NAND chips in an array */
-#ifndef NAND_MAX_CHIPS
-#define NAND_MAX_CHIPS		8
-#endif
-
 /* This constant declares the max. oobsize / page, which
  * is supported now. If you add a chip with bigger oobsize/page
  * adjust this accordingly.
@@ -477,10 +472,6 @@ struct nand_manufacturers {
 extern struct nand_flash_dev nand_flash_ids[];
 extern struct nand_manufacturers nand_manuf_ids[];
 
-#ifndef NAND_MAX_CHIPS
-#define NAND_MAX_CHIPS 8
-#endif
-
 extern int nand_scan_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd);
 extern int nand_update_bbt(struct mtd_info *mtd, loff_t offs);
 extern int nand_default_bbt(struct mtd_info *mtd);

include/linux/mtd/nand_legacy.h

@@ -40,6 +40,11 @@
 #error This module is for the legacy NAND support
 #endif
 
+/* The maximum number of NAND chips in an array */
+#ifndef CONFIG_SYS_NAND_MAX_CHIPS
+#define CONFIG_SYS_NAND_MAX_CHIPS	1
+#endif
+
 /*
  * Standard NAND flash commands
  */

include/linux/mtd/onenand.h

@@ -30,14 +30,10 @@ extern void onenand_release (struct mtd_info *mtd);
 
 /**
  * struct onenand_bufferram - OneNAND BufferRAM Data
- * @param block		block address in BufferRAM
- * @param page		page address in BufferRAM
- * @param valid		valid flag
+ * @param blockpage	block & page address in BufferRAM
  */
 struct onenand_bufferram {
-	int block;
-	int page;
-	int valid;
+	int blockpage;
 };
 
 /**
@@ -70,6 +66,8 @@ struct onenand_chip {
 	void __iomem *base;
 	unsigned int chipsize;
 	unsigned int device_id;
+	unsigned int version_id;
+	unsigned int density_mask;
 	unsigned int options;
 
 	unsigned int erase_shift;
@@ -81,26 +79,36 @@ struct onenand_chip {
 	unsigned int bufferram_index;
 	struct onenand_bufferram bufferram[MAX_BUFFERRAM];
 
-	int (*command) (struct mtd_info * mtd, int cmd, loff_t address,
+	int (*command) (struct mtd_info *mtd, int cmd, loff_t address,
 			size_t len);
-	int (*wait) (struct mtd_info * mtd, int state);
-	int (*read_bufferram) (struct mtd_info * mtd, int area,
+	int (*wait) (struct mtd_info *mtd, int state);
+	int (*bbt_wait) (struct mtd_info *mtd, int state);
+	int (*read_bufferram) (struct mtd_info *mtd, loff_t addr, int area,
 			       unsigned char *buffer, int offset, size_t count);
-	int (*write_bufferram) (struct mtd_info * mtd, int area,
+	int (*read_spareram) (struct mtd_info *mtd, loff_t addr, int area,
+			       unsigned char *buffer, int offset, size_t count);
+	int (*write_bufferram) (struct mtd_info *mtd, loff_t addr, int area,
 				const unsigned char *buffer, int offset,
 				size_t count);
-	unsigned short (*read_word) (void __iomem * addr);
-	void (*write_word) (unsigned short value, void __iomem * addr);
-	void (*mmcontrol) (struct mtd_info * mtd, int sync_read);
+	unsigned short (*read_word) (void __iomem *addr);
+	void (*write_word) (unsigned short value, void __iomem *addr);
+	void (*mmcontrol) (struct mtd_info *mtd, int sync_read);
 	int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
 	int (*scan_bbt)(struct mtd_info *mtd);
 
+	unsigned char		*main_buf;
+	unsigned char		*spare_buf;
+#ifdef DONT_USE_UBOOT
+	spinlock_t chip_lock;
+	wait_queue_head_t wq;
+#endif
 	int state;
-	unsigned char *page_buf;
-	unsigned char *oob_buf;
+	unsigned char		*page_buf;
+	unsigned char		*oob_buf;
 
 	struct nand_oobinfo *autooob;
-	struct nand_ecclayout *ecclayout;
+	int			subpagesize;
+	struct nand_ecclayout	*ecclayout;
 
 	void *bbm;
 
@@ -125,7 +133,9 @@ struct onenand_chip {
 /*
  * Options bits
  */
-#define ONENAND_CONT_LOCK		(0x0001)
+#define ONENAND_HAS_CONT_LOCK		(0x0001)
+#define ONENAND_HAS_UNLOCK_ALL		(0x0002)
+#define ONENAND_HAS_2PLANE		(0x0004)
 #define ONENAND_PAGEBUF_ALLOC		(0x1000)
 #define ONENAND_OOBBUF_ALLOC		(0x2000)
 
@@ -133,7 +143,6 @@ struct onenand_chip {
  * OneNAND Flash Manufacturer ID Codes
  */
 #define ONENAND_MFR_SAMSUNG	0xec
-#define ONENAND_MFR_UNKNOWN	0x00
 
 /**
  * struct nand_manufacturers - NAND Flash Manufacturer ID Structure

include/linux/mtd/onenand_regs.h

@@ -119,6 +119,7 @@
 #define ONENAND_CMD_UNLOCK		(0x23)
 #define ONENAND_CMD_LOCK		(0x2A)
 #define ONENAND_CMD_LOCK_TIGHT		(0x2C)
+#define ONENAND_CMD_UNLOCK_ALL		(0x27)
 #define ONENAND_CMD_ERASE		(0x94)
 #define ONENAND_CMD_RESET		(0xF0)
 #define ONENAND_CMD_READID		(0x90)

include/nand.h

@@ -31,6 +31,8 @@ extern void nand_init(void);
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/nand.h>
 
+extern int board_nand_init(struct nand_chip *nand);
+
 typedef struct mtd_info nand_info_t;
 
 extern int nand_curr_device;

include/onenand_uboot.h

@@ -15,25 +15,29 @@
 #define __UBOOT_ONENAND_H
 
 #include <linux/types.h>
-#include <linux/mtd/mtd.h>
 
 struct mtd_info;
 struct erase_info;
+struct onenand_chip;
 
 extern struct mtd_info onenand_mtd;
 
+/* board */
+extern void onenand_board_init(struct mtd_info *);
+
 /* Functions */
 extern void onenand_init(void);
 extern int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
 			size_t * retlen, u_char * buf);
-extern int onenand_read_oob(struct mtd_info *mtd, loff_t from,
-			    struct mtd_oob_ops *ops);
+extern int onenand_read_oob(struct mtd_info *mtd, loff_t from, struct mtd_oob_ops *ops);
 extern int onenand_write(struct mtd_info *mtd, loff_t from, size_t len,
 			 size_t * retlen, const u_char * buf);
 extern int onenand_erase(struct mtd_info *mtd, struct erase_info *instr);
 
-extern int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len);
+extern char *onenand_print_device_info(int device, int version);
 
-extern char *onenand_print_device_info(int device);
+/* S3C64xx */
+extern void s3c64xx_onenand_init(struct mtd_info *);
+extern void s3c64xx_set_width_regs(struct onenand_chip *);
 
 #endif /* __UBOOT_ONENAND_H */

nand_spl/board/freescale/mpc8313erdb/Makefile

@@ -34,7 +34,8 @@ AFLAGS	+= -DCONFIG_NAND_SPL
 CFLAGS	+= -DCONFIG_NAND_SPL
 
 SOBJS	= start.o ticks.o
-COBJS	= nand_boot_fsl_elbc.o $(BOARD).o sdram.o ns16550.o nand_init.o time.o
+COBJS	= nand_boot_fsl_elbc.o $(BOARD).o sdram.o ns16550.o nand_init.o \
+	  time.o cache.o
 
 SRCS	:= $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
@@ -79,6 +80,9 @@ $(obj)ns16550.c:
 $(obj)nand_init.c:
 	ln -sf $(SRCTREE)/cpu/mpc83xx/nand_init.c $(obj)nand_init.c
 
+$(obj)cache.c:
+	ln -sf $(SRCTREE)/lib_ppc/cache.c $(obj)cache.c
+
 $(obj)time.c:
 	ln -sf $(SRCTREE)/lib_ppc/time.c $(obj)time.c
 

nand_spl/nand_boot_fsl_elbc.c

@@ -143,6 +143,11 @@ void nand_boot(void)
 	 * Jump to U-Boot image
 	 */
 	puts("transfering control\n");
+	/*
+	 * Clean d-cache and invalidate i-cache, to
+	 * make sure that no stale data is executed.
+	 */
+	flush_cache(CONFIG_SYS_NAND_U_BOOT_DST, CONFIG_SYS_NAND_U_BOOT_SIZE);
 	uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
 	uboot();
 }