 Florian Fainelli
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63c2b6812f
MIPS: Fix code generation for non-DSP capable CPUs
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12 years ago |
 Ralf Baechle
|
8bfc245f9a
Merge branch 'mips-next-3.9' of git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next
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12 years ago |
 David Daney
|
1e7decdb27
MIPS: Probe for and report hardware virtualization support.
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12 years ago |
 Steven J. Hill
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4cb764b454
MIPS: dsp: Simplify the DSP macros.
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12 years ago |
|
Steven J. Hill
|
d0c1b478e0
MIPS: dsp: Support toolchains without DSP ASE and microMIPS.
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12 years ago |
|
Steven J. Hill
|
32a7ede673
MIPS: dsp: Add assembler support for DSP ASEs.
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12 years ago |
|
Steven J. Hill
|
f8fa4811db
MIPS: Add support for the M14KEc core.
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12 years ago |
|
Ralf Baechle
|
7034228792
MIPS: Whitespace cleanup.
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12 years ago |
|
Steven J. Hill
|
b9688310d7
MIPS: Whitespace cleanups and reformatting.
|
12 years ago |
|
Ralf Baechle
|
bdf20507da
MIPS: PMC-Sierra Yosemite: Remove support.
|
12 years ago |
|
David Daney
|
aa1762f49c
MIPS: Control huge tlb support via Kconfig symbol MIPS_HUGE_TLB_SUPPORT
|
12 years ago |
|
Steven J. Hill
|
ee80f7c73d
MIPS: Add detection of DSP ASE Revision 2.
|
13 years ago |
 Al Cooper
|
da4b62cd67
MIPS: perf: Add cpu feature bit for PCI (performance counter interrupt)
|
13 years ago |
|
Ralf Baechle
|
cb418b34ca
Merge branch 'ralf-3.7' of git://git.linux-mips.org/pub/scm/sjhill/linux-sjhill into mips-for-linux-next
|
12 years ago |
|
Steven J. Hill
|
b2ab4f08e8
MIPS: Add base architecture support for RI and XI.
|
12 years ago |
|
Steven J. Hill
|
006a851b10
MIPS: Add support for the 1074K core.
|
13 years ago |
 Kevin Cernekee
|
020232f1ca
MIPS: BMIPS: Add set/clear CP0 macros for BMIPS operations
|
13 years ago |
|
David Daney
|
4d36f59d87
MIPS: Add accessor macros for 64-bit performance counter registers.
|
13 years ago |
 Lucas De Marchi
|
25985edced
Fix common misspellings
|
14 years ago |
|
Kevin Cernekee
|
af23117263
MIPS: Add BMIPS CP0 register definitions
|
14 years ago |
 David Daney
|
96ffa02d21
MIPS: Define ST0_NMI in asm/mipsregs.h
|
15 years ago |
 Shane McDonald
|
95e8f634d7
MIPS FPU emulator: allow Cause bits of FCSR to be writeable by ctc1
|
15 years ago |
|
David Daney
|
9fe2e9d6f5
MIPS: Add accessor functions and bit definitions for c0_PageGrain
|
15 years ago |
|
David Daney
|
1b362e3e35
MIPS: Decode c0_config4 for large TLBs.
|
15 years ago |
 David VomLehn
|
010c108d7a
MIPS: PowerTV: Fix support for timer interrupts with > 64 external IRQs
|
15 years ago |
|
David Daney
|
dd7943920b
MIPS: Add hugetlbfs page defines.
|
16 years ago |
|
Ralf Baechle
|
0b54352600
MIPS: Fix sign-extension bug in 32-bit kernel on 32-bit hardware.
|
16 years ago |
|
Ralf Baechle
|
c52399bece
MIPS: Cavium: Add support for 8k and 32k page sizes.
|
16 years ago |
 Kevin D. Kissell
|
c34e6e8bdd
MIPS: SMTC: Bring set/clear/change_c0_## return value semantics uptodate.
|
16 years ago |
|
Ralf Baechle
|
89e18eb331
MIPS: Change {set,clear,change}_c0_<foo> to return old value.
|
16 years ago |
