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@@ -158,7 +158,7 @@ enum label_id {
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label_smp_pgtable_change,
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label_r3000_write_probe_fail,
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label_large_segbits_fault,
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-#ifdef CONFIG_HUGETLB_PAGE
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+#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
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label_tlb_huge_update,
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#endif
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};
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@@ -177,7 +177,7 @@ UASM_L_LA(_nopage_tlbm)
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UASM_L_LA(_smp_pgtable_change)
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UASM_L_LA(_r3000_write_probe_fail)
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UASM_L_LA(_large_segbits_fault)
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-#ifdef CONFIG_HUGETLB_PAGE
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+#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
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UASM_L_LA(_tlb_huge_update)
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#endif
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@@ -666,7 +666,7 @@ static __cpuinit __maybe_unused void build_convert_pte_to_entrylo(u32 **p,
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}
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}
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-#ifdef CONFIG_HUGETLB_PAGE
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+#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
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static __cpuinit void build_restore_pagemask(u32 **p,
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struct uasm_reloc **r,
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@@ -792,7 +792,7 @@ static __cpuinit void build_huge_handler_tail(u32 **p,
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build_huge_update_entries(p, pte, ptr);
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build_huge_tlb_write_entry(p, l, r, pte, tlb_indexed, 0);
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}
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-#endif /* CONFIG_HUGETLB_PAGE */
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+#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
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#ifdef CONFIG_64BIT
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/*
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@@ -1237,7 +1237,7 @@ build_fast_tlb_refill_handler (u32 **p, struct uasm_label **l,
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/* Adjust the context during the load latency. */
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build_adjust_context(p, tmp);
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-#ifdef CONFIG_HUGETLB_PAGE
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+#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
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uasm_il_bbit1(p, r, scratch, ilog2(_PAGE_HUGE), label_tlb_huge_update);
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/*
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* The in the LWX case we don't want to do the load in the
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@@ -1246,7 +1246,7 @@ build_fast_tlb_refill_handler (u32 **p, struct uasm_label **l,
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*/
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if (use_lwx_insns())
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uasm_i_nop(p);
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-#endif /* CONFIG_HUGETLB_PAGE */
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+#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
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/* build_update_entries */
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@@ -1349,7 +1349,7 @@ static void __cpuinit build_r4000_tlb_refill_handler(void)
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build_get_pgde32(&p, K0, K1); /* get pgd in K1 */
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#endif
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-#ifdef CONFIG_HUGETLB_PAGE
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+#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
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build_is_huge_pte(&p, &r, K0, K1, label_tlb_huge_update);
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#endif
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@@ -1359,7 +1359,7 @@ static void __cpuinit build_r4000_tlb_refill_handler(void)
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uasm_l_leave(&l, p);
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uasm_i_eret(&p); /* return from trap */
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}
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-#ifdef CONFIG_HUGETLB_PAGE
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+#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
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uasm_l_tlb_huge_update(&l, p);
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build_huge_update_entries(&p, htlb_info.huge_pte, K1);
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build_huge_tlb_write_entry(&p, &l, &r, K0, tlb_random,
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@@ -1404,7 +1404,7 @@ static void __cpuinit build_r4000_tlb_refill_handler(void)
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uasm_copy_handler(relocs, labels, tlb_handler, p, f);
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final_len = p - tlb_handler;
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} else {
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-#if defined(CONFIG_HUGETLB_PAGE)
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+#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
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const enum label_id ls = label_tlb_huge_update;
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#else
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const enum label_id ls = label_vmalloc;
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@@ -1880,7 +1880,7 @@ build_r4000_tlbchange_handler_head(u32 **p, struct uasm_label **l,
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build_get_pgde32(p, wr.r1, wr.r2); /* get pgd in ptr */
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#endif
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-#ifdef CONFIG_HUGETLB_PAGE
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+#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
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/*
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* For huge tlb entries, pmd doesn't contain an address but
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* instead contains the tlb pte. Check the PAGE_HUGE bit and
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@@ -1996,7 +1996,7 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
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build_make_valid(&p, &r, wr.r1, wr.r2);
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build_r4000_tlbchange_handler_tail(&p, &l, &r, wr.r1, wr.r2);
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-#ifdef CONFIG_HUGETLB_PAGE
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+#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
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/*
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* This is the entry point when build_r4000_tlbchange_handler_head
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* spots a huge page.
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@@ -2089,7 +2089,7 @@ static void __cpuinit build_r4000_tlb_store_handler(void)
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build_make_write(&p, &r, wr.r1, wr.r2);
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build_r4000_tlbchange_handler_tail(&p, &l, &r, wr.r1, wr.r2);
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-#ifdef CONFIG_HUGETLB_PAGE
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+#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
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/*
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* This is the entry point when
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* build_r4000_tlbchange_handler_head spots a huge page.
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@@ -2137,7 +2137,7 @@ static void __cpuinit build_r4000_tlb_modify_handler(void)
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build_make_write(&p, &r, wr.r1, wr.r2);
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build_r4000_tlbchange_handler_tail(&p, &l, &r, wr.r1, wr.r2);
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-#ifdef CONFIG_HUGETLB_PAGE
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+#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
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/*
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* This is the entry point when
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* build_r4000_tlbchange_handler_head spots a huge page.
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