Paulo Zanoni
|
6441ab5f8f
drm/i915: completely rewrite the Haswell PLL handling code
|
13 years ago |
Paulo Zanoni
|
ee2b0b382a
drm/i915: add haswell_set_pipeconf
|
13 years ago |
Paulo Zanoni
|
5dc5298bb3
drm/i915: add proper CPU/PCH checks to crtc_mode_set functions
|
13 years ago |
Paulo Zanoni
|
09b4ddf95d
drm/i915: add haswell_crtc_mode_set
|
13 years ago |
Paulo Zanoni
|
fc914639b1
drm/i915: enable and disable PIPE_CLK_SEL at the right time
|
13 years ago |
Paulo Zanoni
|
8d9ddbcbd0
drm/i915: enable and disable DDI_FUNC_CTL at the right time
|
13 years ago |
Paulo Zanoni
|
79f689aa6b
drm/i915: rewrite the LCPLL code
|
13 years ago |
Paulo Zanoni
|
b0e77b9c6b
drm/i915: extract intel_set_pipe_timings from crtc_mode_set
|
13 years ago |
Vijay Purushothaman
|
17dc92574b
drm/i915: Fixup HDMI output on Valleyview
|
13 years ago |
Gajanan Bhat
|
19c03924d4
drm/i915: Add eDP support for Valleyview
|
13 years ago |
Vijay Purushothaman
|
2a8f64ca23
drm/i915: Enable DisplayPort in Valleyview
|
13 years ago |
Vijay Purushothaman
|
74a4dd2e45
drm/i915: Program correct m n tu register for Valleyview
|
13 years ago |
Paulo Zanoni
|
e2f12b070d
drm/i915: remove unused variables from ironlake_crtc_mode_set
|
13 years ago |
Paulo Zanoni
|
de13a2e3f8
drm/i915: extract compute_dpll from ironlake_crtc_mode_set
|
13 years ago |
Paulo Zanoni
|
f48d8f235a
drm/i915: extract set_m_n from ironlake_crtc_mode_set
|
13 years ago |
Paulo Zanoni
|
cc769b6257
drm/i915: don't recheck for invalid pipe bpp
|
13 years ago |
Daniel Vetter
|
398b7a1b88
Merge tag 'v3.6-rc7' into drm-intel-next-queued
|
13 years ago |
Daniel Vetter
|
68d3472047
drm/i915: update dpms property in set_mode
|
13 years ago |
Daniel Vetter
|
172a1ae141
drm/i915: don't call dpms funcs after set_mode
|
13 years ago |
Daniel Vetter
|
46b6f8149a
drm/i915: don't disable fdi links harder in ilk_crtc_enable
|
13 years ago |
Daniel Vetter
|
a14d335920
drm/i915: rip out intel_disable_pch_ports
|
13 years ago |
Daniel Vetter
|
bf49ec8c52
drm/i915: add encoder->pre_enable/post_disable
|
13 years ago |
Paulo Zanoni
|
6591c6e4d7
drm/i915: extract compute_clocks from ironlake_crtc_mode_set
|
13 years ago |
Paulo Zanoni
|
a1f9e77e1f
drm/i915: simplify setting DSPCNTR inside ironlake_crtc_mode_set
|
13 years ago |
Paulo Zanoni
|
c8203565b0
drm/i915: extract ironlake_set_pipeconf form ironlake_crtc_mode_set
|
13 years ago |
Daniel Vetter
|
6c4c86f51c
drm/i915: correctly update crtc->x/y in set_base
|
13 years ago |
Daniel Vetter
|
5b5896e4e1
drm/i915: enable lvds pin pairs before dpll on gen2
|
13 years ago |
Daniel Vetter
|
75c5da279e
drm/i915: fix up the IBX transcoder B check
|
13 years ago |
Daniel Vetter
|
a1ceb67751
Merge the modeset-rework, basic conversion into drm-intel-next
|
13 years ago |
Daniel Vetter
|
b980514c9a
drm/i915: improve modeset state checking after dpms calls
|
13 years ago |