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@@ -0,0 +1,505 @@
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+/*
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+ * i2c Support for Atmel's AT91 Two-Wire Interface (TWI)
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+ *
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+ * Copyright (C) 2011 Weinmann Medical GmbH
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+ * Author: Nikolaus Voss <n.voss@weinmann.de>
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+ *
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+ * Evolved from original work by:
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+ * Copyright (C) 2004 Rick Bronson
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+ * Converted to 2.6 by Andrew Victor <andrew@sanpeople.com>
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+ *
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+ * Borrowed heavily from original work by:
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+ * Copyright (C) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ */
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+
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+#include <linux/clk.h>
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+#include <linux/completion.h>
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+#include <linux/err.h>
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+#include <linux/i2c.h>
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+#include <linux/interrupt.h>
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+#include <linux/io.h>
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+#include <linux/module.h>
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+#include <linux/platform_device.h>
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+#include <linux/slab.h>
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+
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+#define TWI_CLK_HZ 100000 /* max 400 Kbits/s */
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+#define AT91_I2C_TIMEOUT msecs_to_jiffies(100) /* transfer timeout */
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+
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+/* AT91 TWI register definitions */
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+#define AT91_TWI_CR 0x0000 /* Control Register */
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+#define AT91_TWI_START 0x0001 /* Send a Start Condition */
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+#define AT91_TWI_STOP 0x0002 /* Send a Stop Condition */
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+#define AT91_TWI_MSEN 0x0004 /* Master Transfer Enable */
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+#define AT91_TWI_SVDIS 0x0020 /* Slave Transfer Disable */
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+#define AT91_TWI_SWRST 0x0080 /* Software Reset */
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+
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+#define AT91_TWI_MMR 0x0004 /* Master Mode Register */
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+#define AT91_TWI_IADRSZ_1 0x0100 /* Internal Device Address Size */
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+#define AT91_TWI_MREAD 0x1000 /* Master Read Direction */
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+
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+#define AT91_TWI_IADR 0x000c /* Internal Address Register */
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+
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+#define AT91_TWI_CWGR 0x0010 /* Clock Waveform Generator Reg */
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+
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+#define AT91_TWI_SR 0x0020 /* Status Register */
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+#define AT91_TWI_TXCOMP 0x0001 /* Transmission Complete */
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+#define AT91_TWI_RXRDY 0x0002 /* Receive Holding Register Ready */
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+#define AT91_TWI_TXRDY 0x0004 /* Transmit Holding Register Ready */
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+
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+#define AT91_TWI_OVRE 0x0040 /* Overrun Error */
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+#define AT91_TWI_UNRE 0x0080 /* Underrun Error */
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+#define AT91_TWI_NACK 0x0100 /* Not Acknowledged */
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+
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+#define AT91_TWI_IER 0x0024 /* Interrupt Enable Register */
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+#define AT91_TWI_IDR 0x0028 /* Interrupt Disable Register */
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+#define AT91_TWI_IMR 0x002c /* Interrupt Mask Register */
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+#define AT91_TWI_RHR 0x0030 /* Receive Holding Register */
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+#define AT91_TWI_THR 0x0034 /* Transmit Holding Register */
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+
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+struct at91_twi_pdata {
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+ unsigned clk_max_div;
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+ unsigned clk_offset;
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+ bool has_unre_flag;
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+};
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+
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+struct at91_twi_dev {
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+ struct device *dev;
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+ void __iomem *base;
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+ struct completion cmd_complete;
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+ struct clk *clk;
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+ u8 *buf;
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+ size_t buf_len;
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+ struct i2c_msg *msg;
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+ int irq;
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+ unsigned transfer_status;
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+ struct i2c_adapter adapter;
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+ unsigned twi_cwgr_reg;
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+ struct at91_twi_pdata *pdata;
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+};
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+
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+static unsigned at91_twi_read(struct at91_twi_dev *dev, unsigned reg)
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+{
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+ return readl_relaxed(dev->base + reg);
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+}
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+
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+static void at91_twi_write(struct at91_twi_dev *dev, unsigned reg, unsigned val)
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+{
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+ writel_relaxed(val, dev->base + reg);
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+}
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+
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+static void at91_disable_twi_interrupts(struct at91_twi_dev *dev)
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+{
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+ at91_twi_write(dev, AT91_TWI_IDR,
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+ AT91_TWI_TXCOMP | AT91_TWI_RXRDY | AT91_TWI_TXRDY);
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+}
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+
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+static void at91_init_twi_bus(struct at91_twi_dev *dev)
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+{
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+ at91_disable_twi_interrupts(dev);
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+ at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_SWRST);
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+ at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_MSEN);
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+ at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_SVDIS);
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+ at91_twi_write(dev, AT91_TWI_CWGR, dev->twi_cwgr_reg);
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+}
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+
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+/*
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+ * Calculate symmetric clock as stated in datasheet:
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+ * twi_clk = F_MAIN / (2 * (cdiv * (1 << ckdiv) + offset))
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+ */
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+static void __devinit at91_calc_twi_clock(struct at91_twi_dev *dev, int twi_clk)
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+{
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+ int ckdiv, cdiv, div;
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+ struct at91_twi_pdata *pdata = dev->pdata;
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+ int offset = pdata->clk_offset;
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+ int max_ckdiv = pdata->clk_max_div;
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+
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+ div = max(0, (int)DIV_ROUND_UP(clk_get_rate(dev->clk),
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+ 2 * twi_clk) - offset);
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+ ckdiv = fls(div >> 8);
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+ cdiv = div >> ckdiv;
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+
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+ if (ckdiv > max_ckdiv) {
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+ dev_warn(dev->dev, "%d exceeds ckdiv max value which is %d.\n",
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+ ckdiv, max_ckdiv);
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+ ckdiv = max_ckdiv;
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+ cdiv = 255;
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+ }
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+
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+ dev->twi_cwgr_reg = (ckdiv << 16) | (cdiv << 8) | cdiv;
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+ dev_dbg(dev->dev, "cdiv %d ckdiv %d\n", cdiv, ckdiv);
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+}
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+
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+static void at91_twi_write_next_byte(struct at91_twi_dev *dev)
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+{
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+ if (dev->buf_len <= 0)
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+ return;
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+
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+ at91_twi_write(dev, AT91_TWI_THR, *dev->buf);
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+
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+ /* send stop when last byte has been written */
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+ if (--dev->buf_len == 0)
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+ at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_STOP);
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+
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+ dev_dbg(dev->dev, "wrote 0x%x, to go %d\n", *dev->buf, dev->buf_len);
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+
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+ ++dev->buf;
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+}
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+
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+static void at91_twi_read_next_byte(struct at91_twi_dev *dev)
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+{
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+ if (dev->buf_len <= 0)
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+ return;
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+
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+ *dev->buf = at91_twi_read(dev, AT91_TWI_RHR) & 0xff;
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+ --dev->buf_len;
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+
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+ /* handle I2C_SMBUS_BLOCK_DATA */
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+ if (unlikely(dev->msg->flags & I2C_M_RECV_LEN)) {
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+ dev->msg->flags &= ~I2C_M_RECV_LEN;
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+ dev->buf_len += *dev->buf;
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+ dev->msg->len = dev->buf_len + 1;
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+ dev_dbg(dev->dev, "received block length %d\n", dev->buf_len);
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+ }
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+
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+ /* send stop if second but last byte has been read */
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+ if (dev->buf_len == 1)
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+ at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_STOP);
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+
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+ dev_dbg(dev->dev, "read 0x%x, to go %d\n", *dev->buf, dev->buf_len);
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+
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+ ++dev->buf;
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+}
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+
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+static irqreturn_t atmel_twi_interrupt(int irq, void *dev_id)
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+{
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+ struct at91_twi_dev *dev = dev_id;
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+ const unsigned status = at91_twi_read(dev, AT91_TWI_SR);
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+ const unsigned irqstatus = status & at91_twi_read(dev, AT91_TWI_IMR);
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+
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+ if (!irqstatus)
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+ return IRQ_NONE;
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+ else if (irqstatus & AT91_TWI_RXRDY)
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+ at91_twi_read_next_byte(dev);
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+ else if (irqstatus & AT91_TWI_TXRDY)
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+ at91_twi_write_next_byte(dev);
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+
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+ /* catch error flags */
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+ dev->transfer_status |= status;
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+
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+ if (irqstatus & AT91_TWI_TXCOMP) {
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+ at91_disable_twi_interrupts(dev);
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+ complete(&dev->cmd_complete);
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+ }
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+
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+ return IRQ_HANDLED;
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+}
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+
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+static int at91_do_twi_transfer(struct at91_twi_dev *dev)
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+{
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+ int ret;
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+ bool has_unre_flag = dev->pdata->has_unre_flag;
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+
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+ dev_dbg(dev->dev, "transfer: %s %d bytes.\n",
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+ (dev->msg->flags & I2C_M_RD) ? "read" : "write", dev->buf_len);
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+
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+ INIT_COMPLETION(dev->cmd_complete);
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+ dev->transfer_status = 0;
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+ if (dev->msg->flags & I2C_M_RD) {
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+ unsigned start_flags = AT91_TWI_START;
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+
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+ if (at91_twi_read(dev, AT91_TWI_SR) & AT91_TWI_RXRDY) {
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+ dev_err(dev->dev, "RXRDY still set!");
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+ at91_twi_read(dev, AT91_TWI_RHR);
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+ }
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+
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+ /* if only one byte is to be read, immediately stop transfer */
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+ if (dev->buf_len <= 1 && !(dev->msg->flags & I2C_M_RECV_LEN))
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+ start_flags |= AT91_TWI_STOP;
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+ at91_twi_write(dev, AT91_TWI_CR, start_flags);
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+ at91_twi_write(dev, AT91_TWI_IER,
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+ AT91_TWI_TXCOMP | AT91_TWI_RXRDY);
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+ } else {
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+ at91_twi_write_next_byte(dev);
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+ at91_twi_write(dev, AT91_TWI_IER,
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+ AT91_TWI_TXCOMP | AT91_TWI_TXRDY);
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+ }
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+
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+ ret = wait_for_completion_interruptible_timeout(&dev->cmd_complete,
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+ dev->adapter.timeout);
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+ if (ret == 0) {
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+ dev_err(dev->dev, "controller timed out\n");
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+ at91_init_twi_bus(dev);
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+ return -ETIMEDOUT;
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+ }
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+ if (dev->transfer_status & AT91_TWI_NACK) {
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+ dev_dbg(dev->dev, "received nack\n");
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+ return -EREMOTEIO;
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+ }
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+ if (dev->transfer_status & AT91_TWI_OVRE) {
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+ dev_err(dev->dev, "overrun while reading\n");
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+ return -EIO;
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+ }
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+ if (has_unre_flag && dev->transfer_status & AT91_TWI_UNRE) {
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+ dev_err(dev->dev, "underrun while writing\n");
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+ return -EIO;
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+ }
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+ dev_dbg(dev->dev, "transfer complete\n");
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+
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+ return 0;
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+}
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+
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+static int at91_twi_xfer(struct i2c_adapter *adap, struct i2c_msg *msg, int num)
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+{
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+ struct at91_twi_dev *dev = i2c_get_adapdata(adap);
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+ int ret;
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+ unsigned int_addr_flag = 0;
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+ struct i2c_msg *m_start = msg;
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+
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+ dev_dbg(&adap->dev, "at91_xfer: processing %d messages:\n", num);
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+
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+ /*
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+ * The hardware can handle at most two messages concatenated by a
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+ * repeated start via it's internal address feature.
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+ */
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+ if (num > 2) {
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+ dev_err(dev->dev,
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+ "cannot handle more than two concatenated messages.\n");
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+ return 0;
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+ } else if (num == 2) {
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+ int internal_address = 0;
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+ int i;
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+
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+ if (msg->flags & I2C_M_RD) {
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+ dev_err(dev->dev, "first transfer must be write.\n");
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+ return -EINVAL;
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+ }
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+ if (msg->len > 3) {
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+ dev_err(dev->dev, "first message size must be <= 3.\n");
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+ return -EINVAL;
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+ }
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+
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+ /* 1st msg is put into the internal address, start with 2nd */
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+ m_start = &msg[1];
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+ for (i = 0; i < msg->len; ++i) {
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+ const unsigned addr = msg->buf[msg->len - 1 - i];
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+
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+ internal_address |= addr << (8 * i);
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+ int_addr_flag += AT91_TWI_IADRSZ_1;
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+ }
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+ at91_twi_write(dev, AT91_TWI_IADR, internal_address);
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+ }
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+
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+ at91_twi_write(dev, AT91_TWI_MMR, (m_start->addr << 16) | int_addr_flag
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+ | ((m_start->flags & I2C_M_RD) ? AT91_TWI_MREAD : 0));
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+
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+ dev->buf_len = m_start->len;
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+ dev->buf = m_start->buf;
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+ dev->msg = m_start;
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+
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+ ret = at91_do_twi_transfer(dev);
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+
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+ return (ret < 0) ? ret : num;
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+}
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+
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+static u32 at91_twi_func(struct i2c_adapter *adapter)
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+{
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+ return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL
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+ | I2C_FUNC_SMBUS_READ_BLOCK_DATA;
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+}
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+
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+static struct i2c_algorithm at91_twi_algorithm = {
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+ .master_xfer = at91_twi_xfer,
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+ .functionality = at91_twi_func,
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+};
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+
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+static struct at91_twi_pdata at91rm9200_config = {
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+ .clk_max_div = 5,
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+ .clk_offset = 3,
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+ .has_unre_flag = true,
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+};
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+
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+static struct at91_twi_pdata at91sam9261_config = {
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+ .clk_max_div = 5,
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+ .clk_offset = 4,
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+ .has_unre_flag = false,
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+};
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+
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+static struct at91_twi_pdata at91sam9260_config = {
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+ .clk_max_div = 7,
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+ .clk_offset = 4,
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+ .has_unre_flag = false,
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+};
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+
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+static struct at91_twi_pdata at91sam9g20_config = {
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+ .clk_max_div = 7,
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+ .clk_offset = 4,
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+ .has_unre_flag = false,
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+};
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+
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+static struct at91_twi_pdata at91sam9g10_config = {
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+ .clk_max_div = 7,
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+ .clk_offset = 4,
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+ .has_unre_flag = false,
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+};
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+
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+static const struct platform_device_id at91_twi_devtypes[] = {
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+ {
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+ .name = "i2c-at91rm9200",
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+ .driver_data = (unsigned long) &at91rm9200_config,
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+ }, {
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+ .name = "i2c-at91sam9261",
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+ .driver_data = (unsigned long) &at91sam9261_config,
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+ }, {
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+ .name = "i2c-at91sam9260",
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+ .driver_data = (unsigned long) &at91sam9260_config,
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+ }, {
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+ .name = "i2c-at91sam9g20",
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+ .driver_data = (unsigned long) &at91sam9g20_config,
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+ }, {
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+ .name = "i2c-at91sam9g10",
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+ .driver_data = (unsigned long) &at91sam9g10_config,
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+ }, {
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+ /* sentinel */
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+ }
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+};
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+
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+static int __devinit at91_twi_probe(struct platform_device *pdev)
|
|
|
+{
|
|
|
+ struct at91_twi_dev *dev;
|
|
|
+ struct resource *mem;
|
|
|
+ int rc;
|
|
|
+
|
|
|
+ dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
|
|
|
+ if (!dev)
|
|
|
+ return -ENOMEM;
|
|
|
+ init_completion(&dev->cmd_complete);
|
|
|
+ dev->dev = &pdev->dev;
|
|
|
+
|
|
|
+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
|
+ if (!mem)
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ dev->pdata = at91_twi_get_driver_data(pdev);
|
|
|
+ if (!dev->pdata)
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ dev->base = devm_request_and_ioremap(&pdev->dev, mem);
|
|
|
+ if (!dev->base)
|
|
|
+ return -EBUSY;
|
|
|
+
|
|
|
+ dev->irq = platform_get_irq(pdev, 0);
|
|
|
+ if (dev->irq < 0)
|
|
|
+ return dev->irq;
|
|
|
+
|
|
|
+ rc = devm_request_irq(&pdev->dev, dev->irq, atmel_twi_interrupt, 0,
|
|
|
+ dev_name(dev->dev), dev);
|
|
|
+ if (rc) {
|
|
|
+ dev_err(dev->dev, "Cannot get irq %d: %d\n", dev->irq, rc);
|
|
|
+ return rc;
|
|
|
+ }
|
|
|
+
|
|
|
+ platform_set_drvdata(pdev, dev);
|
|
|
+
|
|
|
+ dev->clk = devm_clk_get(dev->dev, NULL);
|
|
|
+ if (IS_ERR(dev->clk)) {
|
|
|
+ dev_err(dev->dev, "no clock defined\n");
|
|
|
+ return -ENODEV;
|
|
|
+ }
|
|
|
+ clk_prepare_enable(dev->clk);
|
|
|
+
|
|
|
+ at91_calc_twi_clock(dev, TWI_CLK_HZ);
|
|
|
+ at91_init_twi_bus(dev);
|
|
|
+
|
|
|
+ snprintf(dev->adapter.name, sizeof(dev->adapter.name), "AT91");
|
|
|
+ i2c_set_adapdata(&dev->adapter, dev);
|
|
|
+ dev->adapter.owner = THIS_MODULE;
|
|
|
+ dev->adapter.class = I2C_CLASS_HWMON;
|
|
|
+ dev->adapter.algo = &at91_twi_algorithm;
|
|
|
+ dev->adapter.dev.parent = dev->dev;
|
|
|
+ dev->adapter.nr = pdev->id;
|
|
|
+ dev->adapter.timeout = AT91_I2C_TIMEOUT;
|
|
|
+
|
|
|
+ rc = i2c_add_numbered_adapter(&dev->adapter);
|
|
|
+ if (rc) {
|
|
|
+ dev_err(dev->dev, "Adapter %s registration failed\n",
|
|
|
+ dev->adapter.name);
|
|
|
+ clk_disable_unprepare(dev->clk);
|
|
|
+ return rc;
|
|
|
+ }
|
|
|
+
|
|
|
+ dev_info(dev->dev, "AT91 i2c bus driver.\n");
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static int __devexit at91_twi_remove(struct platform_device *pdev)
|
|
|
+{
|
|
|
+ struct at91_twi_dev *dev = platform_get_drvdata(pdev);
|
|
|
+ int rc;
|
|
|
+
|
|
|
+ rc = i2c_del_adapter(&dev->adapter);
|
|
|
+ clk_disable_unprepare(dev->clk);
|
|
|
+
|
|
|
+ return rc;
|
|
|
+}
|
|
|
+
|
|
|
+#ifdef CONFIG_PM
|
|
|
+
|
|
|
+static int at91_twi_runtime_suspend(struct device *dev)
|
|
|
+{
|
|
|
+ struct at91_twi_dev *twi_dev = dev_get_drvdata(dev);
|
|
|
+
|
|
|
+ clk_disable(twi_dev->clk);
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static int at91_twi_runtime_resume(struct device *dev)
|
|
|
+{
|
|
|
+ struct at91_twi_dev *twi_dev = dev_get_drvdata(dev);
|
|
|
+
|
|
|
+ return clk_enable(twi_dev->clk);
|
|
|
+}
|
|
|
+
|
|
|
+static const struct dev_pm_ops at91_twi_pm = {
|
|
|
+ .runtime_suspend = at91_twi_runtime_suspend,
|
|
|
+ .runtime_resume = at91_twi_runtime_resume,
|
|
|
+};
|
|
|
+
|
|
|
+#define at91_twi_pm_ops (&at91_twi_pm)
|
|
|
+#else
|
|
|
+#define at91_twi_pm_ops NULL
|
|
|
+#endif
|
|
|
+
|
|
|
+static struct platform_driver at91_twi_driver = {
|
|
|
+ .probe = at91_twi_probe,
|
|
|
+ .remove = __devexit_p(at91_twi_remove),
|
|
|
+ .id_table = at91_twi_devtypes,
|
|
|
+ .driver = {
|
|
|
+ .name = "at91_i2c",
|
|
|
+ .owner = THIS_MODULE,
|
|
|
+ .pm = at91_twi_pm_ops,
|
|
|
+ },
|
|
|
+};
|
|
|
+
|
|
|
+static int __init at91_twi_init(void)
|
|
|
+{
|
|
|
+ return platform_driver_register(&at91_twi_driver);
|
|
|
+}
|
|
|
+
|
|
|
+static void __exit at91_twi_exit(void)
|
|
|
+{
|
|
|
+ platform_driver_unregister(&at91_twi_driver);
|
|
|
+}
|
|
|
+
|
|
|
+subsys_initcall(at91_twi_init);
|
|
|
+module_exit(at91_twi_exit);
|
|
|
+
|
|
|
+MODULE_AUTHOR("Nikolaus Voss <n.voss@weinmann.de>");
|
|
|
+MODULE_DESCRIPTION("I2C (TWI) driver for Atmel AT91");
|
|
|
+MODULE_LICENSE("GPL");
|
|
|
+MODULE_ALIAS("platform:at91_i2c");
|
Nikolaus Voss