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@@ -58,16 +58,15 @@ u32 rtl92s_phy_query_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask)
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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u32 returnvalue = 0, originalvalue, bitshift;
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- RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("regaddr(%#x), bitmask(%#x)\n",
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- regaddr, bitmask));
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+ RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, "regaddr(%#x), bitmask(%#x)\n",
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+ regaddr, bitmask);
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originalvalue = rtl_read_dword(rtlpriv, regaddr);
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bitshift = _rtl92s_phy_calculate_bit_shift(bitmask);
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returnvalue = (originalvalue & bitmask) >> bitshift;
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- RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
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- ("BBR MASK=0x%x Addr[0x%x]=0x%x\n",
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- bitmask, regaddr, originalvalue));
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+ RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, "BBR MASK=0x%x Addr[0x%x]=0x%x\n",
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+ bitmask, regaddr, originalvalue);
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return returnvalue;
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@@ -79,8 +78,9 @@ void rtl92s_phy_set_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask,
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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u32 originalvalue, bitshift;
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- RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("regaddr(%#x), bitmask(%#x),"
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- " data(%#x)\n", regaddr, bitmask, data));
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+ RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
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+ "regaddr(%#x), bitmask(%#x), data(%#x)\n",
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+ regaddr, bitmask, data);
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if (bitmask != MASKDWORD) {
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originalvalue = rtl_read_dword(rtlpriv, regaddr);
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@@ -90,8 +90,9 @@ void rtl92s_phy_set_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask,
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rtl_write_dword(rtlpriv, regaddr, data);
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- RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("regaddr(%#x), bitmask(%#x),"
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- " data(%#x)\n", regaddr, bitmask, data));
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+ RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
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+ "regaddr(%#x), bitmask(%#x), data(%#x)\n",
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+ regaddr, bitmask, data);
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}
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@@ -149,8 +150,8 @@ static u32 _rtl92s_phy_rf_serial_read(struct ieee80211_hw *hw,
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retvalue = rtl_get_bbreg(hw, pphyreg->rflssi_readback,
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BLSSI_READBACK_DATA);
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- RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("RFR-%d Addr[0x%x]=0x%x\n",
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- rfpath, pphyreg->rflssi_readback, retvalue));
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+ RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, "RFR-%d Addr[0x%x]=0x%x\n",
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+ rfpath, pphyreg->rflssi_readback, retvalue);
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return retvalue;
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@@ -172,8 +173,8 @@ static void _rtl92s_phy_rf_serial_write(struct ieee80211_hw *hw,
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data_and_addr = ((newoffset << 20) | (data & 0x000fffff)) & 0x0fffffff;
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rtl_set_bbreg(hw, pphyreg->rf3wire_offset, MASKDWORD, data_and_addr);
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- RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("RFW-%d Addr[0x%x]=0x%x\n",
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- rfpath, pphyreg->rf3wire_offset, data_and_addr));
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+ RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, "RFW-%d Addr[0x%x]=0x%x\n",
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+ rfpath, pphyreg->rf3wire_offset, data_and_addr);
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}
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@@ -183,8 +184,9 @@ u32 rtl92s_phy_query_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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u32 original_value, readback_value, bitshift;
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- RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("regaddr(%#x), rfpath(%#x), "
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- "bitmask(%#x)\n", regaddr, rfpath, bitmask));
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+ RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
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+ "regaddr(%#x), rfpath(%#x), bitmask(%#x)\n",
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+ regaddr, rfpath, bitmask);
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spin_lock(&rtlpriv->locks.rf_lock);
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@@ -195,9 +197,9 @@ u32 rtl92s_phy_query_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,
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spin_unlock(&rtlpriv->locks.rf_lock);
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- RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("regaddr(%#x), rfpath(%#x), "
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- "bitmask(%#x), original_value(%#x)\n", regaddr, rfpath,
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- bitmask, original_value));
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+ RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
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+ "regaddr(%#x), rfpath(%#x), bitmask(%#x), original_value(%#x)\n",
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+ regaddr, rfpath, bitmask, original_value);
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return readback_value;
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}
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@@ -212,8 +214,9 @@ void rtl92s_phy_set_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,
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if (!((rtlphy->rf_pathmap >> rfpath) & 0x1))
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return;
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- RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("regaddr(%#x), bitmask(%#x),"
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- " data(%#x), rfpath(%#x)\n", regaddr, bitmask, data, rfpath));
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+ RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
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+ "regaddr(%#x), bitmask(%#x), data(%#x), rfpath(%#x)\n",
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+ regaddr, bitmask, data, rfpath);
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spin_lock(&rtlpriv->locks.rf_lock);
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@@ -228,8 +231,9 @@ void rtl92s_phy_set_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,
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spin_unlock(&rtlpriv->locks.rf_lock);
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- RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, ("regaddr(%#x), bitmask(%#x), "
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- "data(%#x), rfpath(%#x)\n", regaddr, bitmask, data, rfpath));
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+ RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
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+ "regaddr(%#x), bitmask(%#x), data(%#x), rfpath(%#x)\n",
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+ regaddr, bitmask, data, rfpath);
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}
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@@ -249,7 +253,7 @@ void rtl92s_phy_scan_operation_backup(struct ieee80211_hw *hw,
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break;
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default:
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RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
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- ("Unknown operation.\n"));
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+ "Unknown operation\n");
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break;
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}
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}
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@@ -264,9 +268,9 @@ void rtl92s_phy_set_bw_mode(struct ieee80211_hw *hw,
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struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
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u8 reg_bw_opmode;
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- RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, ("Switch to %s bandwidth\n",
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- rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20 ?
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- "20MHz" : "40MHz"));
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+ RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, "Switch to %s bandwidth\n",
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+ rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20 ?
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+ "20MHz" : "40MHz");
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if (rtlphy->set_bwmode_inprogress)
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return;
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@@ -290,8 +294,7 @@ void rtl92s_phy_set_bw_mode(struct ieee80211_hw *hw,
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break;
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default:
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RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
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- ("unknown bandwidth: %#X\n",
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- rtlphy->current_chan_bw));
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+ "unknown bandwidth: %#X\n", rtlphy->current_chan_bw);
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break;
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}
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@@ -316,13 +319,13 @@ void rtl92s_phy_set_bw_mode(struct ieee80211_hw *hw,
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break;
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default:
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RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
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- ("unknown bandwidth: %#X\n", rtlphy->current_chan_bw));
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+ "unknown bandwidth: %#X\n", rtlphy->current_chan_bw);
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break;
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}
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rtl92s_phy_rf6052_set_bandwidth(hw, rtlphy->current_chan_bw);
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rtlphy->set_bwmode_inprogress = false;
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- RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, ("<==\n"));
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+ RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, "<==\n");
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}
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static bool _rtl92s_phy_set_sw_chnl_cmdarray(struct swchnlcmd *cmdtable,
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@@ -438,7 +441,7 @@ static bool _rtl92s_phy_sw_chnl_step_by_step(struct ieee80211_hw *hw,
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break;
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default:
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RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
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- ("switch case not process\n"));
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+ "switch case not processed\n");
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break;
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}
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@@ -458,9 +461,8 @@ u8 rtl92s_phy_sw_chnl(struct ieee80211_hw *hw)
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u32 delay;
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bool ret;
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- RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE,
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- ("switch to channel%d\n",
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- rtlphy->current_channel));
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+ RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, "switch to channel%d\n",
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+ rtlphy->current_channel);
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if (rtlphy->sw_chnl_inprogress)
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return 0;
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@@ -496,7 +498,7 @@ u8 rtl92s_phy_sw_chnl(struct ieee80211_hw *hw)
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rtlphy->sw_chnl_inprogress = false;
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- RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, ("<==\n"));
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+ RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, "<==\n");
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return 1;
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}
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@@ -556,7 +558,7 @@ bool rtl92s_phy_set_rf_power_state(struct ieee80211_hw *hw,
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do {
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InitializeCount++;
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RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
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- ("IPS Set eRf nic enable\n"));
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+ "IPS Set eRf nic enable\n");
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rtstatus = rtl_ps_enable_nic(hw);
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} while ((rtstatus != true) &&
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(InitializeCount < 10));
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@@ -565,11 +567,11 @@ bool rtl92s_phy_set_rf_power_state(struct ieee80211_hw *hw,
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RT_RF_OFF_LEVL_HALT_NIC);
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} else {
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RT_TRACE(rtlpriv, COMP_POWER, DBG_DMESG,
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- ("awake, sleeped:%d ms "
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- "state_inap:%x\n",
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- jiffies_to_msecs(jiffies -
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- ppsc->last_sleep_jiffies),
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- rtlpriv->psc.state_inap));
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+ "awake, sleeped:%d ms state_inap:%x\n",
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+ jiffies_to_msecs(jiffies -
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+ ppsc->
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+ last_sleep_jiffies),
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+ rtlpriv->psc.state_inap);
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ppsc->last_awake_jiffies = jiffies;
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rtl_write_word(rtlpriv, CMDR, 0x37FC);
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rtl_write_byte(rtlpriv, TXPAUSE, 0x00);
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@@ -587,7 +589,7 @@ bool rtl92s_phy_set_rf_power_state(struct ieee80211_hw *hw,
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case ERFOFF:{
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if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_HALT_NIC) {
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RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
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- ("IPS Set eRf nic disable\n"));
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+ "IPS Set eRf nic disable\n");
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rtl_ps_disable_nic(hw);
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RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
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} else {
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@@ -613,11 +615,9 @@ bool rtl92s_phy_set_rf_power_state(struct ieee80211_hw *hw,
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continue;
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} else {
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RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
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- ("eRf Off/Sleep: "
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- "%d times TcbBusyQueue[%d] = "
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- "%d before doze!\n",
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- (i + 1), queue_id,
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- skb_queue_len(&ring->queue)));
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+ "eRf Off/Sleep: %d times TcbBusyQueue[%d] = %d before doze!\n",
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+ i + 1, queue_id,
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+ skb_queue_len(&ring->queue));
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udelay(10);
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i++;
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@@ -625,31 +625,30 @@ bool rtl92s_phy_set_rf_power_state(struct ieee80211_hw *hw,
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if (i >= MAX_DOZE_WAITING_TIMES_9x) {
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RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
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- ("\nERFOFF: %d times"
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- "TcbBusyQueue[%d] = %d !\n",
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+ "ERFOFF: %d times TcbBusyQueue[%d] = %d !\n",
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MAX_DOZE_WAITING_TIMES_9x,
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queue_id,
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- skb_queue_len(&ring->queue)));
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+ skb_queue_len(&ring->queue));
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break;
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}
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}
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RT_TRACE(rtlpriv, COMP_POWER, DBG_DMESG,
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- ("Set ERFSLEEP awaked:%d ms\n",
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+ "Set ERFSLEEP awaked:%d ms\n",
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jiffies_to_msecs(jiffies -
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- ppsc->last_awake_jiffies)));
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+ ppsc->last_awake_jiffies));
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RT_TRACE(rtlpriv, COMP_POWER, DBG_DMESG,
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- ("sleep awaked:%d ms "
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- "state_inap:%x\n", jiffies_to_msecs(jiffies -
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- ppsc->last_awake_jiffies),
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- rtlpriv->psc.state_inap));
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+ "sleep awaked:%d ms state_inap:%x\n",
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+ jiffies_to_msecs(jiffies -
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+ ppsc->last_awake_jiffies),
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+ rtlpriv->psc.state_inap);
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ppsc->last_sleep_jiffies = jiffies;
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_rtl92se_phy_set_rf_sleep(hw);
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break;
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default:
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RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
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- ("switch case not process\n"));
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+ "switch case not processed\n");
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bresult = false;
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break;
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}
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@@ -995,7 +994,7 @@ static bool _rtl92s_phy_bb_config_parafile(struct ieee80211_hw *hw)
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if (rtstatus != true) {
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RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG,
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- ("Write BB Reg Fail!!"));
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+ "Write BB Reg Fail!!\n");
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goto phy_BB8190_Config_ParaFile_Fail;
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}
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@@ -1009,8 +1008,7 @@ static bool _rtl92s_phy_bb_config_parafile(struct ieee80211_hw *hw)
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}
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if (rtstatus != true) {
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RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG,
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- ("_rtl92s_phy_bb_config_parafile(): "
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- "BB_PG Reg Fail!!"));
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+ "_rtl92s_phy_bb_config_parafile(): BB_PG Reg Fail!!\n");
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goto phy_BB8190_Config_ParaFile_Fail;
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}
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@@ -1053,7 +1051,7 @@ u8 rtl92s_phy_config_rf(struct ieee80211_hw *hw, enum radio_path rfpath)
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radio_b_tblen = RADIOB_ARRAYLENGTH;
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}
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- RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, ("Radio No %x\n", rfpath));
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+ RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Radio No %x\n", rfpath);
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rtstatus = true;
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switch (rfpath) {
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@@ -1175,11 +1173,11 @@ bool rtl92s_phy_bb_config(struct ieee80211_hw *hw)
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(rtlphy->rf_type == RF_2T2R && rf_num != 2) ||
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(rtlphy->rf_type == RF_2T2R_GREEN && rf_num != 2)) {
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RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG,
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- ("RF_Type(%x) does not match "
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- "RF_Num(%x)!!\n", rtlphy->rf_type, rf_num));
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+ "RF_Type(%x) does not match RF_Num(%x)!!\n",
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+ rtlphy->rf_type, rf_num);
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RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG,
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- ("path1 0x%x, path2 0x%x, pathmap "
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- "0x%x\n", path1, path2, pathmap));
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+ "path1 0x%x, path2 0x%x, pathmap 0x%x\n",
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+ path1, path2, pathmap);
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}
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return rtstatus;
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@@ -1214,20 +1212,20 @@ void rtl92s_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw)
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ROFDM0_XCAGCCORE1, MASKBYTE0);
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rtlphy->default_initialgain[3] = rtl_get_bbreg(hw,
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ROFDM0_XDAGCCORE1, MASKBYTE0);
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- RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, ("Default initial gain "
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- "(c50=0x%x, c58=0x%x, c60=0x%x, c68=0x%x)\n",
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+ RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
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+ "Default initial gain (c50=0x%x, c58=0x%x, c60=0x%x, c68=0x%x)\n",
|
|
|
rtlphy->default_initialgain[0],
|
|
|
rtlphy->default_initialgain[1],
|
|
|
rtlphy->default_initialgain[2],
|
|
|
- rtlphy->default_initialgain[3]));
|
|
|
+ rtlphy->default_initialgain[3]);
|
|
|
|
|
|
/* read framesync */
|
|
|
rtlphy->framesync = rtl_get_bbreg(hw, ROFDM0_RXDETECTOR3, MASKBYTE0);
|
|
|
rtlphy->framesync_c34 = rtl_get_bbreg(hw, ROFDM0_RXDETECTOR2,
|
|
|
MASKDWORD);
|
|
|
RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
|
|
|
- ("Default framesync (0x%x) = 0x%x\n",
|
|
|
- ROFDM0_RXDETECTOR3, rtlphy->framesync));
|
|
|
+ "Default framesync (0x%x) = 0x%x\n",
|
|
|
+ ROFDM0_RXDETECTOR3, rtlphy->framesync);
|
|
|
|
|
|
}
|
|
|
|
|
@@ -1287,10 +1285,9 @@ void rtl92s_phy_set_txpower(struct ieee80211_hw *hw, u8 channel)
|
|
|
&ofdmpowerLevel[0]);
|
|
|
|
|
|
RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
|
|
|
- ("Channel-%d, cckPowerLevel (A / B) = "
|
|
|
- "0x%x / 0x%x, ofdmPowerLevel (A / B) = 0x%x / 0x%x\n",
|
|
|
- channel, cckpowerlevel[0], cckpowerlevel[1],
|
|
|
- ofdmpowerLevel[0], ofdmpowerLevel[1]));
|
|
|
+ "Channel-%d, cckPowerLevel (A / B) = 0x%x / 0x%x, ofdmPowerLevel (A / B) = 0x%x / 0x%x\n",
|
|
|
+ channel, cckpowerlevel[0], cckpowerlevel[1],
|
|
|
+ ofdmpowerLevel[0], ofdmpowerLevel[1]);
|
|
|
|
|
|
_rtl92s_phy_ccxpower_indexcheck(hw, channel, &cckpowerlevel[0],
|
|
|
&ofdmpowerLevel[0]);
|
|
@@ -1316,7 +1313,7 @@ void rtl92s_phy_chk_fwcmd_iodone(struct ieee80211_hw *hw)
|
|
|
} while (--pollingcnt);
|
|
|
|
|
|
if (pollingcnt == 0)
|
|
|
- RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("Set FW Cmd fail!!\n"));
|
|
|
+ RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Set FW Cmd fail!!\n");
|
|
|
}
|
|
|
|
|
|
|
|
@@ -1345,20 +1342,17 @@ static void _rtl92s_phy_set_fwcmd_io(struct ieee80211_hw *hw)
|
|
|
|
|
|
switch (rtlhal->current_fwcmd_io) {
|
|
|
case FW_CMD_RA_RESET:
|
|
|
- RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG,
|
|
|
- ("FW_CMD_RA_RESET\n"));
|
|
|
+ RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG, "FW_CMD_RA_RESET\n");
|
|
|
rtl_write_dword(rtlpriv, WFM5, FW_RA_RESET);
|
|
|
rtl92s_phy_chk_fwcmd_iodone(hw);
|
|
|
break;
|
|
|
case FW_CMD_RA_ACTIVE:
|
|
|
- RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG,
|
|
|
- ("FW_CMD_RA_ACTIVE\n"));
|
|
|
+ RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG, "FW_CMD_RA_ACTIVE\n");
|
|
|
rtl_write_dword(rtlpriv, WFM5, FW_RA_ACTIVE);
|
|
|
rtl92s_phy_chk_fwcmd_iodone(hw);
|
|
|
break;
|
|
|
case FW_CMD_RA_REFRESH_N:
|
|
|
- RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG,
|
|
|
- ("FW_CMD_RA_REFRESH_N\n"));
|
|
|
+ RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG, "FW_CMD_RA_REFRESH_N\n");
|
|
|
input = FW_RA_REFRESH;
|
|
|
rtl_write_dword(rtlpriv, WFM5, input);
|
|
|
rtl92s_phy_chk_fwcmd_iodone(hw);
|
|
@@ -1367,7 +1361,7 @@ static void _rtl92s_phy_set_fwcmd_io(struct ieee80211_hw *hw)
|
|
|
break;
|
|
|
case FW_CMD_RA_REFRESH_BG:
|
|
|
RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG,
|
|
|
- ("FW_CMD_RA_REFRESH_BG\n"));
|
|
|
+ "FW_CMD_RA_REFRESH_BG\n");
|
|
|
rtl_write_dword(rtlpriv, WFM5, FW_RA_REFRESH);
|
|
|
rtl92s_phy_chk_fwcmd_iodone(hw);
|
|
|
rtl_write_dword(rtlpriv, WFM5, FW_RA_DISABLE_RSSI_MASK);
|
|
@@ -1375,21 +1369,20 @@ static void _rtl92s_phy_set_fwcmd_io(struct ieee80211_hw *hw)
|
|
|
break;
|
|
|
case FW_CMD_RA_REFRESH_N_COMB:
|
|
|
RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG,
|
|
|
- ("FW_CMD_RA_REFRESH_N_COMB\n"));
|
|
|
+ "FW_CMD_RA_REFRESH_N_COMB\n");
|
|
|
input = FW_RA_IOT_N_COMB;
|
|
|
rtl_write_dword(rtlpriv, WFM5, input);
|
|
|
rtl92s_phy_chk_fwcmd_iodone(hw);
|
|
|
break;
|
|
|
case FW_CMD_RA_REFRESH_BG_COMB:
|
|
|
RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG,
|
|
|
- ("FW_CMD_RA_REFRESH_BG_COMB\n"));
|
|
|
+ "FW_CMD_RA_REFRESH_BG_COMB\n");
|
|
|
input = FW_RA_IOT_BG_COMB;
|
|
|
rtl_write_dword(rtlpriv, WFM5, input);
|
|
|
rtl92s_phy_chk_fwcmd_iodone(hw);
|
|
|
break;
|
|
|
case FW_CMD_IQK_ENABLE:
|
|
|
- RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG,
|
|
|
- ("FW_CMD_IQK_ENABLE\n"));
|
|
|
+ RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG, "FW_CMD_IQK_ENABLE\n");
|
|
|
rtl_write_dword(rtlpriv, WFM5, FW_IQK_ENABLE);
|
|
|
rtl92s_phy_chk_fwcmd_iodone(hw);
|
|
|
break;
|
|
@@ -1424,8 +1417,7 @@ static void _rtl92s_phy_set_fwcmd_io(struct ieee80211_hw *hw)
|
|
|
rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2, 0xcd);
|
|
|
break;
|
|
|
case FW_CMD_LPS_ENTER:
|
|
|
- RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG,
|
|
|
- ("FW_CMD_LPS_ENTER\n"));
|
|
|
+ RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG, "FW_CMD_LPS_ENTER\n");
|
|
|
current_aid = rtlpriv->mac80211.assoc_id;
|
|
|
rtl_write_dword(rtlpriv, WFM5, (FW_LPS_ENTER |
|
|
|
((current_aid | 0xc000) << 8)));
|
|
@@ -1434,20 +1426,18 @@ static void _rtl92s_phy_set_fwcmd_io(struct ieee80211_hw *hw)
|
|
|
* turbo mode until driver leave LPS */
|
|
|
break;
|
|
|
case FW_CMD_LPS_LEAVE:
|
|
|
- RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG,
|
|
|
- ("FW_CMD_LPS_LEAVE\n"));
|
|
|
+ RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG, "FW_CMD_LPS_LEAVE\n");
|
|
|
rtl_write_dword(rtlpriv, WFM5, FW_LPS_LEAVE);
|
|
|
rtl92s_phy_chk_fwcmd_iodone(hw);
|
|
|
break;
|
|
|
case FW_CMD_ADD_A2_ENTRY:
|
|
|
- RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG,
|
|
|
- ("FW_CMD_ADD_A2_ENTRY\n"));
|
|
|
+ RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG, "FW_CMD_ADD_A2_ENTRY\n");
|
|
|
rtl_write_dword(rtlpriv, WFM5, FW_ADD_A2_ENTRY);
|
|
|
rtl92s_phy_chk_fwcmd_iodone(hw);
|
|
|
break;
|
|
|
case FW_CMD_CTRL_DM_BY_DRIVER:
|
|
|
RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
|
|
|
- ("FW_CMD_CTRL_DM_BY_DRIVER\n"));
|
|
|
+ "FW_CMD_CTRL_DM_BY_DRIVER\n");
|
|
|
rtl_write_dword(rtlpriv, WFM5, FW_CTRL_DM_BY_DRIVER);
|
|
|
rtl92s_phy_chk_fwcmd_iodone(hw);
|
|
|
break;
|
|
@@ -1472,8 +1462,8 @@ bool rtl92s_phy_set_fw_cmd(struct ieee80211_hw *hw, enum fwcmd_iotype fw_cmdio)
|
|
|
bool bPostProcessing = false;
|
|
|
|
|
|
RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
|
|
|
- ("Set FW Cmd(%#x), set_fwcmd_inprogress(%d)\n",
|
|
|
- fw_cmdio, rtlhal->set_fwcmd_inprogress));
|
|
|
+ "Set FW Cmd(%#x), set_fwcmd_inprogress(%d)\n",
|
|
|
+ fw_cmdio, rtlhal->set_fwcmd_inprogress);
|
|
|
|
|
|
do {
|
|
|
/* We re-map to combined FW CMD ones if firmware version */
|
|
@@ -1501,7 +1491,7 @@ bool rtl92s_phy_set_fw_cmd(struct ieee80211_hw *hw, enum fwcmd_iotype fw_cmdio)
|
|
|
* DM map table in the future. */
|
|
|
switch (fw_cmdio) {
|
|
|
case FW_CMD_RA_INIT:
|
|
|
- RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, ("RA init!!\n"));
|
|
|
+ RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, "RA init!!\n");
|
|
|
fw_cmdmap |= FW_RA_INIT_CTL;
|
|
|
FW_CMD_IO_SET(rtlpriv, fw_cmdmap);
|
|
|
/* Clear control flag to sync with FW. */
|
|
@@ -1509,7 +1499,7 @@ bool rtl92s_phy_set_fw_cmd(struct ieee80211_hw *hw, enum fwcmd_iotype fw_cmdio)
|
|
|
break;
|
|
|
case FW_CMD_DIG_DISABLE:
|
|
|
RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
|
|
|
- ("Set DIG disable!!\n"));
|
|
|
+ "Set DIG disable!!\n");
|
|
|
fw_cmdmap &= ~FW_DIG_ENABLE_CTL;
|
|
|
FW_CMD_IO_SET(rtlpriv, fw_cmdmap);
|
|
|
break;
|
|
@@ -1517,14 +1507,14 @@ bool rtl92s_phy_set_fw_cmd(struct ieee80211_hw *hw, enum fwcmd_iotype fw_cmdio)
|
|
|
case FW_CMD_DIG_RESUME:
|
|
|
if (!(rtlpriv->dm.dm_flag & HAL_DM_DIG_DISABLE)) {
|
|
|
RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
|
|
|
- ("Set DIG enable or resume!!\n"));
|
|
|
+ "Set DIG enable or resume!!\n");
|
|
|
fw_cmdmap |= (FW_DIG_ENABLE_CTL | FW_SS_CTL);
|
|
|
FW_CMD_IO_SET(rtlpriv, fw_cmdmap);
|
|
|
}
|
|
|
break;
|
|
|
case FW_CMD_DIG_HALT:
|
|
|
RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
|
|
|
- ("Set DIG halt!!\n"));
|
|
|
+ "Set DIG halt!!\n");
|
|
|
fw_cmdmap &= ~(FW_DIG_ENABLE_CTL | FW_SS_CTL);
|
|
|
FW_CMD_IO_SET(rtlpriv, fw_cmdmap);
|
|
|
break;
|
|
@@ -1540,9 +1530,8 @@ bool rtl92s_phy_set_fw_cmd(struct ieee80211_hw *hw, enum fwcmd_iotype fw_cmdio)
|
|
|
(rtlefuse->thermalmeter[0] << 16));
|
|
|
|
|
|
RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
|
|
|
- ("Set TxPwr tracking!! "
|
|
|
- "FwCmdMap(%#x), FwParam(%#x)\n",
|
|
|
- fw_cmdmap, fw_param));
|
|
|
+ "Set TxPwr tracking!! FwCmdMap(%#x), FwParam(%#x)\n",
|
|
|
+ fw_cmdmap, fw_param);
|
|
|
|
|
|
FW_CMD_PARA_SET(rtlpriv, fw_param);
|
|
|
FW_CMD_IO_SET(rtlpriv, fw_cmdmap);
|
|
@@ -1563,9 +1552,8 @@ bool rtl92s_phy_set_fw_cmd(struct ieee80211_hw *hw, enum fwcmd_iotype fw_cmdio)
|
|
|
fw_param &= FW_RA_PARAM_CLR;
|
|
|
|
|
|
RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
|
|
|
- ("[FW CMD] [New Version] "
|
|
|
- "Set RA/IOT Comb in n mode!! FwCmdMap(%#x), "
|
|
|
- "FwParam(%#x)\n", fw_cmdmap, fw_param));
|
|
|
+ "[FW CMD] [New Version] Set RA/IOT Comb in n mode!! FwCmdMap(%#x), FwParam(%#x)\n",
|
|
|
+ fw_cmdmap, fw_param);
|
|
|
|
|
|
FW_CMD_PARA_SET(rtlpriv, fw_param);
|
|
|
FW_CMD_IO_SET(rtlpriv, fw_cmdmap);
|
|
@@ -1652,7 +1640,7 @@ bool rtl92s_phy_set_fw_cmd(struct ieee80211_hw *hw, enum fwcmd_iotype fw_cmdio)
|
|
|
break;
|
|
|
case FW_CMD_PAPE_CONTROL:
|
|
|
RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
|
|
|
- ("[FW CMD] Set PAPE Control\n"));
|
|
|
+ "[FW CMD] Set PAPE Control\n");
|
|
|
fw_cmdmap &= ~FW_PAPE_CTL_BY_SW_HW;
|
|
|
|
|
|
FW_CMD_IO_SET(rtlpriv, fw_cmdmap);
|