mac.c 32 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2010 Realtek Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * wlanfae <wlanfae@realtek.com>
  23. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24. * Hsinchu 300, Taiwan.
  25. *
  26. * Larry Finger <Larry.Finger@lwfinger.net>
  27. *
  28. ****************************************************************************/
  29. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30. #include <linux/module.h>
  31. #include "../wifi.h"
  32. #include "../pci.h"
  33. #include "../usb.h"
  34. #include "../ps.h"
  35. #include "../cam.h"
  36. #include "reg.h"
  37. #include "def.h"
  38. #include "phy.h"
  39. #include "rf.h"
  40. #include "dm.h"
  41. #include "mac.h"
  42. #include "trx.h"
  43. /* macro to shorten lines */
  44. #define LINK_Q ui_link_quality
  45. #define RX_EVM rx_evm_percentage
  46. #define RX_SIGQ rx_mimo_signalquality
  47. void rtl92c_read_chip_version(struct ieee80211_hw *hw)
  48. {
  49. struct rtl_priv *rtlpriv = rtl_priv(hw);
  50. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  51. struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
  52. enum version_8192c chip_version = VERSION_UNKNOWN;
  53. u32 value32;
  54. value32 = rtl_read_dword(rtlpriv, REG_SYS_CFG);
  55. if (value32 & TRP_VAUX_EN) {
  56. chip_version = (value32 & TYPE_ID) ? VERSION_TEST_CHIP_92C :
  57. VERSION_TEST_CHIP_88C;
  58. } else {
  59. /* Normal mass production chip. */
  60. chip_version = NORMAL_CHIP;
  61. chip_version |= ((value32 & TYPE_ID) ? CHIP_92C : 0);
  62. chip_version |= ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : 0);
  63. /* RTL8723 with BT function. */
  64. chip_version |= ((value32 & BT_FUNC) ? CHIP_8723 : 0);
  65. if (IS_VENDOR_UMC(chip_version))
  66. chip_version |= ((value32 & CHIP_VER_RTL_MASK) ?
  67. CHIP_VENDOR_UMC_B_CUT : 0);
  68. if (IS_92C_SERIAL(chip_version)) {
  69. value32 = rtl_read_dword(rtlpriv, REG_HPON_FSM);
  70. chip_version |= ((CHIP_BONDING_IDENTIFIER(value32) ==
  71. CHIP_BONDING_92C_1T2R) ? CHIP_92C_1T2R : 0);
  72. } else if (IS_8723_SERIES(chip_version)) {
  73. value32 = rtl_read_dword(rtlpriv, REG_GPIO_OUTSTS);
  74. chip_version |= ((value32 & RF_RL_ID) ?
  75. CHIP_8723_DRV_REV : 0);
  76. }
  77. }
  78. rtlhal->version = (enum version_8192c)chip_version;
  79. pr_info("rtl8192cu: Chip version 0x%x\n", chip_version);
  80. switch (rtlhal->version) {
  81. case VERSION_NORMAL_TSMC_CHIP_92C_1T2R:
  82. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  83. "Chip Version ID: VERSION_B_CHIP_92C\n");
  84. break;
  85. case VERSION_NORMAL_TSMC_CHIP_92C:
  86. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  87. "Chip Version ID: VERSION_NORMAL_TSMC_CHIP_92C\n");
  88. break;
  89. case VERSION_NORMAL_TSMC_CHIP_88C:
  90. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  91. "Chip Version ID: VERSION_NORMAL_TSMC_CHIP_88C\n");
  92. break;
  93. case VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT:
  94. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  95. "Chip Version ID: VERSION_NORMAL_UMC_CHIP_i92C_1T2R_A_CUT\n");
  96. break;
  97. case VERSION_NORMAL_UMC_CHIP_92C_A_CUT:
  98. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  99. "Chip Version ID: VERSION_NORMAL_UMC_CHIP_92C_A_CUT\n");
  100. break;
  101. case VERSION_NORMAL_UMC_CHIP_88C_A_CUT:
  102. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  103. "Chip Version ID: VERSION_NORMAL_UMC_CHIP_88C_A_CUT\n");
  104. break;
  105. case VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT:
  106. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  107. "Chip Version ID: VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT\n");
  108. break;
  109. case VERSION_NORMAL_UMC_CHIP_92C_B_CUT:
  110. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  111. "Chip Version ID: VERSION_NORMAL_UMC_CHIP_92C_B_CUT\n");
  112. break;
  113. case VERSION_NORMAL_UMC_CHIP_88C_B_CUT:
  114. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  115. "Chip Version ID: VERSION_NORMAL_UMC_CHIP_88C_B_CUT\n");
  116. break;
  117. case VERSION_NORMA_UMC_CHIP_8723_1T1R_A_CUT:
  118. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  119. "Chip Version ID: VERSION_NORMA_UMC_CHIP_8723_1T1R_A_CUT\n");
  120. break;
  121. case VERSION_NORMA_UMC_CHIP_8723_1T1R_B_CUT:
  122. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  123. "Chip Version ID: VERSION_NORMA_UMC_CHIP_8723_1T1R_B_CUT\n");
  124. break;
  125. case VERSION_TEST_CHIP_92C:
  126. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  127. "Chip Version ID: VERSION_TEST_CHIP_92C\n");
  128. break;
  129. case VERSION_TEST_CHIP_88C:
  130. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  131. "Chip Version ID: VERSION_TEST_CHIP_88C\n");
  132. break;
  133. default:
  134. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  135. "Chip Version ID: ???????????????\n");
  136. break;
  137. }
  138. if (IS_92C_SERIAL(rtlhal->version))
  139. rtlphy->rf_type =
  140. (IS_92C_1T2R(rtlhal->version)) ? RF_1T2R : RF_2T2R;
  141. else
  142. rtlphy->rf_type = RF_1T1R;
  143. RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
  144. "Chip RF Type: %s\n",
  145. rtlphy->rf_type == RF_2T2R ? "RF_2T2R" : "RF_1T1R");
  146. if (get_rf_type(rtlphy) == RF_1T1R)
  147. rtlpriv->dm.rfpath_rxenable[0] = true;
  148. else
  149. rtlpriv->dm.rfpath_rxenable[0] =
  150. rtlpriv->dm.rfpath_rxenable[1] = true;
  151. RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "VersionID = 0x%4x\n",
  152. rtlhal->version);
  153. }
  154. /**
  155. * writeLLT - LLT table write access
  156. * @io: io callback
  157. * @address: LLT logical address.
  158. * @data: LLT data content
  159. *
  160. * Realtek hardware access function.
  161. *
  162. */
  163. bool rtl92c_llt_write(struct ieee80211_hw *hw, u32 address, u32 data)
  164. {
  165. struct rtl_priv *rtlpriv = rtl_priv(hw);
  166. bool status = true;
  167. long count = 0;
  168. u32 value = _LLT_INIT_ADDR(address) |
  169. _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS);
  170. rtl_write_dword(rtlpriv, REG_LLT_INIT, value);
  171. do {
  172. value = rtl_read_dword(rtlpriv, REG_LLT_INIT);
  173. if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value))
  174. break;
  175. if (count > POLLING_LLT_THRESHOLD) {
  176. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  177. "Failed to polling write LLT done at address %d! _LLT_OP_VALUE(%x)\n",
  178. address, _LLT_OP_VALUE(value));
  179. status = false;
  180. break;
  181. }
  182. } while (++count);
  183. return status;
  184. }
  185. /**
  186. * rtl92c_init_LLT_table - Init LLT table
  187. * @io: io callback
  188. * @boundary:
  189. *
  190. * Realtek hardware access function.
  191. *
  192. */
  193. bool rtl92c_init_llt_table(struct ieee80211_hw *hw, u32 boundary)
  194. {
  195. bool rst = true;
  196. u32 i;
  197. for (i = 0; i < (boundary - 1); i++) {
  198. rst = rtl92c_llt_write(hw, i , i + 1);
  199. if (true != rst) {
  200. pr_err("===> %s #1 fail\n", __func__);
  201. return rst;
  202. }
  203. }
  204. /* end of list */
  205. rst = rtl92c_llt_write(hw, (boundary - 1), 0xFF);
  206. if (true != rst) {
  207. pr_err("===> %s #2 fail\n", __func__);
  208. return rst;
  209. }
  210. /* Make the other pages as ring buffer
  211. * This ring buffer is used as beacon buffer if we config this MAC
  212. * as two MAC transfer.
  213. * Otherwise used as local loopback buffer.
  214. */
  215. for (i = boundary; i < LLT_LAST_ENTRY_OF_TX_PKT_BUFFER; i++) {
  216. rst = rtl92c_llt_write(hw, i, (i + 1));
  217. if (true != rst) {
  218. pr_err("===> %s #3 fail\n", __func__);
  219. return rst;
  220. }
  221. }
  222. /* Let last entry point to the start entry of ring buffer */
  223. rst = rtl92c_llt_write(hw, LLT_LAST_ENTRY_OF_TX_PKT_BUFFER, boundary);
  224. if (true != rst) {
  225. pr_err("===> %s #4 fail\n", __func__);
  226. return rst;
  227. }
  228. return rst;
  229. }
  230. void rtl92c_set_key(struct ieee80211_hw *hw, u32 key_index,
  231. u8 *p_macaddr, bool is_group, u8 enc_algo,
  232. bool is_wepkey, bool clear_all)
  233. {
  234. struct rtl_priv *rtlpriv = rtl_priv(hw);
  235. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  236. struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
  237. u8 *macaddr = p_macaddr;
  238. u32 entry_id = 0;
  239. bool is_pairwise = false;
  240. static u8 cam_const_addr[4][6] = {
  241. {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
  242. {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
  243. {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
  244. {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}
  245. };
  246. static u8 cam_const_broad[] = {
  247. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
  248. };
  249. if (clear_all) {
  250. u8 idx = 0;
  251. u8 cam_offset = 0;
  252. u8 clear_number = 5;
  253. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, "clear_all\n");
  254. for (idx = 0; idx < clear_number; idx++) {
  255. rtl_cam_mark_invalid(hw, cam_offset + idx);
  256. rtl_cam_empty_entry(hw, cam_offset + idx);
  257. if (idx < 5) {
  258. memset(rtlpriv->sec.key_buf[idx], 0,
  259. MAX_KEY_LEN);
  260. rtlpriv->sec.key_len[idx] = 0;
  261. }
  262. }
  263. } else {
  264. switch (enc_algo) {
  265. case WEP40_ENCRYPTION:
  266. enc_algo = CAM_WEP40;
  267. break;
  268. case WEP104_ENCRYPTION:
  269. enc_algo = CAM_WEP104;
  270. break;
  271. case TKIP_ENCRYPTION:
  272. enc_algo = CAM_TKIP;
  273. break;
  274. case AESCCMP_ENCRYPTION:
  275. enc_algo = CAM_AES;
  276. break;
  277. default:
  278. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  279. "illegal switch case\n");
  280. enc_algo = CAM_TKIP;
  281. break;
  282. }
  283. if (is_wepkey || rtlpriv->sec.use_defaultkey) {
  284. macaddr = cam_const_addr[key_index];
  285. entry_id = key_index;
  286. } else {
  287. if (is_group) {
  288. macaddr = cam_const_broad;
  289. entry_id = key_index;
  290. } else {
  291. key_index = PAIRWISE_KEYIDX;
  292. entry_id = CAM_PAIRWISE_KEY_POSITION;
  293. is_pairwise = true;
  294. }
  295. }
  296. if (rtlpriv->sec.key_len[key_index] == 0) {
  297. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
  298. "delete one entry\n");
  299. rtl_cam_delete_one_entry(hw, p_macaddr, entry_id);
  300. } else {
  301. RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
  302. "The insert KEY length is %d\n",
  303. rtlpriv->sec.key_len[PAIRWISE_KEYIDX]);
  304. RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
  305. "The insert KEY is %x %x\n",
  306. rtlpriv->sec.key_buf[0][0],
  307. rtlpriv->sec.key_buf[0][1]);
  308. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
  309. "add one entry\n");
  310. if (is_pairwise) {
  311. RT_PRINT_DATA(rtlpriv, COMP_SEC, DBG_LOUD,
  312. "Pairwise Key content",
  313. rtlpriv->sec.pairwise_key,
  314. rtlpriv->sec.
  315. key_len[PAIRWISE_KEYIDX]);
  316. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
  317. "set Pairwise key\n");
  318. rtl_cam_add_one_entry(hw, macaddr, key_index,
  319. entry_id, enc_algo,
  320. CAM_CONFIG_NO_USEDK,
  321. rtlpriv->sec.
  322. key_buf[key_index]);
  323. } else {
  324. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
  325. "set group key\n");
  326. if (mac->opmode == NL80211_IFTYPE_ADHOC) {
  327. rtl_cam_add_one_entry(hw,
  328. rtlefuse->dev_addr,
  329. PAIRWISE_KEYIDX,
  330. CAM_PAIRWISE_KEY_POSITION,
  331. enc_algo,
  332. CAM_CONFIG_NO_USEDK,
  333. rtlpriv->sec.key_buf
  334. [entry_id]);
  335. }
  336. rtl_cam_add_one_entry(hw, macaddr, key_index,
  337. entry_id, enc_algo,
  338. CAM_CONFIG_NO_USEDK,
  339. rtlpriv->sec.key_buf[entry_id]);
  340. }
  341. }
  342. }
  343. }
  344. u32 rtl92c_get_txdma_status(struct ieee80211_hw *hw)
  345. {
  346. struct rtl_priv *rtlpriv = rtl_priv(hw);
  347. return rtl_read_dword(rtlpriv, REG_TXDMA_STATUS);
  348. }
  349. void rtl92c_enable_interrupt(struct ieee80211_hw *hw)
  350. {
  351. struct rtl_priv *rtlpriv = rtl_priv(hw);
  352. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  353. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  354. struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
  355. if (IS_HARDWARE_TYPE_8192CE(rtlhal)) {
  356. rtl_write_dword(rtlpriv, REG_HIMR, rtlpci->irq_mask[0] &
  357. 0xFFFFFFFF);
  358. rtl_write_dword(rtlpriv, REG_HIMRE, rtlpci->irq_mask[1] &
  359. 0xFFFFFFFF);
  360. } else {
  361. rtl_write_dword(rtlpriv, REG_HIMR, rtlusb->irq_mask[0] &
  362. 0xFFFFFFFF);
  363. rtl_write_dword(rtlpriv, REG_HIMRE, rtlusb->irq_mask[1] &
  364. 0xFFFFFFFF);
  365. }
  366. }
  367. void rtl92c_init_interrupt(struct ieee80211_hw *hw)
  368. {
  369. rtl92c_enable_interrupt(hw);
  370. }
  371. void rtl92c_disable_interrupt(struct ieee80211_hw *hw)
  372. {
  373. struct rtl_priv *rtlpriv = rtl_priv(hw);
  374. rtl_write_dword(rtlpriv, REG_HIMR, IMR8190_DISABLED);
  375. rtl_write_dword(rtlpriv, REG_HIMRE, IMR8190_DISABLED);
  376. }
  377. void rtl92c_set_qos(struct ieee80211_hw *hw, int aci)
  378. {
  379. struct rtl_priv *rtlpriv = rtl_priv(hw);
  380. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  381. u32 u4b_ac_param;
  382. rtl92c_dm_init_edca_turbo(hw);
  383. u4b_ac_param = (u32) mac->ac[aci].aifs;
  384. u4b_ac_param |=
  385. ((u32) le16_to_cpu(mac->ac[aci].cw_min) & 0xF) <<
  386. AC_PARAM_ECW_MIN_OFFSET;
  387. u4b_ac_param |=
  388. ((u32) le16_to_cpu(mac->ac[aci].cw_max) & 0xF) <<
  389. AC_PARAM_ECW_MAX_OFFSET;
  390. u4b_ac_param |= (u32) le16_to_cpu(mac->ac[aci].tx_op) <<
  391. AC_PARAM_TXOP_OFFSET;
  392. RT_TRACE(rtlpriv, COMP_QOS, DBG_LOUD, "queue:%x, ac_param:%x\n",
  393. aci, u4b_ac_param);
  394. switch (aci) {
  395. case AC1_BK:
  396. rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, u4b_ac_param);
  397. break;
  398. case AC0_BE:
  399. rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM, u4b_ac_param);
  400. break;
  401. case AC2_VI:
  402. rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, u4b_ac_param);
  403. break;
  404. case AC3_VO:
  405. rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, u4b_ac_param);
  406. break;
  407. default:
  408. RT_ASSERT(false, ("invalid aci: %d !\n", aci));
  409. break;
  410. }
  411. }
  412. /*-------------------------------------------------------------------------
  413. * HW MAC Address
  414. *-------------------------------------------------------------------------*/
  415. void rtl92c_set_mac_addr(struct ieee80211_hw *hw, const u8 *addr)
  416. {
  417. u32 i;
  418. struct rtl_priv *rtlpriv = rtl_priv(hw);
  419. for (i = 0 ; i < ETH_ALEN ; i++)
  420. rtl_write_byte(rtlpriv, (REG_MACID + i), *(addr+i));
  421. RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG,
  422. "MAC Address: %02X-%02X-%02X-%02X-%02X-%02X\n",
  423. rtl_read_byte(rtlpriv, REG_MACID),
  424. rtl_read_byte(rtlpriv, REG_MACID+1),
  425. rtl_read_byte(rtlpriv, REG_MACID+2),
  426. rtl_read_byte(rtlpriv, REG_MACID+3),
  427. rtl_read_byte(rtlpriv, REG_MACID+4),
  428. rtl_read_byte(rtlpriv, REG_MACID+5));
  429. }
  430. void rtl92c_init_driver_info_size(struct ieee80211_hw *hw, u8 size)
  431. {
  432. struct rtl_priv *rtlpriv = rtl_priv(hw);
  433. rtl_write_byte(rtlpriv, REG_RX_DRVINFO_SZ, size);
  434. }
  435. int rtl92c_set_network_type(struct ieee80211_hw *hw, enum nl80211_iftype type)
  436. {
  437. u8 value;
  438. struct rtl_priv *rtlpriv = rtl_priv(hw);
  439. switch (type) {
  440. case NL80211_IFTYPE_UNSPECIFIED:
  441. value = NT_NO_LINK;
  442. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  443. "Set Network type to NO LINK!\n");
  444. break;
  445. case NL80211_IFTYPE_ADHOC:
  446. value = NT_LINK_AD_HOC;
  447. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  448. "Set Network type to Ad Hoc!\n");
  449. break;
  450. case NL80211_IFTYPE_STATION:
  451. value = NT_LINK_AP;
  452. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  453. "Set Network type to STA!\n");
  454. break;
  455. case NL80211_IFTYPE_AP:
  456. value = NT_AS_AP;
  457. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  458. "Set Network type to AP!\n");
  459. break;
  460. default:
  461. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  462. "Network type %d not supported!\n", type);
  463. return -EOPNOTSUPP;
  464. }
  465. rtl_write_byte(rtlpriv, (REG_CR + 2), value);
  466. return 0;
  467. }
  468. void rtl92c_init_network_type(struct ieee80211_hw *hw)
  469. {
  470. rtl92c_set_network_type(hw, NL80211_IFTYPE_UNSPECIFIED);
  471. }
  472. void rtl92c_init_adaptive_ctrl(struct ieee80211_hw *hw)
  473. {
  474. u16 value16;
  475. u32 value32;
  476. struct rtl_priv *rtlpriv = rtl_priv(hw);
  477. /* Response Rate Set */
  478. value32 = rtl_read_dword(rtlpriv, REG_RRSR);
  479. value32 &= ~RATE_BITMAP_ALL;
  480. value32 |= RATE_RRSR_CCK_ONLY_1M;
  481. rtl_write_dword(rtlpriv, REG_RRSR, value32);
  482. /* SIFS (used in NAV) */
  483. value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
  484. rtl_write_word(rtlpriv, REG_SPEC_SIFS, value16);
  485. /* Retry Limit */
  486. value16 = _LRL(0x30) | _SRL(0x30);
  487. rtl_write_dword(rtlpriv, REG_RL, value16);
  488. }
  489. void rtl92c_init_rate_fallback(struct ieee80211_hw *hw)
  490. {
  491. struct rtl_priv *rtlpriv = rtl_priv(hw);
  492. /* Set Data Auto Rate Fallback Retry Count register. */
  493. rtl_write_dword(rtlpriv, REG_DARFRC, 0x00000000);
  494. rtl_write_dword(rtlpriv, REG_DARFRC+4, 0x10080404);
  495. rtl_write_dword(rtlpriv, REG_RARFRC, 0x04030201);
  496. rtl_write_dword(rtlpriv, REG_RARFRC+4, 0x08070605);
  497. }
  498. static void rtl92c_set_cck_sifs(struct ieee80211_hw *hw, u8 trx_sifs,
  499. u8 ctx_sifs)
  500. {
  501. struct rtl_priv *rtlpriv = rtl_priv(hw);
  502. rtl_write_byte(rtlpriv, REG_SIFS_CCK, trx_sifs);
  503. rtl_write_byte(rtlpriv, (REG_SIFS_CCK + 1), ctx_sifs);
  504. }
  505. static void rtl92c_set_ofdm_sifs(struct ieee80211_hw *hw, u8 trx_sifs,
  506. u8 ctx_sifs)
  507. {
  508. struct rtl_priv *rtlpriv = rtl_priv(hw);
  509. rtl_write_byte(rtlpriv, REG_SIFS_OFDM, trx_sifs);
  510. rtl_write_byte(rtlpriv, (REG_SIFS_OFDM + 1), ctx_sifs);
  511. }
  512. void rtl92c_init_edca_param(struct ieee80211_hw *hw,
  513. u16 queue, u16 txop, u8 cw_min, u8 cw_max, u8 aifs)
  514. {
  515. /* sequence: VO, VI, BE, BK ==> the same as 92C hardware design.
  516. * referenc : enum nl80211_txq_q or ieee80211_set_wmm_default function.
  517. */
  518. u32 value;
  519. struct rtl_priv *rtlpriv = rtl_priv(hw);
  520. value = (u32)aifs;
  521. value |= ((u32)cw_min & 0xF) << 8;
  522. value |= ((u32)cw_max & 0xF) << 12;
  523. value |= (u32)txop << 16;
  524. /* 92C hardware register sequence is the same as queue number. */
  525. rtl_write_dword(rtlpriv, (REG_EDCA_VO_PARAM + (queue * 4)), value);
  526. }
  527. void rtl92c_init_edca(struct ieee80211_hw *hw)
  528. {
  529. u16 value16;
  530. struct rtl_priv *rtlpriv = rtl_priv(hw);
  531. /* disable EDCCA count down, to reduce collison and retry */
  532. value16 = rtl_read_word(rtlpriv, REG_RD_CTRL);
  533. value16 |= DIS_EDCA_CNT_DWN;
  534. rtl_write_word(rtlpriv, REG_RD_CTRL, value16);
  535. /* Update SIFS timing. ??????????
  536. * pHalData->SifsTime = 0x0e0e0a0a; */
  537. rtl92c_set_cck_sifs(hw, 0xa, 0xa);
  538. rtl92c_set_ofdm_sifs(hw, 0xe, 0xe);
  539. /* Set CCK/OFDM SIFS to be 10us. */
  540. rtl_write_word(rtlpriv, REG_SIFS_CCK, 0x0a0a);
  541. rtl_write_word(rtlpriv, REG_SIFS_OFDM, 0x1010);
  542. rtl_write_word(rtlpriv, REG_PROT_MODE_CTRL, 0x0204);
  543. rtl_write_dword(rtlpriv, REG_BAR_MODE_CTRL, 0x014004);
  544. /* TXOP */
  545. rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM, 0x005EA42B);
  546. rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, 0x0000A44F);
  547. rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, 0x005EA324);
  548. rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x002FA226);
  549. /* PIFS */
  550. rtl_write_byte(rtlpriv, REG_PIFS, 0x1C);
  551. /* AGGR BREAK TIME Register */
  552. rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16);
  553. rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0040);
  554. rtl_write_byte(rtlpriv, REG_BCNDMATIM, 0x02);
  555. rtl_write_byte(rtlpriv, REG_ATIMWND, 0x02);
  556. }
  557. void rtl92c_init_ampdu_aggregation(struct ieee80211_hw *hw)
  558. {
  559. struct rtl_priv *rtlpriv = rtl_priv(hw);
  560. rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, 0x99997631);
  561. rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16);
  562. /* init AMPDU aggregation number, tuning for Tx's TP, */
  563. rtl_write_word(rtlpriv, 0x4CA, 0x0708);
  564. }
  565. void rtl92c_init_beacon_max_error(struct ieee80211_hw *hw, bool infra_mode)
  566. {
  567. struct rtl_priv *rtlpriv = rtl_priv(hw);
  568. rtl_write_byte(rtlpriv, REG_BCN_MAX_ERR, 0xFF);
  569. }
  570. void rtl92c_init_rdg_setting(struct ieee80211_hw *hw)
  571. {
  572. struct rtl_priv *rtlpriv = rtl_priv(hw);
  573. rtl_write_byte(rtlpriv, REG_RD_CTRL, 0xFF);
  574. rtl_write_word(rtlpriv, REG_RD_NAV_NXT, 0x200);
  575. rtl_write_byte(rtlpriv, REG_RD_RESP_PKT_TH, 0x05);
  576. }
  577. void rtl92c_init_retry_function(struct ieee80211_hw *hw)
  578. {
  579. u8 value8;
  580. struct rtl_priv *rtlpriv = rtl_priv(hw);
  581. value8 = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL);
  582. value8 |= EN_AMPDU_RTY_NEW;
  583. rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL, value8);
  584. /* Set ACK timeout */
  585. rtl_write_byte(rtlpriv, REG_ACKTO, 0x40);
  586. }
  587. void rtl92c_init_beacon_parameters(struct ieee80211_hw *hw,
  588. enum version_8192c version)
  589. {
  590. struct rtl_priv *rtlpriv = rtl_priv(hw);
  591. struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
  592. rtl_write_word(rtlpriv, REG_TBTT_PROHIBIT, 0x6404);/* ms */
  593. rtl_write_byte(rtlpriv, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);/*ms*/
  594. rtl_write_byte(rtlpriv, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME);
  595. if (IS_NORMAL_CHIP(rtlhal->version))
  596. rtl_write_word(rtlpriv, REG_BCNTCFG, 0x660F);
  597. else
  598. rtl_write_word(rtlpriv, REG_BCNTCFG, 0x66FF);
  599. }
  600. void rtl92c_disable_fast_edca(struct ieee80211_hw *hw)
  601. {
  602. struct rtl_priv *rtlpriv = rtl_priv(hw);
  603. rtl_write_word(rtlpriv, REG_FAST_EDCA_CTRL, 0);
  604. }
  605. void rtl92c_set_min_space(struct ieee80211_hw *hw, bool is2T)
  606. {
  607. struct rtl_priv *rtlpriv = rtl_priv(hw);
  608. u8 value = is2T ? MAX_MSS_DENSITY_2T : MAX_MSS_DENSITY_1T;
  609. rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, value);
  610. }
  611. u16 rtl92c_get_mgt_filter(struct ieee80211_hw *hw)
  612. {
  613. struct rtl_priv *rtlpriv = rtl_priv(hw);
  614. return rtl_read_word(rtlpriv, REG_RXFLTMAP0);
  615. }
  616. void rtl92c_set_mgt_filter(struct ieee80211_hw *hw, u16 filter)
  617. {
  618. struct rtl_priv *rtlpriv = rtl_priv(hw);
  619. rtl_write_word(rtlpriv, REG_RXFLTMAP0, filter);
  620. }
  621. u16 rtl92c_get_ctrl_filter(struct ieee80211_hw *hw)
  622. {
  623. struct rtl_priv *rtlpriv = rtl_priv(hw);
  624. return rtl_read_word(rtlpriv, REG_RXFLTMAP1);
  625. }
  626. void rtl92c_set_ctrl_filter(struct ieee80211_hw *hw, u16 filter)
  627. {
  628. struct rtl_priv *rtlpriv = rtl_priv(hw);
  629. rtl_write_word(rtlpriv, REG_RXFLTMAP1, filter);
  630. }
  631. u16 rtl92c_get_data_filter(struct ieee80211_hw *hw)
  632. {
  633. struct rtl_priv *rtlpriv = rtl_priv(hw);
  634. return rtl_read_word(rtlpriv, REG_RXFLTMAP2);
  635. }
  636. void rtl92c_set_data_filter(struct ieee80211_hw *hw, u16 filter)
  637. {
  638. struct rtl_priv *rtlpriv = rtl_priv(hw);
  639. rtl_write_word(rtlpriv, REG_RXFLTMAP2, filter);
  640. }
  641. /*==============================================================*/
  642. static u8 _rtl92c_query_rxpwrpercentage(char antpower)
  643. {
  644. if ((antpower <= -100) || (antpower >= 20))
  645. return 0;
  646. else if (antpower >= 0)
  647. return 100;
  648. else
  649. return 100 + antpower;
  650. }
  651. static u8 _rtl92c_evm_db_to_percentage(char value)
  652. {
  653. char ret_val;
  654. ret_val = value;
  655. if (ret_val >= 0)
  656. ret_val = 0;
  657. if (ret_val <= -33)
  658. ret_val = -33;
  659. ret_val = 0 - ret_val;
  660. ret_val *= 3;
  661. if (ret_val == 99)
  662. ret_val = 100;
  663. return ret_val;
  664. }
  665. static long _rtl92c_translate_todbm(struct ieee80211_hw *hw,
  666. u8 signal_strength_index)
  667. {
  668. long signal_power;
  669. signal_power = (long)((signal_strength_index + 1) >> 1);
  670. signal_power -= 95;
  671. return signal_power;
  672. }
  673. static long _rtl92c_signal_scale_mapping(struct ieee80211_hw *hw,
  674. long currsig)
  675. {
  676. long retsig;
  677. if (currsig >= 61 && currsig <= 100)
  678. retsig = 90 + ((currsig - 60) / 4);
  679. else if (currsig >= 41 && currsig <= 60)
  680. retsig = 78 + ((currsig - 40) / 2);
  681. else if (currsig >= 31 && currsig <= 40)
  682. retsig = 66 + (currsig - 30);
  683. else if (currsig >= 21 && currsig <= 30)
  684. retsig = 54 + (currsig - 20);
  685. else if (currsig >= 5 && currsig <= 20)
  686. retsig = 42 + (((currsig - 5) * 2) / 3);
  687. else if (currsig == 4)
  688. retsig = 36;
  689. else if (currsig == 3)
  690. retsig = 27;
  691. else if (currsig == 2)
  692. retsig = 18;
  693. else if (currsig == 1)
  694. retsig = 9;
  695. else
  696. retsig = currsig;
  697. return retsig;
  698. }
  699. static void _rtl92c_query_rxphystatus(struct ieee80211_hw *hw,
  700. struct rtl_stats *pstats,
  701. struct rx_desc_92c *pdesc,
  702. struct rx_fwinfo_92c *p_drvinfo,
  703. bool packet_match_bssid,
  704. bool packet_toself,
  705. bool packet_beacon)
  706. {
  707. struct rtl_priv *rtlpriv = rtl_priv(hw);
  708. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  709. struct phy_sts_cck_8192s_t *cck_buf;
  710. s8 rx_pwr_all = 0, rx_pwr[4];
  711. u8 rf_rx_num = 0, evm, pwdb_all;
  712. u8 i, max_spatial_stream;
  713. u32 rssi, total_rssi = 0;
  714. bool in_powersavemode = false;
  715. bool is_cck_rate;
  716. is_cck_rate = RX_HAL_IS_CCK_RATE(pdesc);
  717. pstats->packet_matchbssid = packet_match_bssid;
  718. pstats->packet_toself = packet_toself;
  719. pstats->is_cck = is_cck_rate;
  720. pstats->packet_beacon = packet_beacon;
  721. pstats->is_cck = is_cck_rate;
  722. pstats->RX_SIGQ[0] = -1;
  723. pstats->RX_SIGQ[1] = -1;
  724. if (is_cck_rate) {
  725. u8 report, cck_highpwr;
  726. cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo;
  727. if (!in_powersavemode)
  728. cck_highpwr = rtlphy->cck_high_power;
  729. else
  730. cck_highpwr = false;
  731. if (!cck_highpwr) {
  732. u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
  733. report = cck_buf->cck_agc_rpt & 0xc0;
  734. report = report >> 6;
  735. switch (report) {
  736. case 0x3:
  737. rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
  738. break;
  739. case 0x2:
  740. rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
  741. break;
  742. case 0x1:
  743. rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
  744. break;
  745. case 0x0:
  746. rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
  747. break;
  748. }
  749. } else {
  750. u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
  751. report = p_drvinfo->cfosho[0] & 0x60;
  752. report = report >> 5;
  753. switch (report) {
  754. case 0x3:
  755. rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f) << 1);
  756. break;
  757. case 0x2:
  758. rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f) << 1);
  759. break;
  760. case 0x1:
  761. rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f) << 1);
  762. break;
  763. case 0x0:
  764. rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f) << 1);
  765. break;
  766. }
  767. }
  768. pwdb_all = _rtl92c_query_rxpwrpercentage(rx_pwr_all);
  769. pstats->rx_pwdb_all = pwdb_all;
  770. pstats->recvsignalpower = rx_pwr_all;
  771. if (packet_match_bssid) {
  772. u8 sq;
  773. if (pstats->rx_pwdb_all > 40)
  774. sq = 100;
  775. else {
  776. sq = cck_buf->sq_rpt;
  777. if (sq > 64)
  778. sq = 0;
  779. else if (sq < 20)
  780. sq = 100;
  781. else
  782. sq = ((64 - sq) * 100) / 44;
  783. }
  784. pstats->signalquality = sq;
  785. pstats->RX_SIGQ[0] = sq;
  786. pstats->RX_SIGQ[1] = -1;
  787. }
  788. } else {
  789. rtlpriv->dm.rfpath_rxenable[0] =
  790. rtlpriv->dm.rfpath_rxenable[1] = true;
  791. for (i = RF90_PATH_A; i < RF90_PATH_MAX; i++) {
  792. if (rtlpriv->dm.rfpath_rxenable[i])
  793. rf_rx_num++;
  794. rx_pwr[i] =
  795. ((p_drvinfo->gain_trsw[i] & 0x3f) * 2) - 110;
  796. rssi = _rtl92c_query_rxpwrpercentage(rx_pwr[i]);
  797. total_rssi += rssi;
  798. rtlpriv->stats.rx_snr_db[i] =
  799. (long)(p_drvinfo->rxsnr[i] / 2);
  800. if (packet_match_bssid)
  801. pstats->rx_mimo_signalstrength[i] = (u8) rssi;
  802. }
  803. rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
  804. pwdb_all = _rtl92c_query_rxpwrpercentage(rx_pwr_all);
  805. pstats->rx_pwdb_all = pwdb_all;
  806. pstats->rxpower = rx_pwr_all;
  807. pstats->recvsignalpower = rx_pwr_all;
  808. if (GET_RX_DESC_RX_MCS(pdesc) &&
  809. GET_RX_DESC_RX_MCS(pdesc) >= DESC92_RATEMCS8 &&
  810. GET_RX_DESC_RX_MCS(pdesc) <= DESC92_RATEMCS15)
  811. max_spatial_stream = 2;
  812. else
  813. max_spatial_stream = 1;
  814. for (i = 0; i < max_spatial_stream; i++) {
  815. evm = _rtl92c_evm_db_to_percentage(p_drvinfo->rxevm[i]);
  816. if (packet_match_bssid) {
  817. if (i == 0)
  818. pstats->signalquality =
  819. (u8) (evm & 0xff);
  820. pstats->RX_SIGQ[i] =
  821. (u8) (evm & 0xff);
  822. }
  823. }
  824. }
  825. if (is_cck_rate)
  826. pstats->signalstrength =
  827. (u8) (_rtl92c_signal_scale_mapping(hw, pwdb_all));
  828. else if (rf_rx_num != 0)
  829. pstats->signalstrength =
  830. (u8) (_rtl92c_signal_scale_mapping
  831. (hw, total_rssi /= rf_rx_num));
  832. }
  833. static void _rtl92c_process_ui_rssi(struct ieee80211_hw *hw,
  834. struct rtl_stats *pstats)
  835. {
  836. struct rtl_priv *rtlpriv = rtl_priv(hw);
  837. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  838. u8 rfpath;
  839. u32 last_rssi, tmpval;
  840. if (pstats->packet_toself || pstats->packet_beacon) {
  841. rtlpriv->stats.rssi_calculate_cnt++;
  842. if (rtlpriv->stats.ui_rssi.total_num++ >=
  843. PHY_RSSI_SLID_WIN_MAX) {
  844. rtlpriv->stats.ui_rssi.total_num =
  845. PHY_RSSI_SLID_WIN_MAX;
  846. last_rssi =
  847. rtlpriv->stats.ui_rssi.elements[rtlpriv->
  848. stats.ui_rssi.index];
  849. rtlpriv->stats.ui_rssi.total_val -= last_rssi;
  850. }
  851. rtlpriv->stats.ui_rssi.total_val += pstats->signalstrength;
  852. rtlpriv->stats.ui_rssi.elements[rtlpriv->stats.ui_rssi.
  853. index++] = pstats->signalstrength;
  854. if (rtlpriv->stats.ui_rssi.index >= PHY_RSSI_SLID_WIN_MAX)
  855. rtlpriv->stats.ui_rssi.index = 0;
  856. tmpval = rtlpriv->stats.ui_rssi.total_val /
  857. rtlpriv->stats.ui_rssi.total_num;
  858. rtlpriv->stats.signal_strength =
  859. _rtl92c_translate_todbm(hw, (u8) tmpval);
  860. pstats->rssi = rtlpriv->stats.signal_strength;
  861. }
  862. if (!pstats->is_cck && pstats->packet_toself) {
  863. for (rfpath = RF90_PATH_A; rfpath < rtlphy->num_total_rfpath;
  864. rfpath++) {
  865. if (!rtl8192_phy_check_is_legal_rfpath(hw, rfpath))
  866. continue;
  867. if (rtlpriv->stats.rx_rssi_percentage[rfpath] == 0) {
  868. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  869. pstats->rx_mimo_signalstrength[rfpath];
  870. }
  871. if (pstats->rx_mimo_signalstrength[rfpath] >
  872. rtlpriv->stats.rx_rssi_percentage[rfpath]) {
  873. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  874. ((rtlpriv->stats.
  875. rx_rssi_percentage[rfpath] *
  876. (RX_SMOOTH_FACTOR - 1)) +
  877. (pstats->rx_mimo_signalstrength[rfpath])) /
  878. (RX_SMOOTH_FACTOR);
  879. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  880. rtlpriv->stats.rx_rssi_percentage[rfpath] +
  881. 1;
  882. } else {
  883. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  884. ((rtlpriv->stats.
  885. rx_rssi_percentage[rfpath] *
  886. (RX_SMOOTH_FACTOR - 1)) +
  887. (pstats->rx_mimo_signalstrength[rfpath])) /
  888. (RX_SMOOTH_FACTOR);
  889. }
  890. }
  891. }
  892. }
  893. static void _rtl92c_update_rxsignalstatistics(struct ieee80211_hw *hw,
  894. struct rtl_stats *pstats)
  895. {
  896. struct rtl_priv *rtlpriv = rtl_priv(hw);
  897. int weighting = 0;
  898. if (rtlpriv->stats.recv_signal_power == 0)
  899. rtlpriv->stats.recv_signal_power = pstats->recvsignalpower;
  900. if (pstats->recvsignalpower > rtlpriv->stats.recv_signal_power)
  901. weighting = 5;
  902. else if (pstats->recvsignalpower < rtlpriv->stats.recv_signal_power)
  903. weighting = (-5);
  904. rtlpriv->stats.recv_signal_power =
  905. (rtlpriv->stats.recv_signal_power * 5 +
  906. pstats->recvsignalpower + weighting) / 6;
  907. }
  908. static void _rtl92c_process_pwdb(struct ieee80211_hw *hw,
  909. struct rtl_stats *pstats)
  910. {
  911. struct rtl_priv *rtlpriv = rtl_priv(hw);
  912. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  913. long undecorated_smoothed_pwdb = 0;
  914. if (mac->opmode == NL80211_IFTYPE_ADHOC) {
  915. return;
  916. } else {
  917. undecorated_smoothed_pwdb =
  918. rtlpriv->dm.undecorated_smoothed_pwdb;
  919. }
  920. if (pstats->packet_toself || pstats->packet_beacon) {
  921. if (undecorated_smoothed_pwdb < 0)
  922. undecorated_smoothed_pwdb = pstats->rx_pwdb_all;
  923. if (pstats->rx_pwdb_all > (u32) undecorated_smoothed_pwdb) {
  924. undecorated_smoothed_pwdb =
  925. (((undecorated_smoothed_pwdb) *
  926. (RX_SMOOTH_FACTOR - 1)) +
  927. (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
  928. undecorated_smoothed_pwdb = undecorated_smoothed_pwdb
  929. + 1;
  930. } else {
  931. undecorated_smoothed_pwdb =
  932. (((undecorated_smoothed_pwdb) *
  933. (RX_SMOOTH_FACTOR - 1)) +
  934. (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
  935. }
  936. rtlpriv->dm.undecorated_smoothed_pwdb =
  937. undecorated_smoothed_pwdb;
  938. _rtl92c_update_rxsignalstatistics(hw, pstats);
  939. }
  940. }
  941. static void _rtl92c_process_LINK_Q(struct ieee80211_hw *hw,
  942. struct rtl_stats *pstats)
  943. {
  944. struct rtl_priv *rtlpriv = rtl_priv(hw);
  945. u32 last_evm = 0, n_stream, tmpval;
  946. if (pstats->signalquality != 0) {
  947. if (pstats->packet_toself || pstats->packet_beacon) {
  948. if (rtlpriv->stats.LINK_Q.total_num++ >=
  949. PHY_LINKQUALITY_SLID_WIN_MAX) {
  950. rtlpriv->stats.LINK_Q.total_num =
  951. PHY_LINKQUALITY_SLID_WIN_MAX;
  952. last_evm =
  953. rtlpriv->stats.LINK_Q.elements
  954. [rtlpriv->stats.LINK_Q.index];
  955. rtlpriv->stats.LINK_Q.total_val -=
  956. last_evm;
  957. }
  958. rtlpriv->stats.LINK_Q.total_val +=
  959. pstats->signalquality;
  960. rtlpriv->stats.LINK_Q.elements
  961. [rtlpriv->stats.LINK_Q.index++] =
  962. pstats->signalquality;
  963. if (rtlpriv->stats.LINK_Q.index >=
  964. PHY_LINKQUALITY_SLID_WIN_MAX)
  965. rtlpriv->stats.LINK_Q.index = 0;
  966. tmpval = rtlpriv->stats.LINK_Q.total_val /
  967. rtlpriv->stats.LINK_Q.total_num;
  968. rtlpriv->stats.signal_quality = tmpval;
  969. rtlpriv->stats.last_sigstrength_inpercent = tmpval;
  970. for (n_stream = 0; n_stream < 2;
  971. n_stream++) {
  972. if (pstats->RX_SIGQ[n_stream] != -1) {
  973. if (!rtlpriv->stats.RX_EVM[n_stream]) {
  974. rtlpriv->stats.RX_EVM[n_stream]
  975. = pstats->RX_SIGQ[n_stream];
  976. }
  977. rtlpriv->stats.RX_EVM[n_stream] =
  978. ((rtlpriv->stats.RX_EVM
  979. [n_stream] *
  980. (RX_SMOOTH_FACTOR - 1)) +
  981. (pstats->RX_SIGQ
  982. [n_stream] * 1)) /
  983. (RX_SMOOTH_FACTOR);
  984. }
  985. }
  986. }
  987. } else {
  988. ;
  989. }
  990. }
  991. static void _rtl92c_process_phyinfo(struct ieee80211_hw *hw,
  992. u8 *buffer,
  993. struct rtl_stats *pcurrent_stats)
  994. {
  995. if (!pcurrent_stats->packet_matchbssid &&
  996. !pcurrent_stats->packet_beacon)
  997. return;
  998. _rtl92c_process_ui_rssi(hw, pcurrent_stats);
  999. _rtl92c_process_pwdb(hw, pcurrent_stats);
  1000. _rtl92c_process_LINK_Q(hw, pcurrent_stats);
  1001. }
  1002. void rtl92c_translate_rx_signal_stuff(struct ieee80211_hw *hw,
  1003. struct sk_buff *skb,
  1004. struct rtl_stats *pstats,
  1005. struct rx_desc_92c *pdesc,
  1006. struct rx_fwinfo_92c *p_drvinfo)
  1007. {
  1008. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  1009. struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
  1010. struct ieee80211_hdr *hdr;
  1011. u8 *tmp_buf;
  1012. u8 *praddr;
  1013. __le16 fc;
  1014. u16 type, cpu_fc;
  1015. bool packet_matchbssid, packet_toself, packet_beacon;
  1016. tmp_buf = skb->data + pstats->rx_drvinfo_size + pstats->rx_bufshift;
  1017. hdr = (struct ieee80211_hdr *)tmp_buf;
  1018. fc = hdr->frame_control;
  1019. cpu_fc = le16_to_cpu(fc);
  1020. type = WLAN_FC_GET_TYPE(fc);
  1021. praddr = hdr->addr1;
  1022. packet_matchbssid =
  1023. ((IEEE80211_FTYPE_CTL != type) &&
  1024. (!compare_ether_addr(mac->bssid,
  1025. (cpu_fc & IEEE80211_FCTL_TODS) ?
  1026. hdr->addr1 : (cpu_fc & IEEE80211_FCTL_FROMDS) ?
  1027. hdr->addr2 : hdr->addr3)) &&
  1028. (!pstats->hwerror) && (!pstats->crc) && (!pstats->icv));
  1029. packet_toself = packet_matchbssid &&
  1030. (!compare_ether_addr(praddr, rtlefuse->dev_addr));
  1031. if (ieee80211_is_beacon(fc))
  1032. packet_beacon = true;
  1033. _rtl92c_query_rxphystatus(hw, pstats, pdesc, p_drvinfo,
  1034. packet_matchbssid, packet_toself,
  1035. packet_beacon);
  1036. _rtl92c_process_phyinfo(hw, tmp_buf, pstats);
  1037. }