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@@ -67,6 +67,8 @@
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#include "dma.h"
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#include "dma_v2.h"
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+extern struct kmem_cache *ioat3_sed_cache;
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+
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/* ioat hardware assumes at least two sources for raid operations */
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#define src_cnt_to_sw(x) ((x) + 2)
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#define src_cnt_to_hw(x) ((x) - 2)
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@@ -87,22 +89,8 @@ static const u8 pq_idx_to_field[] = { 1, 4, 5, 0, 1, 2, 4, 5 };
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static const u8 pq16_idx_to_field[] = { 1, 4, 1, 2, 3, 4, 5, 6, 7,
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0, 1, 2, 3, 4, 5, 6 };
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-/*
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- * technically sources 1 and 2 do not require SED, but the op will have
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- * at least 9 descriptors so that's irrelevant.
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- */
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-static const u8 pq16_idx_to_sed[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0,
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- 1, 1, 1, 1, 1, 1, 1 };
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-
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static void ioat3_eh(struct ioat2_dma_chan *ioat);
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-static dma_addr_t xor_get_src(struct ioat_raw_descriptor *descs[2], int idx)
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-{
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- struct ioat_raw_descriptor *raw = descs[xor_idx_to_desc >> idx & 1];
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-
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- return raw->field[xor_idx_to_field[idx]];
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-}
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-
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static void xor_set_src(struct ioat_raw_descriptor *descs[2],
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dma_addr_t addr, u32 offset, int idx)
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{
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@@ -135,12 +123,6 @@ static void pq_set_src(struct ioat_raw_descriptor *descs[2],
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pq->coef[idx] = coef;
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}
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-static int sed_get_pq16_pool_idx(int src_cnt)
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-{
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-
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- return pq16_idx_to_sed[src_cnt];
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-}
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-
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static bool is_jf_ioat(struct pci_dev *pdev)
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{
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switch (pdev->device) {
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@@ -272,7 +254,7 @@ ioat3_alloc_sed(struct ioatdma_device *device, unsigned int hw_pool)
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struct ioat_sed_ent *sed;
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gfp_t flags = __GFP_ZERO | GFP_ATOMIC;
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- sed = kmem_cache_alloc(device->sed_pool, flags);
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+ sed = kmem_cache_alloc(ioat3_sed_cache, flags);
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if (!sed)
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return NULL;
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@@ -280,7 +262,7 @@ ioat3_alloc_sed(struct ioatdma_device *device, unsigned int hw_pool)
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sed->hw = dma_pool_alloc(device->sed_hw_pool[hw_pool],
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flags, &sed->dma);
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if (!sed->hw) {
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- kmem_cache_free(device->sed_pool, sed);
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+ kmem_cache_free(ioat3_sed_cache, sed);
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return NULL;
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}
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@@ -293,165 +275,7 @@ static void ioat3_free_sed(struct ioatdma_device *device, struct ioat_sed_ent *s
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return;
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dma_pool_free(device->sed_hw_pool[sed->hw_pool], sed->hw, sed->dma);
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- kmem_cache_free(device->sed_pool, sed);
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-}
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-
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-static void ioat3_dma_unmap(struct ioat2_dma_chan *ioat,
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- struct ioat_ring_ent *desc, int idx)
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-{
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- struct ioat_chan_common *chan = &ioat->base;
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- struct pci_dev *pdev = chan->device->pdev;
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- size_t len = desc->len;
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- size_t offset = len - desc->hw->size;
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- struct dma_async_tx_descriptor *tx = &desc->txd;
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- enum dma_ctrl_flags flags = tx->flags;
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-
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- switch (desc->hw->ctl_f.op) {
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- case IOAT_OP_COPY:
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- if (!desc->hw->ctl_f.null) /* skip 'interrupt' ops */
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- ioat_dma_unmap(chan, flags, len, desc->hw);
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- break;
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- case IOAT_OP_XOR_VAL:
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- case IOAT_OP_XOR: {
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- struct ioat_xor_descriptor *xor = desc->xor;
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- struct ioat_ring_ent *ext;
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- struct ioat_xor_ext_descriptor *xor_ex = NULL;
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- int src_cnt = src_cnt_to_sw(xor->ctl_f.src_cnt);
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- struct ioat_raw_descriptor *descs[2];
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- int i;
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-
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- if (src_cnt > 5) {
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- ext = ioat2_get_ring_ent(ioat, idx + 1);
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- xor_ex = ext->xor_ex;
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- }
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-
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- if (!(flags & DMA_COMPL_SKIP_SRC_UNMAP)) {
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- descs[0] = (struct ioat_raw_descriptor *) xor;
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- descs[1] = (struct ioat_raw_descriptor *) xor_ex;
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- for (i = 0; i < src_cnt; i++) {
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- dma_addr_t src = xor_get_src(descs, i);
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-
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- ioat_unmap(pdev, src - offset, len,
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- PCI_DMA_TODEVICE, flags, 0);
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- }
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-
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- /* dest is a source in xor validate operations */
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- if (xor->ctl_f.op == IOAT_OP_XOR_VAL) {
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- ioat_unmap(pdev, xor->dst_addr - offset, len,
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- PCI_DMA_TODEVICE, flags, 1);
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- break;
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- }
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- }
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-
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- if (!(flags & DMA_COMPL_SKIP_DEST_UNMAP))
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- ioat_unmap(pdev, xor->dst_addr - offset, len,
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- PCI_DMA_FROMDEVICE, flags, 1);
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- break;
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- }
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- case IOAT_OP_PQ_VAL:
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- case IOAT_OP_PQ: {
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- struct ioat_pq_descriptor *pq = desc->pq;
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- struct ioat_ring_ent *ext;
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- struct ioat_pq_ext_descriptor *pq_ex = NULL;
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- int src_cnt = src_cnt_to_sw(pq->ctl_f.src_cnt);
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- struct ioat_raw_descriptor *descs[2];
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- int i;
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-
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- if (src_cnt > 3) {
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- ext = ioat2_get_ring_ent(ioat, idx + 1);
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- pq_ex = ext->pq_ex;
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- }
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-
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- /* in the 'continue' case don't unmap the dests as sources */
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- if (dmaf_p_disabled_continue(flags))
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- src_cnt--;
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- else if (dmaf_continue(flags))
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- src_cnt -= 3;
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-
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- if (!(flags & DMA_COMPL_SKIP_SRC_UNMAP)) {
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- descs[0] = (struct ioat_raw_descriptor *) pq;
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- descs[1] = (struct ioat_raw_descriptor *) pq_ex;
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- for (i = 0; i < src_cnt; i++) {
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- dma_addr_t src = pq_get_src(descs, i);
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-
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- ioat_unmap(pdev, src - offset, len,
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- PCI_DMA_TODEVICE, flags, 0);
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- }
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-
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- /* the dests are sources in pq validate operations */
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- if (pq->ctl_f.op == IOAT_OP_XOR_VAL) {
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- if (!(flags & DMA_PREP_PQ_DISABLE_P))
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- ioat_unmap(pdev, pq->p_addr - offset,
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- len, PCI_DMA_TODEVICE, flags, 0);
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- if (!(flags & DMA_PREP_PQ_DISABLE_Q))
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- ioat_unmap(pdev, pq->q_addr - offset,
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- len, PCI_DMA_TODEVICE, flags, 0);
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- break;
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- }
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- }
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-
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- if (!(flags & DMA_COMPL_SKIP_DEST_UNMAP)) {
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- if (!(flags & DMA_PREP_PQ_DISABLE_P))
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- ioat_unmap(pdev, pq->p_addr - offset, len,
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- PCI_DMA_BIDIRECTIONAL, flags, 1);
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- if (!(flags & DMA_PREP_PQ_DISABLE_Q))
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- ioat_unmap(pdev, pq->q_addr - offset, len,
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- PCI_DMA_BIDIRECTIONAL, flags, 1);
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- }
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- break;
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- }
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- case IOAT_OP_PQ_16S:
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- case IOAT_OP_PQ_VAL_16S: {
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- struct ioat_pq_descriptor *pq = desc->pq;
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- int src_cnt = src16_cnt_to_sw(pq->ctl_f.src_cnt);
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- struct ioat_raw_descriptor *descs[4];
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- int i;
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-
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- /* in the 'continue' case don't unmap the dests as sources */
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- if (dmaf_p_disabled_continue(flags))
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- src_cnt--;
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- else if (dmaf_continue(flags))
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- src_cnt -= 3;
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-
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- if (!(flags & DMA_COMPL_SKIP_SRC_UNMAP)) {
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- descs[0] = (struct ioat_raw_descriptor *)pq;
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- descs[1] = (struct ioat_raw_descriptor *)(desc->sed->hw);
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- descs[2] = (struct ioat_raw_descriptor *)(&desc->sed->hw->b[0]);
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- for (i = 0; i < src_cnt; i++) {
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- dma_addr_t src = pq16_get_src(descs, i);
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-
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- ioat_unmap(pdev, src - offset, len,
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- PCI_DMA_TODEVICE, flags, 0);
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- }
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-
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- /* the dests are sources in pq validate operations */
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- if (pq->ctl_f.op == IOAT_OP_XOR_VAL) {
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- if (!(flags & DMA_PREP_PQ_DISABLE_P))
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- ioat_unmap(pdev, pq->p_addr - offset,
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- len, PCI_DMA_TODEVICE,
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- flags, 0);
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- if (!(flags & DMA_PREP_PQ_DISABLE_Q))
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- ioat_unmap(pdev, pq->q_addr - offset,
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- len, PCI_DMA_TODEVICE,
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- flags, 0);
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- break;
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- }
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- }
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-
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- if (!(flags & DMA_COMPL_SKIP_DEST_UNMAP)) {
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- if (!(flags & DMA_PREP_PQ_DISABLE_P))
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- ioat_unmap(pdev, pq->p_addr - offset, len,
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- PCI_DMA_BIDIRECTIONAL, flags, 1);
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- if (!(flags & DMA_PREP_PQ_DISABLE_Q))
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- ioat_unmap(pdev, pq->q_addr - offset, len,
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- PCI_DMA_BIDIRECTIONAL, flags, 1);
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- }
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- break;
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- }
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- default:
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- dev_err(&pdev->dev, "%s: unknown op type: %#x\n",
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- __func__, desc->hw->ctl_f.op);
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- }
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+ kmem_cache_free(ioat3_sed_cache, sed);
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}
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static bool desc_has_ext(struct ioat_ring_ent *desc)
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@@ -577,7 +401,7 @@ static void __cleanup(struct ioat2_dma_chan *ioat, dma_addr_t phys_complete)
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tx = &desc->txd;
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if (tx->cookie) {
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dma_cookie_complete(tx);
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- ioat3_dma_unmap(ioat, desc, idx + i);
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+ dma_descriptor_unmap(tx);
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if (tx->callback) {
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tx->callback(tx->callback_param);
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tx->callback = NULL;
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@@ -1129,9 +953,6 @@ __ioat3_prep_pq16_lock(struct dma_chan *c, enum sum_check_flags *result,
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u8 op;
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int i, s, idx, num_descs;
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- /* this function only handles src_cnt 9 - 16 */
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- BUG_ON(src_cnt < 9);
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-
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/* this function is only called with 9-16 sources */
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op = result ? IOAT_OP_PQ_VAL_16S : IOAT_OP_PQ_16S;
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@@ -1159,8 +980,7 @@ __ioat3_prep_pq16_lock(struct dma_chan *c, enum sum_check_flags *result,
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descs[0] = (struct ioat_raw_descriptor *) pq;
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- desc->sed = ioat3_alloc_sed(device,
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- sed_get_pq16_pool_idx(src_cnt));
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+ desc->sed = ioat3_alloc_sed(device, (src_cnt-2) >> 3);
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if (!desc->sed) {
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dev_err(to_dev(chan),
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"%s: no free sed entries\n", __func__);
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@@ -1218,13 +1038,21 @@ __ioat3_prep_pq16_lock(struct dma_chan *c, enum sum_check_flags *result,
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return &desc->txd;
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}
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+static int src_cnt_flags(unsigned int src_cnt, unsigned long flags)
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+{
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+ if (dmaf_p_disabled_continue(flags))
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+ return src_cnt + 1;
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+ else if (dmaf_continue(flags))
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+ return src_cnt + 3;
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+ else
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+ return src_cnt;
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+}
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+
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static struct dma_async_tx_descriptor *
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ioat3_prep_pq(struct dma_chan *chan, dma_addr_t *dst, dma_addr_t *src,
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unsigned int src_cnt, const unsigned char *scf, size_t len,
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unsigned long flags)
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{
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- struct dma_device *dma = chan->device;
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-
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/* specify valid address for disabled result */
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if (flags & DMA_PREP_PQ_DISABLE_P)
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dst[0] = dst[1];
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@@ -1244,7 +1072,7 @@ ioat3_prep_pq(struct dma_chan *chan, dma_addr_t *dst, dma_addr_t *src,
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single_source_coef[0] = scf[0];
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single_source_coef[1] = 0;
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- return (src_cnt > 8) && (dma->max_pq > 8) ?
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+ return src_cnt_flags(src_cnt, flags) > 8 ?
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__ioat3_prep_pq16_lock(chan, NULL, dst, single_source,
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2, single_source_coef, len,
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flags) :
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@@ -1252,7 +1080,7 @@ ioat3_prep_pq(struct dma_chan *chan, dma_addr_t *dst, dma_addr_t *src,
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single_source_coef, len, flags);
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} else {
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- return (src_cnt > 8) && (dma->max_pq > 8) ?
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+ return src_cnt_flags(src_cnt, flags) > 8 ?
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__ioat3_prep_pq16_lock(chan, NULL, dst, src, src_cnt,
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scf, len, flags) :
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__ioat3_prep_pq_lock(chan, NULL, dst, src, src_cnt,
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@@ -1265,8 +1093,6 @@ ioat3_prep_pq_val(struct dma_chan *chan, dma_addr_t *pq, dma_addr_t *src,
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unsigned int src_cnt, const unsigned char *scf, size_t len,
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enum sum_check_flags *pqres, unsigned long flags)
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{
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- struct dma_device *dma = chan->device;
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-
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/* specify valid address for disabled result */
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if (flags & DMA_PREP_PQ_DISABLE_P)
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pq[0] = pq[1];
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@@ -1278,7 +1104,7 @@ ioat3_prep_pq_val(struct dma_chan *chan, dma_addr_t *pq, dma_addr_t *src,
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*/
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*pqres = 0;
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- return (src_cnt > 8) && (dma->max_pq > 8) ?
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+ return src_cnt_flags(src_cnt, flags) > 8 ?
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__ioat3_prep_pq16_lock(chan, pqres, pq, src, src_cnt, scf, len,
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flags) :
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__ioat3_prep_pq_lock(chan, pqres, pq, src, src_cnt, scf, len,
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@@ -1289,7 +1115,6 @@ static struct dma_async_tx_descriptor *
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ioat3_prep_pqxor(struct dma_chan *chan, dma_addr_t dst, dma_addr_t *src,
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unsigned int src_cnt, size_t len, unsigned long flags)
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{
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- struct dma_device *dma = chan->device;
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unsigned char scf[src_cnt];
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dma_addr_t pq[2];
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@@ -1298,7 +1123,7 @@ ioat3_prep_pqxor(struct dma_chan *chan, dma_addr_t dst, dma_addr_t *src,
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flags |= DMA_PREP_PQ_DISABLE_Q;
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pq[1] = dst; /* specify valid address for disabled result */
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- return (src_cnt > 8) && (dma->max_pq > 8) ?
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+ return src_cnt_flags(src_cnt, flags) > 8 ?
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__ioat3_prep_pq16_lock(chan, NULL, pq, src, src_cnt, scf, len,
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flags) :
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__ioat3_prep_pq_lock(chan, NULL, pq, src, src_cnt, scf, len,
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@@ -1310,7 +1135,6 @@ ioat3_prep_pqxor_val(struct dma_chan *chan, dma_addr_t *src,
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unsigned int src_cnt, size_t len,
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enum sum_check_flags *result, unsigned long flags)
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{
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- struct dma_device *dma = chan->device;
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unsigned char scf[src_cnt];
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dma_addr_t pq[2];
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@@ -1324,8 +1148,7 @@ ioat3_prep_pqxor_val(struct dma_chan *chan, dma_addr_t *src,
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flags |= DMA_PREP_PQ_DISABLE_Q;
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pq[1] = pq[0]; /* specify valid address for disabled result */
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-
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- return (src_cnt > 8) && (dma->max_pq > 8) ?
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+ return src_cnt_flags(src_cnt, flags) > 8 ?
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__ioat3_prep_pq16_lock(chan, result, pq, &src[1], src_cnt - 1,
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scf, len, flags) :
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__ioat3_prep_pq_lock(chan, result, pq, &src[1], src_cnt - 1,
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@@ -1444,9 +1267,7 @@ static int ioat_xor_val_self_test(struct ioatdma_device *device)
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DMA_TO_DEVICE);
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tx = dma->device_prep_dma_xor(dma_chan, dest_dma, dma_srcs,
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IOAT_NUM_SRC_TEST, PAGE_SIZE,
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- DMA_PREP_INTERRUPT |
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- DMA_COMPL_SKIP_SRC_UNMAP |
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- DMA_COMPL_SKIP_DEST_UNMAP);
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+ DMA_PREP_INTERRUPT);
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if (!tx) {
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dev_err(dev, "Self-test xor prep failed\n");
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@@ -1507,9 +1328,7 @@ static int ioat_xor_val_self_test(struct ioatdma_device *device)
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DMA_TO_DEVICE);
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tx = dma->device_prep_dma_xor_val(dma_chan, dma_srcs,
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IOAT_NUM_SRC_TEST + 1, PAGE_SIZE,
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- &xor_val_result, DMA_PREP_INTERRUPT |
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- DMA_COMPL_SKIP_SRC_UNMAP |
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- DMA_COMPL_SKIP_DEST_UNMAP);
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+ &xor_val_result, DMA_PREP_INTERRUPT);
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if (!tx) {
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dev_err(dev, "Self-test zero prep failed\n");
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err = -ENODEV;
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@@ -1545,6 +1364,8 @@ static int ioat_xor_val_self_test(struct ioatdma_device *device)
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goto free_resources;
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}
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+ memset(page_address(dest), 0, PAGE_SIZE);
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+
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/* test for non-zero parity sum */
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op = IOAT_OP_XOR_VAL;
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@@ -1554,9 +1375,7 @@ static int ioat_xor_val_self_test(struct ioatdma_device *device)
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DMA_TO_DEVICE);
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tx = dma->device_prep_dma_xor_val(dma_chan, dma_srcs,
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IOAT_NUM_SRC_TEST + 1, PAGE_SIZE,
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- &xor_val_result, DMA_PREP_INTERRUPT |
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- DMA_COMPL_SKIP_SRC_UNMAP |
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- DMA_COMPL_SKIP_DEST_UNMAP);
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+ &xor_val_result, DMA_PREP_INTERRUPT);
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if (!tx) {
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dev_err(dev, "Self-test 2nd zero prep failed\n");
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err = -ENODEV;
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@@ -1630,52 +1449,36 @@ static int ioat3_dma_self_test(struct ioatdma_device *device)
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static int ioat3_irq_reinit(struct ioatdma_device *device)
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{
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- int msixcnt = device->common.chancnt;
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struct pci_dev *pdev = device->pdev;
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- int i;
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- struct msix_entry *msix;
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- struct ioat_chan_common *chan;
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- int err = 0;
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+ int irq = pdev->irq, i;
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+
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+ if (!is_bwd_ioat(pdev))
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+ return 0;
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switch (device->irq_mode) {
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case IOAT_MSIX:
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+ for (i = 0; i < device->common.chancnt; i++) {
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+ struct msix_entry *msix = &device->msix_entries[i];
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+ struct ioat_chan_common *chan;
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- for (i = 0; i < msixcnt; i++) {
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- msix = &device->msix_entries[i];
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chan = ioat_chan_by_index(device, i);
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devm_free_irq(&pdev->dev, msix->vector, chan);
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}
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|
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pci_disable_msix(pdev);
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break;
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-
|
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- case IOAT_MSIX_SINGLE:
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|
- msix = &device->msix_entries[0];
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|
- chan = ioat_chan_by_index(device, 0);
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|
|
- devm_free_irq(&pdev->dev, msix->vector, chan);
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|
- pci_disable_msix(pdev);
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|
|
- break;
|
|
|
-
|
|
|
case IOAT_MSI:
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|
|
- chan = ioat_chan_by_index(device, 0);
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|
- devm_free_irq(&pdev->dev, pdev->irq, chan);
|
|
|
pci_disable_msi(pdev);
|
|
|
- break;
|
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|
-
|
|
|
+ /* fall through */
|
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case IOAT_INTX:
|
|
|
- chan = ioat_chan_by_index(device, 0);
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|
|
- devm_free_irq(&pdev->dev, pdev->irq, chan);
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|
|
+ devm_free_irq(&pdev->dev, irq, device);
|
|
|
break;
|
|
|
-
|
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|
default:
|
|
|
return 0;
|
|
|
}
|
|
|
-
|
|
|
device->irq_mode = IOAT_NOIRQ;
|
|
|
|
|
|
- err = ioat_dma_setup_interrupts(device);
|
|
|
-
|
|
|
- return err;
|
|
|
+ return ioat_dma_setup_interrupts(device);
|
|
|
}
|
|
|
|
|
|
static int ioat3_reset_hw(struct ioat_chan_common *chan)
|
|
@@ -1718,14 +1521,12 @@ static int ioat3_reset_hw(struct ioat_chan_common *chan)
|
|
|
}
|
|
|
|
|
|
err = ioat2_reset_sync(chan, msecs_to_jiffies(200));
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|
|
- if (err) {
|
|
|
- dev_err(&pdev->dev, "Failed to reset!\n");
|
|
|
- return err;
|
|
|
- }
|
|
|
-
|
|
|
- if (device->irq_mode != IOAT_NOIRQ && is_bwd_ioat(pdev))
|
|
|
+ if (!err)
|
|
|
err = ioat3_irq_reinit(device);
|
|
|
|
|
|
+ if (err)
|
|
|
+ dev_err(&pdev->dev, "Failed to reset: %d\n", err);
|
|
|
+
|
|
|
return err;
|
|
|
}
|
|
|
|
|
@@ -1835,21 +1636,15 @@ int ioat3_dma_probe(struct ioatdma_device *device, int dca)
|
|
|
char pool_name[14];
|
|
|
int i;
|
|
|
|
|
|
- /* allocate sw descriptor pool for SED */
|
|
|
- device->sed_pool = kmem_cache_create("ioat_sed",
|
|
|
- sizeof(struct ioat_sed_ent), 0, 0, NULL);
|
|
|
- if (!device->sed_pool)
|
|
|
- return -ENOMEM;
|
|
|
-
|
|
|
for (i = 0; i < MAX_SED_POOLS; i++) {
|
|
|
snprintf(pool_name, 14, "ioat_hw%d_sed", i);
|
|
|
|
|
|
/* allocate SED DMA pool */
|
|
|
- device->sed_hw_pool[i] = dma_pool_create(pool_name,
|
|
|
+ device->sed_hw_pool[i] = dmam_pool_create(pool_name,
|
|
|
&pdev->dev,
|
|
|
SED_SIZE * (i + 1), 64, 0);
|
|
|
if (!device->sed_hw_pool[i])
|
|
|
- goto sed_pool_cleanup;
|
|
|
+ return -ENOMEM;
|
|
|
|
|
|
}
|
|
|
}
|
|
@@ -1875,28 +1670,4 @@ int ioat3_dma_probe(struct ioatdma_device *device, int dca)
|
|
|
device->dca = ioat3_dca_init(pdev, device->reg_base);
|
|
|
|
|
|
return 0;
|
|
|
-
|
|
|
-sed_pool_cleanup:
|
|
|
- if (device->sed_pool) {
|
|
|
- int i;
|
|
|
- kmem_cache_destroy(device->sed_pool);
|
|
|
-
|
|
|
- for (i = 0; i < MAX_SED_POOLS; i++)
|
|
|
- if (device->sed_hw_pool[i])
|
|
|
- dma_pool_destroy(device->sed_hw_pool[i]);
|
|
|
- }
|
|
|
-
|
|
|
- return -ENOMEM;
|
|
|
-}
|
|
|
-
|
|
|
-void ioat3_dma_remove(struct ioatdma_device *device)
|
|
|
-{
|
|
|
- if (device->sed_pool) {
|
|
|
- int i;
|
|
|
- kmem_cache_destroy(device->sed_pool);
|
|
|
-
|
|
|
- for (i = 0; i < MAX_SED_POOLS; i++)
|
|
|
- if (device->sed_hw_pool[i])
|
|
|
- dma_pool_destroy(device->sed_hw_pool[i]);
|
|
|
- }
|
|
|
}
|