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@@ -183,7 +183,7 @@ static const char *iwl3945_escape_essid(const char *essid, u8 essid_len)
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* (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
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***************************************************/
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-static int iwl3945_queue_space(const struct iwl3945_queue *q)
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+int iwl3945_queue_space(const struct iwl3945_queue *q)
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{
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int s = q->read_ptr - q->write_ptr;
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@@ -199,33 +199,14 @@ static int iwl3945_queue_space(const struct iwl3945_queue *q)
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return s;
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}
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-/**
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- * iwl3945_queue_inc_wrap - increment queue index, wrap back to beginning
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- * @index -- current index
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- * @n_bd -- total number of entries in queue (must be power of 2)
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- */
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-static inline int iwl3945_queue_inc_wrap(int index, int n_bd)
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-{
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- return ++index & (n_bd - 1);
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-}
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-
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-/**
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- * iwl3945_queue_dec_wrap - increment queue index, wrap back to end
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- * @index -- current index
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- * @n_bd -- total number of entries in queue (must be power of 2)
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- */
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-static inline int iwl3945_queue_dec_wrap(int index, int n_bd)
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-{
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- return --index & (n_bd - 1);
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-}
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-
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-static inline int x2_queue_used(const struct iwl3945_queue *q, int i)
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+int iwl3945_x2_queue_used(const struct iwl3945_queue *q, int i)
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{
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return q->write_ptr > q->read_ptr ?
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(i >= q->read_ptr && i < q->write_ptr) :
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!(i < q->read_ptr && i >= q->write_ptr);
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}
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+
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static inline u8 get_cmd_index(struct iwl3945_queue *q, u32 index, int is_huge)
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{
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/* This is for scan command, the big buffer at end of command array */
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@@ -246,8 +227,8 @@ static int iwl3945_queue_init(struct iwl3945_priv *priv, struct iwl3945_queue *q
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q->n_window = slots_num;
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q->id = id;
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- /* count must be power-of-two size, otherwise iwl3945_queue_inc_wrap
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- * and iwl3945_queue_dec_wrap are broken. */
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+ /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
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+ * and iwl_queue_dec_wrap are broken. */
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BUG_ON(!is_power_of_2(count));
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/* slots_num must be power-of-two size, otherwise
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@@ -347,7 +328,7 @@ int iwl3945_tx_queue_init(struct iwl3945_priv *priv,
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txq->need_update = 0;
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/* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
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- * iwl3945_queue_inc_wrap and iwl3945_queue_dec_wrap are broken. */
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+ * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
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BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
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/* Initialize queue high/low-water, head/tail indexes */
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@@ -378,7 +359,7 @@ void iwl3945_tx_queue_free(struct iwl3945_priv *priv, struct iwl3945_tx_queue *t
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/* first, empty all BD's */
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for (; q->write_ptr != q->read_ptr;
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- q->read_ptr = iwl3945_queue_inc_wrap(q->read_ptr, q->n_bd))
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+ q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
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iwl3945_hw_txq_free_tfd(priv, txq);
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len = sizeof(struct iwl3945_cmd) * q->n_window;
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@@ -717,7 +698,7 @@ static int iwl3945_enqueue_hcmd(struct iwl3945_priv *priv, struct iwl3945_host_c
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txq->need_update = 1;
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/* Increment and update queue's write index */
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- q->write_ptr = iwl3945_queue_inc_wrap(q->write_ptr, q->n_bd);
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+ q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
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ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
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spin_unlock_irqrestore(&priv->hcmd_lock, flags);
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@@ -2797,7 +2778,7 @@ static int iwl3945_tx_skb(struct iwl3945_priv *priv,
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ieee80211_get_hdrlen(fc));
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/* Tell device the write index *just past* this latest filled TFD */
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- q->write_ptr = iwl3945_queue_inc_wrap(q->write_ptr, q->n_bd);
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+ q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
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rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
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spin_unlock_irqrestore(&priv->lock, flags);
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@@ -3189,16 +3170,16 @@ static int iwl3945_tx_queue_reclaim(struct iwl3945_priv *priv, int txq_id, int i
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struct iwl3945_queue *q = &txq->q;
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int nfreed = 0;
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- if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
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+ if ((index >= q->n_bd) || (iwl3945_x2_queue_used(q, index) == 0)) {
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IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
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"is out of range [0-%d] %d %d.\n", txq_id,
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index, q->n_bd, q->write_ptr, q->read_ptr);
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return 0;
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}
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- for (index = iwl3945_queue_inc_wrap(index, q->n_bd);
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+ for (index = iwl_queue_inc_wrap(index, q->n_bd);
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q->read_ptr != index;
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- q->read_ptr = iwl3945_queue_inc_wrap(q->read_ptr, q->n_bd)) {
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+ q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
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if (txq_id != IWL_CMD_QUEUE_NUM) {
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iwl3945_txstatus_to_ieee(priv,
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&(txq->txb[txq->q.read_ptr]));
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@@ -3245,7 +3226,7 @@ static void iwl3945_rx_reply_tx(struct iwl3945_priv *priv,
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struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
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u32 status = le32_to_cpu(tx_resp->status);
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- if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
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+ if ((index >= txq->q.n_bd) || (iwl3945_x2_queue_used(&txq->q, index) == 0)) {
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IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
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"is out of range [0-%d] %d %d\n", txq_id,
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index, txq->q.n_bd, txq->q.write_ptr,
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