iwl4965-base.c 253 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/version.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/mac80211.h>
  43. #include <asm/div64.h>
  44. #include "iwl-core.h"
  45. #include "iwl-4965.h"
  46. #include "iwl-helpers.h"
  47. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  48. struct iwl4965_tx_queue *txq);
  49. /******************************************************************************
  50. *
  51. * module boiler plate
  52. *
  53. ******************************************************************************/
  54. /* module parameters */
  55. static int iwl4965_param_disable_hw_scan; /* def: 0 = use 4965's h/w scan */
  56. static int iwl4965_param_debug; /* def: 0 = minimal debug log messages */
  57. static int iwl4965_param_disable; /* def: enable radio */
  58. static int iwl4965_param_antenna; /* def: 0 = both antennas (use diversity) */
  59. int iwl4965_param_hwcrypto; /* def: using software encryption */
  60. static int iwl4965_param_qos_enable = 1; /* def: 1 = use quality of service */
  61. int iwl4965_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 16 Tx queues */
  62. int iwl4965_param_amsdu_size_8K; /* def: enable 8K amsdu size */
  63. /*
  64. * module name, copyright, version, etc.
  65. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  66. */
  67. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  68. #ifdef CONFIG_IWL4965_DEBUG
  69. #define VD "d"
  70. #else
  71. #define VD
  72. #endif
  73. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  74. #define VS "s"
  75. #else
  76. #define VS
  77. #endif
  78. #define DRV_VERSION IWLWIFI_VERSION VD VS
  79. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  80. MODULE_VERSION(DRV_VERSION);
  81. MODULE_AUTHOR(DRV_COPYRIGHT);
  82. MODULE_LICENSE("GPL");
  83. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  84. {
  85. u16 fc = le16_to_cpu(hdr->frame_control);
  86. int hdr_len = ieee80211_get_hdrlen(fc);
  87. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  88. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  89. return NULL;
  90. }
  91. static const struct ieee80211_supported_band *iwl4965_get_hw_mode(
  92. struct iwl4965_priv *priv, enum ieee80211_band band)
  93. {
  94. return priv->hw->wiphy->bands[band];
  95. }
  96. static int iwl4965_is_empty_essid(const char *essid, int essid_len)
  97. {
  98. /* Single white space is for Linksys APs */
  99. if (essid_len == 1 && essid[0] == ' ')
  100. return 1;
  101. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  102. while (essid_len) {
  103. essid_len--;
  104. if (essid[essid_len] != '\0')
  105. return 0;
  106. }
  107. return 1;
  108. }
  109. static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
  110. {
  111. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  112. const char *s = essid;
  113. char *d = escaped;
  114. if (iwl4965_is_empty_essid(essid, essid_len)) {
  115. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  116. return escaped;
  117. }
  118. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  119. while (essid_len--) {
  120. if (*s == '\0') {
  121. *d++ = '\\';
  122. *d++ = '0';
  123. s++;
  124. } else
  125. *d++ = *s++;
  126. }
  127. *d = '\0';
  128. return escaped;
  129. }
  130. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  131. * DMA services
  132. *
  133. * Theory of operation
  134. *
  135. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  136. * of buffer descriptors, each of which points to one or more data buffers for
  137. * the device to read from or fill. Driver and device exchange status of each
  138. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  139. * entries in each circular buffer, to protect against confusing empty and full
  140. * queue states.
  141. *
  142. * The device reads or writes the data in the queues via the device's several
  143. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  144. *
  145. * For Tx queue, there are low mark and high mark limits. If, after queuing
  146. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  147. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  148. * Tx queue resumed.
  149. *
  150. * The 4965 operates with up to 17 queues: One receive queue, one transmit
  151. * queue (#4) for sending commands to the device firmware, and 15 other
  152. * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
  153. *
  154. * See more detailed info in iwl-4965-hw.h.
  155. ***************************************************/
  156. int iwl4965_queue_space(const struct iwl4965_queue *q)
  157. {
  158. int s = q->read_ptr - q->write_ptr;
  159. if (q->read_ptr > q->write_ptr)
  160. s -= q->n_bd;
  161. if (s <= 0)
  162. s += q->n_window;
  163. /* keep some reserve to not confuse empty and full situations */
  164. s -= 2;
  165. if (s < 0)
  166. s = 0;
  167. return s;
  168. }
  169. static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
  170. {
  171. return q->write_ptr > q->read_ptr ?
  172. (i >= q->read_ptr && i < q->write_ptr) :
  173. !(i < q->read_ptr && i >= q->write_ptr);
  174. }
  175. static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
  176. {
  177. /* This is for scan command, the big buffer at end of command array */
  178. if (is_huge)
  179. return q->n_window; /* must be power of 2 */
  180. /* Otherwise, use normal size buffers */
  181. return index & (q->n_window - 1);
  182. }
  183. /**
  184. * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
  185. */
  186. static int iwl4965_queue_init(struct iwl4965_priv *priv, struct iwl4965_queue *q,
  187. int count, int slots_num, u32 id)
  188. {
  189. q->n_bd = count;
  190. q->n_window = slots_num;
  191. q->id = id;
  192. /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
  193. * and iwl_queue_dec_wrap are broken. */
  194. BUG_ON(!is_power_of_2(count));
  195. /* slots_num must be power-of-two size, otherwise
  196. * get_cmd_index is broken. */
  197. BUG_ON(!is_power_of_2(slots_num));
  198. q->low_mark = q->n_window / 4;
  199. if (q->low_mark < 4)
  200. q->low_mark = 4;
  201. q->high_mark = q->n_window / 8;
  202. if (q->high_mark < 2)
  203. q->high_mark = 2;
  204. q->write_ptr = q->read_ptr = 0;
  205. return 0;
  206. }
  207. /**
  208. * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  209. */
  210. static int iwl4965_tx_queue_alloc(struct iwl4965_priv *priv,
  211. struct iwl4965_tx_queue *txq, u32 id)
  212. {
  213. struct pci_dev *dev = priv->pci_dev;
  214. /* Driver private data, only for Tx (not command) queues,
  215. * not shared with device. */
  216. if (id != IWL_CMD_QUEUE_NUM) {
  217. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  218. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  219. if (!txq->txb) {
  220. IWL_ERROR("kmalloc for auxiliary BD "
  221. "structures failed\n");
  222. goto error;
  223. }
  224. } else
  225. txq->txb = NULL;
  226. /* Circular buffer of transmit frame descriptors (TFDs),
  227. * shared with device */
  228. txq->bd = pci_alloc_consistent(dev,
  229. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  230. &txq->q.dma_addr);
  231. if (!txq->bd) {
  232. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  233. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  234. goto error;
  235. }
  236. txq->q.id = id;
  237. return 0;
  238. error:
  239. if (txq->txb) {
  240. kfree(txq->txb);
  241. txq->txb = NULL;
  242. }
  243. return -ENOMEM;
  244. }
  245. /**
  246. * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
  247. */
  248. int iwl4965_tx_queue_init(struct iwl4965_priv *priv,
  249. struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
  250. {
  251. struct pci_dev *dev = priv->pci_dev;
  252. int len;
  253. int rc = 0;
  254. /*
  255. * Alloc buffer array for commands (Tx or other types of commands).
  256. * For the command queue (#4), allocate command space + one big
  257. * command for scan, since scan command is very huge; the system will
  258. * not have two scans at the same time, so only one is needed.
  259. * For normal Tx queues (all other queues), no super-size command
  260. * space is needed.
  261. */
  262. len = sizeof(struct iwl4965_cmd) * slots_num;
  263. if (txq_id == IWL_CMD_QUEUE_NUM)
  264. len += IWL_MAX_SCAN_SIZE;
  265. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  266. if (!txq->cmd)
  267. return -ENOMEM;
  268. /* Alloc driver data array and TFD circular buffer */
  269. rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
  270. if (rc) {
  271. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  272. return -ENOMEM;
  273. }
  274. txq->need_update = 0;
  275. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  276. * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
  277. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  278. /* Initialize queue's high/low-water marks, and head/tail indexes */
  279. iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  280. /* Tell device where to find queue */
  281. iwl4965_hw_tx_queue_init(priv, txq);
  282. return 0;
  283. }
  284. /**
  285. * iwl4965_tx_queue_free - Deallocate DMA queue.
  286. * @txq: Transmit queue to deallocate.
  287. *
  288. * Empty queue by removing and destroying all BD's.
  289. * Free all buffers.
  290. * 0-fill, but do not free "txq" descriptor structure.
  291. */
  292. void iwl4965_tx_queue_free(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
  293. {
  294. struct iwl4965_queue *q = &txq->q;
  295. struct pci_dev *dev = priv->pci_dev;
  296. int len;
  297. if (q->n_bd == 0)
  298. return;
  299. /* first, empty all BD's */
  300. for (; q->write_ptr != q->read_ptr;
  301. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
  302. iwl4965_hw_txq_free_tfd(priv, txq);
  303. len = sizeof(struct iwl4965_cmd) * q->n_window;
  304. if (q->id == IWL_CMD_QUEUE_NUM)
  305. len += IWL_MAX_SCAN_SIZE;
  306. /* De-alloc array of command/tx buffers */
  307. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  308. /* De-alloc circular buffer of TFDs */
  309. if (txq->q.n_bd)
  310. pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
  311. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  312. /* De-alloc array of per-TFD driver data */
  313. if (txq->txb) {
  314. kfree(txq->txb);
  315. txq->txb = NULL;
  316. }
  317. /* 0-fill queue descriptor structure */
  318. memset(txq, 0, sizeof(*txq));
  319. }
  320. const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  321. /*************** STATION TABLE MANAGEMENT ****
  322. * mac80211 should be examined to determine if sta_info is duplicating
  323. * the functionality provided here
  324. */
  325. /**************************************************************/
  326. #if 0 /* temporary disable till we add real remove station */
  327. /**
  328. * iwl4965_remove_station - Remove driver's knowledge of station.
  329. *
  330. * NOTE: This does not remove station from device's station table.
  331. */
  332. static u8 iwl4965_remove_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
  333. {
  334. int index = IWL_INVALID_STATION;
  335. int i;
  336. unsigned long flags;
  337. spin_lock_irqsave(&priv->sta_lock, flags);
  338. if (is_ap)
  339. index = IWL_AP_ID;
  340. else if (is_broadcast_ether_addr(addr))
  341. index = priv->hw_setting.bcast_sta_id;
  342. else
  343. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  344. if (priv->stations[i].used &&
  345. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  346. addr)) {
  347. index = i;
  348. break;
  349. }
  350. if (unlikely(index == IWL_INVALID_STATION))
  351. goto out;
  352. if (priv->stations[index].used) {
  353. priv->stations[index].used = 0;
  354. priv->num_stations--;
  355. }
  356. BUG_ON(priv->num_stations < 0);
  357. out:
  358. spin_unlock_irqrestore(&priv->sta_lock, flags);
  359. return 0;
  360. }
  361. #endif
  362. /**
  363. * iwl4965_clear_stations_table - Clear the driver's station table
  364. *
  365. * NOTE: This does not clear or otherwise alter the device's station table.
  366. */
  367. static void iwl4965_clear_stations_table(struct iwl4965_priv *priv)
  368. {
  369. unsigned long flags;
  370. spin_lock_irqsave(&priv->sta_lock, flags);
  371. priv->num_stations = 0;
  372. memset(priv->stations, 0, sizeof(priv->stations));
  373. spin_unlock_irqrestore(&priv->sta_lock, flags);
  374. }
  375. /**
  376. * iwl4965_add_station_flags - Add station to tables in driver and device
  377. */
  378. u8 iwl4965_add_station_flags(struct iwl4965_priv *priv, const u8 *addr,
  379. int is_ap, u8 flags, void *ht_data)
  380. {
  381. int i;
  382. int index = IWL_INVALID_STATION;
  383. struct iwl4965_station_entry *station;
  384. unsigned long flags_spin;
  385. DECLARE_MAC_BUF(mac);
  386. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  387. if (is_ap)
  388. index = IWL_AP_ID;
  389. else if (is_broadcast_ether_addr(addr))
  390. index = priv->hw_setting.bcast_sta_id;
  391. else
  392. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  393. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  394. addr)) {
  395. index = i;
  396. break;
  397. }
  398. if (!priv->stations[i].used &&
  399. index == IWL_INVALID_STATION)
  400. index = i;
  401. }
  402. /* These two conditions have the same outcome, but keep them separate
  403. since they have different meanings */
  404. if (unlikely(index == IWL_INVALID_STATION)) {
  405. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  406. return index;
  407. }
  408. if (priv->stations[index].used &&
  409. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  410. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  411. return index;
  412. }
  413. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  414. station = &priv->stations[index];
  415. station->used = 1;
  416. priv->num_stations++;
  417. /* Set up the REPLY_ADD_STA command to send to device */
  418. memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
  419. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  420. station->sta.mode = 0;
  421. station->sta.sta.sta_id = index;
  422. station->sta.station_flags = 0;
  423. #ifdef CONFIG_IWL4965_HT
  424. /* BCAST station and IBSS stations do not work in HT mode */
  425. if (index != priv->hw_setting.bcast_sta_id &&
  426. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  427. iwl4965_set_ht_add_station(priv, index,
  428. (struct ieee80211_ht_info *) ht_data);
  429. #endif /*CONFIG_IWL4965_HT*/
  430. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  431. /* Add station to device's station table */
  432. iwl4965_send_add_station(priv, &station->sta, flags);
  433. return index;
  434. }
  435. /*************** DRIVER STATUS FUNCTIONS *****/
  436. static inline int iwl4965_is_ready(struct iwl4965_priv *priv)
  437. {
  438. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  439. * set but EXIT_PENDING is not */
  440. return test_bit(STATUS_READY, &priv->status) &&
  441. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  442. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  443. }
  444. static inline int iwl4965_is_alive(struct iwl4965_priv *priv)
  445. {
  446. return test_bit(STATUS_ALIVE, &priv->status);
  447. }
  448. static inline int iwl4965_is_init(struct iwl4965_priv *priv)
  449. {
  450. return test_bit(STATUS_INIT, &priv->status);
  451. }
  452. static inline int iwl4965_is_rfkill(struct iwl4965_priv *priv)
  453. {
  454. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  455. test_bit(STATUS_RF_KILL_SW, &priv->status);
  456. }
  457. static inline int iwl4965_is_ready_rf(struct iwl4965_priv *priv)
  458. {
  459. if (iwl4965_is_rfkill(priv))
  460. return 0;
  461. return iwl4965_is_ready(priv);
  462. }
  463. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  464. #define IWL_CMD(x) case x : return #x
  465. static const char *get_cmd_string(u8 cmd)
  466. {
  467. switch (cmd) {
  468. IWL_CMD(REPLY_ALIVE);
  469. IWL_CMD(REPLY_ERROR);
  470. IWL_CMD(REPLY_RXON);
  471. IWL_CMD(REPLY_RXON_ASSOC);
  472. IWL_CMD(REPLY_QOS_PARAM);
  473. IWL_CMD(REPLY_RXON_TIMING);
  474. IWL_CMD(REPLY_ADD_STA);
  475. IWL_CMD(REPLY_REMOVE_STA);
  476. IWL_CMD(REPLY_REMOVE_ALL_STA);
  477. IWL_CMD(REPLY_TX);
  478. IWL_CMD(REPLY_RATE_SCALE);
  479. IWL_CMD(REPLY_LEDS_CMD);
  480. IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
  481. IWL_CMD(RADAR_NOTIFICATION);
  482. IWL_CMD(REPLY_QUIET_CMD);
  483. IWL_CMD(REPLY_CHANNEL_SWITCH);
  484. IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
  485. IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
  486. IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
  487. IWL_CMD(POWER_TABLE_CMD);
  488. IWL_CMD(PM_SLEEP_NOTIFICATION);
  489. IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
  490. IWL_CMD(REPLY_SCAN_CMD);
  491. IWL_CMD(REPLY_SCAN_ABORT_CMD);
  492. IWL_CMD(SCAN_START_NOTIFICATION);
  493. IWL_CMD(SCAN_RESULTS_NOTIFICATION);
  494. IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
  495. IWL_CMD(BEACON_NOTIFICATION);
  496. IWL_CMD(REPLY_TX_BEACON);
  497. IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
  498. IWL_CMD(QUIET_NOTIFICATION);
  499. IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
  500. IWL_CMD(MEASURE_ABORT_NOTIFICATION);
  501. IWL_CMD(REPLY_BT_CONFIG);
  502. IWL_CMD(REPLY_STATISTICS_CMD);
  503. IWL_CMD(STATISTICS_NOTIFICATION);
  504. IWL_CMD(REPLY_CARD_STATE_CMD);
  505. IWL_CMD(CARD_STATE_NOTIFICATION);
  506. IWL_CMD(MISSED_BEACONS_NOTIFICATION);
  507. IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
  508. IWL_CMD(SENSITIVITY_CMD);
  509. IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
  510. IWL_CMD(REPLY_RX_PHY_CMD);
  511. IWL_CMD(REPLY_RX_MPDU_CMD);
  512. IWL_CMD(REPLY_4965_RX);
  513. IWL_CMD(REPLY_COMPRESSED_BA);
  514. default:
  515. return "UNKNOWN";
  516. }
  517. }
  518. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  519. /**
  520. * iwl4965_enqueue_hcmd - enqueue a uCode command
  521. * @priv: device private data point
  522. * @cmd: a point to the ucode command structure
  523. *
  524. * The function returns < 0 values to indicate the operation is
  525. * failed. On success, it turns the index (> 0) of command in the
  526. * command queue.
  527. */
  528. static int iwl4965_enqueue_hcmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  529. {
  530. struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  531. struct iwl4965_queue *q = &txq->q;
  532. struct iwl4965_tfd_frame *tfd;
  533. u32 *control_flags;
  534. struct iwl4965_cmd *out_cmd;
  535. u32 idx;
  536. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  537. dma_addr_t phys_addr;
  538. int ret;
  539. unsigned long flags;
  540. /* If any of the command structures end up being larger than
  541. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  542. * we will need to increase the size of the TFD entries */
  543. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  544. !(cmd->meta.flags & CMD_SIZE_HUGE));
  545. if (iwl4965_is_rfkill(priv)) {
  546. IWL_DEBUG_INFO("Not sending command - RF KILL");
  547. return -EIO;
  548. }
  549. if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  550. IWL_ERROR("No space for Tx\n");
  551. return -ENOSPC;
  552. }
  553. spin_lock_irqsave(&priv->hcmd_lock, flags);
  554. tfd = &txq->bd[q->write_ptr];
  555. memset(tfd, 0, sizeof(*tfd));
  556. control_flags = (u32 *) tfd;
  557. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  558. out_cmd = &txq->cmd[idx];
  559. out_cmd->hdr.cmd = cmd->id;
  560. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  561. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  562. /* At this point, the out_cmd now has all of the incoming cmd
  563. * information */
  564. out_cmd->hdr.flags = 0;
  565. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  566. INDEX_TO_SEQ(q->write_ptr));
  567. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  568. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  569. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  570. offsetof(struct iwl4965_cmd, hdr);
  571. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  572. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  573. "%d bytes at %d[%d]:%d\n",
  574. get_cmd_string(out_cmd->hdr.cmd),
  575. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  576. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  577. txq->need_update = 1;
  578. /* Set up entry in queue's byte count circular buffer */
  579. ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
  580. /* Increment and update queue's write index */
  581. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  582. iwl4965_tx_queue_update_write_ptr(priv, txq);
  583. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  584. return ret ? ret : idx;
  585. }
  586. static int iwl4965_send_cmd_async(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  587. {
  588. int ret;
  589. BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
  590. /* An asynchronous command can not expect an SKB to be set. */
  591. BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
  592. /* An asynchronous command MUST have a callback. */
  593. BUG_ON(!cmd->meta.u.callback);
  594. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  595. return -EBUSY;
  596. ret = iwl4965_enqueue_hcmd(priv, cmd);
  597. if (ret < 0) {
  598. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  599. get_cmd_string(cmd->id), ret);
  600. return ret;
  601. }
  602. return 0;
  603. }
  604. static int iwl4965_send_cmd_sync(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  605. {
  606. int cmd_idx;
  607. int ret;
  608. static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
  609. BUG_ON(cmd->meta.flags & CMD_ASYNC);
  610. /* A synchronous command can not have a callback set. */
  611. BUG_ON(cmd->meta.u.callback != NULL);
  612. if (atomic_xchg(&entry, 1)) {
  613. IWL_ERROR("Error sending %s: Already sending a host command\n",
  614. get_cmd_string(cmd->id));
  615. return -EBUSY;
  616. }
  617. set_bit(STATUS_HCMD_ACTIVE, &priv->status);
  618. if (cmd->meta.flags & CMD_WANT_SKB)
  619. cmd->meta.source = &cmd->meta;
  620. cmd_idx = iwl4965_enqueue_hcmd(priv, cmd);
  621. if (cmd_idx < 0) {
  622. ret = cmd_idx;
  623. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  624. get_cmd_string(cmd->id), ret);
  625. goto out;
  626. }
  627. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  628. !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
  629. HOST_COMPLETE_TIMEOUT);
  630. if (!ret) {
  631. if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
  632. IWL_ERROR("Error sending %s: time out after %dms.\n",
  633. get_cmd_string(cmd->id),
  634. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  635. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  636. ret = -ETIMEDOUT;
  637. goto cancel;
  638. }
  639. }
  640. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  641. IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
  642. get_cmd_string(cmd->id));
  643. ret = -ECANCELED;
  644. goto fail;
  645. }
  646. if (test_bit(STATUS_FW_ERROR, &priv->status)) {
  647. IWL_DEBUG_INFO("Command %s failed: FW Error\n",
  648. get_cmd_string(cmd->id));
  649. ret = -EIO;
  650. goto fail;
  651. }
  652. if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
  653. IWL_ERROR("Error: Response NULL in '%s'\n",
  654. get_cmd_string(cmd->id));
  655. ret = -EIO;
  656. goto out;
  657. }
  658. ret = 0;
  659. goto out;
  660. cancel:
  661. if (cmd->meta.flags & CMD_WANT_SKB) {
  662. struct iwl4965_cmd *qcmd;
  663. /* Cancel the CMD_WANT_SKB flag for the cmd in the
  664. * TX cmd queue. Otherwise in case the cmd comes
  665. * in later, it will possibly set an invalid
  666. * address (cmd->meta.source). */
  667. qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
  668. qcmd->meta.flags &= ~CMD_WANT_SKB;
  669. }
  670. fail:
  671. if (cmd->meta.u.skb) {
  672. dev_kfree_skb_any(cmd->meta.u.skb);
  673. cmd->meta.u.skb = NULL;
  674. }
  675. out:
  676. atomic_set(&entry, 0);
  677. return ret;
  678. }
  679. int iwl4965_send_cmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  680. {
  681. if (cmd->meta.flags & CMD_ASYNC)
  682. return iwl4965_send_cmd_async(priv, cmd);
  683. return iwl4965_send_cmd_sync(priv, cmd);
  684. }
  685. int iwl4965_send_cmd_pdu(struct iwl4965_priv *priv, u8 id, u16 len, const void *data)
  686. {
  687. struct iwl4965_host_cmd cmd = {
  688. .id = id,
  689. .len = len,
  690. .data = data,
  691. };
  692. return iwl4965_send_cmd_sync(priv, &cmd);
  693. }
  694. static int __must_check iwl4965_send_cmd_u32(struct iwl4965_priv *priv, u8 id, u32 val)
  695. {
  696. struct iwl4965_host_cmd cmd = {
  697. .id = id,
  698. .len = sizeof(val),
  699. .data = &val,
  700. };
  701. return iwl4965_send_cmd_sync(priv, &cmd);
  702. }
  703. int iwl4965_send_statistics_request(struct iwl4965_priv *priv)
  704. {
  705. return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
  706. }
  707. /**
  708. * iwl4965_rxon_add_station - add station into station table.
  709. *
  710. * there is only one AP station with id= IWL_AP_ID
  711. * NOTE: mutex must be held before calling this fnction
  712. */
  713. static int iwl4965_rxon_add_station(struct iwl4965_priv *priv,
  714. const u8 *addr, int is_ap)
  715. {
  716. u8 sta_id;
  717. /* Add station to device's station table */
  718. #ifdef CONFIG_IWL4965_HT
  719. struct ieee80211_conf *conf = &priv->hw->conf;
  720. struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
  721. if ((is_ap) &&
  722. (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
  723. (priv->iw_mode == IEEE80211_IF_TYPE_STA))
  724. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  725. 0, cur_ht_config);
  726. else
  727. #endif /* CONFIG_IWL4965_HT */
  728. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  729. 0, NULL);
  730. /* Set up default rate scaling table in device's station table */
  731. iwl4965_add_station(priv, addr, is_ap);
  732. return sta_id;
  733. }
  734. /**
  735. * iwl4965_set_rxon_channel - Set the phymode and channel values in staging RXON
  736. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  737. * @channel: Any channel valid for the requested phymode
  738. * In addition to setting the staging RXON, priv->phymode is also set.
  739. *
  740. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  741. * in the staging RXON flag structure based on the phymode
  742. */
  743. static int iwl4965_set_rxon_channel(struct iwl4965_priv *priv,
  744. enum ieee80211_band band,
  745. u16 channel)
  746. {
  747. if (!iwl4965_get_channel_info(priv, band, channel)) {
  748. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  749. channel, band);
  750. return -EINVAL;
  751. }
  752. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  753. (priv->band == band))
  754. return 0;
  755. priv->staging_rxon.channel = cpu_to_le16(channel);
  756. if (band == IEEE80211_BAND_5GHZ)
  757. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  758. else
  759. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  760. priv->band = band;
  761. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
  762. return 0;
  763. }
  764. /**
  765. * iwl4965_check_rxon_cmd - validate RXON structure is valid
  766. *
  767. * NOTE: This is really only useful during development and can eventually
  768. * be #ifdef'd out once the driver is stable and folks aren't actively
  769. * making changes
  770. */
  771. static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
  772. {
  773. int error = 0;
  774. int counter = 1;
  775. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  776. error |= le32_to_cpu(rxon->flags &
  777. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  778. RXON_FLG_RADAR_DETECT_MSK));
  779. if (error)
  780. IWL_WARNING("check 24G fields %d | %d\n",
  781. counter++, error);
  782. } else {
  783. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  784. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  785. if (error)
  786. IWL_WARNING("check 52 fields %d | %d\n",
  787. counter++, error);
  788. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  789. if (error)
  790. IWL_WARNING("check 52 CCK %d | %d\n",
  791. counter++, error);
  792. }
  793. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  794. if (error)
  795. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  796. /* make sure basic rates 6Mbps and 1Mbps are supported */
  797. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  798. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  799. if (error)
  800. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  801. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  802. if (error)
  803. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  804. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  805. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  806. if (error)
  807. IWL_WARNING("check CCK and short slot %d | %d\n",
  808. counter++, error);
  809. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  810. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  811. if (error)
  812. IWL_WARNING("check CCK & auto detect %d | %d\n",
  813. counter++, error);
  814. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  815. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  816. if (error)
  817. IWL_WARNING("check TGG and auto detect %d | %d\n",
  818. counter++, error);
  819. if (error)
  820. IWL_WARNING("Tuning to channel %d\n",
  821. le16_to_cpu(rxon->channel));
  822. if (error) {
  823. IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
  824. return -1;
  825. }
  826. return 0;
  827. }
  828. /**
  829. * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  830. * @priv: staging_rxon is compared to active_rxon
  831. *
  832. * If the RXON structure is changing enough to require a new tune,
  833. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  834. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  835. */
  836. static int iwl4965_full_rxon_required(struct iwl4965_priv *priv)
  837. {
  838. /* These items are only settable from the full RXON command */
  839. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  840. compare_ether_addr(priv->staging_rxon.bssid_addr,
  841. priv->active_rxon.bssid_addr) ||
  842. compare_ether_addr(priv->staging_rxon.node_addr,
  843. priv->active_rxon.node_addr) ||
  844. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  845. priv->active_rxon.wlap_bssid_addr) ||
  846. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  847. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  848. (priv->staging_rxon.air_propagation !=
  849. priv->active_rxon.air_propagation) ||
  850. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  851. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  852. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  853. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  854. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  855. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  856. return 1;
  857. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  858. * be updated with the RXON_ASSOC command -- however only some
  859. * flag transitions are allowed using RXON_ASSOC */
  860. /* Check if we are not switching bands */
  861. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  862. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  863. return 1;
  864. /* Check if we are switching association toggle */
  865. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  866. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  867. return 1;
  868. return 0;
  869. }
  870. static int iwl4965_send_rxon_assoc(struct iwl4965_priv *priv)
  871. {
  872. int rc = 0;
  873. struct iwl4965_rx_packet *res = NULL;
  874. struct iwl4965_rxon_assoc_cmd rxon_assoc;
  875. struct iwl4965_host_cmd cmd = {
  876. .id = REPLY_RXON_ASSOC,
  877. .len = sizeof(rxon_assoc),
  878. .meta.flags = CMD_WANT_SKB,
  879. .data = &rxon_assoc,
  880. };
  881. const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
  882. const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
  883. if ((rxon1->flags == rxon2->flags) &&
  884. (rxon1->filter_flags == rxon2->filter_flags) &&
  885. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  886. (rxon1->ofdm_ht_single_stream_basic_rates ==
  887. rxon2->ofdm_ht_single_stream_basic_rates) &&
  888. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  889. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  890. (rxon1->rx_chain == rxon2->rx_chain) &&
  891. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  892. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  893. return 0;
  894. }
  895. rxon_assoc.flags = priv->staging_rxon.flags;
  896. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  897. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  898. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  899. rxon_assoc.reserved = 0;
  900. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  901. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  902. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  903. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  904. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  905. rc = iwl4965_send_cmd_sync(priv, &cmd);
  906. if (rc)
  907. return rc;
  908. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  909. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  910. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  911. rc = -EIO;
  912. }
  913. priv->alloc_rxb_skb--;
  914. dev_kfree_skb_any(cmd.meta.u.skb);
  915. return rc;
  916. }
  917. /**
  918. * iwl4965_commit_rxon - commit staging_rxon to hardware
  919. *
  920. * The RXON command in staging_rxon is committed to the hardware and
  921. * the active_rxon structure is updated with the new data. This
  922. * function correctly transitions out of the RXON_ASSOC_MSK state if
  923. * a HW tune is required based on the RXON structure changes.
  924. */
  925. static int iwl4965_commit_rxon(struct iwl4965_priv *priv)
  926. {
  927. /* cast away the const for active_rxon in this function */
  928. struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  929. DECLARE_MAC_BUF(mac);
  930. int rc = 0;
  931. if (!iwl4965_is_alive(priv))
  932. return -1;
  933. /* always get timestamp with Rx frame */
  934. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  935. rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
  936. if (rc) {
  937. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  938. return -EINVAL;
  939. }
  940. /* If we don't need to send a full RXON, we can use
  941. * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
  942. * and other flags for the current radio configuration. */
  943. if (!iwl4965_full_rxon_required(priv)) {
  944. rc = iwl4965_send_rxon_assoc(priv);
  945. if (rc) {
  946. IWL_ERROR("Error setting RXON_ASSOC "
  947. "configuration (%d).\n", rc);
  948. return rc;
  949. }
  950. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  951. return 0;
  952. }
  953. /* station table will be cleared */
  954. priv->assoc_station_added = 0;
  955. #ifdef CONFIG_IWL4965_SENSITIVITY
  956. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  957. if (!priv->error_recovering)
  958. priv->start_calib = 0;
  959. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  960. #endif /* CONFIG_IWL4965_SENSITIVITY */
  961. /* If we are currently associated and the new config requires
  962. * an RXON_ASSOC and the new config wants the associated mask enabled,
  963. * we must clear the associated from the active configuration
  964. * before we apply the new config */
  965. if (iwl4965_is_associated(priv) &&
  966. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  967. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  968. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  969. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  970. sizeof(struct iwl4965_rxon_cmd),
  971. &priv->active_rxon);
  972. /* If the mask clearing failed then we set
  973. * active_rxon back to what it was previously */
  974. if (rc) {
  975. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  976. IWL_ERROR("Error clearing ASSOC_MSK on current "
  977. "configuration (%d).\n", rc);
  978. return rc;
  979. }
  980. }
  981. IWL_DEBUG_INFO("Sending RXON\n"
  982. "* with%s RXON_FILTER_ASSOC_MSK\n"
  983. "* channel = %d\n"
  984. "* bssid = %s\n",
  985. ((priv->staging_rxon.filter_flags &
  986. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  987. le16_to_cpu(priv->staging_rxon.channel),
  988. print_mac(mac, priv->staging_rxon.bssid_addr));
  989. /* Apply the new configuration */
  990. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  991. sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
  992. if (rc) {
  993. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  994. return rc;
  995. }
  996. iwl4965_clear_stations_table(priv);
  997. #ifdef CONFIG_IWL4965_SENSITIVITY
  998. if (!priv->error_recovering)
  999. priv->start_calib = 0;
  1000. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  1001. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  1002. #endif /* CONFIG_IWL4965_SENSITIVITY */
  1003. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  1004. /* If we issue a new RXON command which required a tune then we must
  1005. * send a new TXPOWER command or we won't be able to Tx any frames */
  1006. rc = iwl4965_hw_reg_send_txpower(priv);
  1007. if (rc) {
  1008. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  1009. return rc;
  1010. }
  1011. /* Add the broadcast address so we can send broadcast frames */
  1012. if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
  1013. IWL_INVALID_STATION) {
  1014. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  1015. return -EIO;
  1016. }
  1017. /* If we have set the ASSOC_MSK and we are in BSS mode then
  1018. * add the IWL_AP_ID to the station rate table */
  1019. if (iwl4965_is_associated(priv) &&
  1020. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  1021. if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  1022. == IWL_INVALID_STATION) {
  1023. IWL_ERROR("Error adding AP address for transmit.\n");
  1024. return -EIO;
  1025. }
  1026. priv->assoc_station_added = 1;
  1027. }
  1028. return 0;
  1029. }
  1030. static int iwl4965_send_bt_config(struct iwl4965_priv *priv)
  1031. {
  1032. struct iwl4965_bt_cmd bt_cmd = {
  1033. .flags = 3,
  1034. .lead_time = 0xAA,
  1035. .max_kill = 1,
  1036. .kill_ack_mask = 0,
  1037. .kill_cts_mask = 0,
  1038. };
  1039. return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1040. sizeof(struct iwl4965_bt_cmd), &bt_cmd);
  1041. }
  1042. static int iwl4965_send_scan_abort(struct iwl4965_priv *priv)
  1043. {
  1044. int rc = 0;
  1045. struct iwl4965_rx_packet *res;
  1046. struct iwl4965_host_cmd cmd = {
  1047. .id = REPLY_SCAN_ABORT_CMD,
  1048. .meta.flags = CMD_WANT_SKB,
  1049. };
  1050. /* If there isn't a scan actively going on in the hardware
  1051. * then we are in between scan bands and not actually
  1052. * actively scanning, so don't send the abort command */
  1053. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1054. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1055. return 0;
  1056. }
  1057. rc = iwl4965_send_cmd_sync(priv, &cmd);
  1058. if (rc) {
  1059. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1060. return rc;
  1061. }
  1062. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1063. if (res->u.status != CAN_ABORT_STATUS) {
  1064. /* The scan abort will return 1 for success or
  1065. * 2 for "failure". A failure condition can be
  1066. * due to simply not being in an active scan which
  1067. * can occur if we send the scan abort before we
  1068. * the microcode has notified us that a scan is
  1069. * completed. */
  1070. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  1071. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1072. clear_bit(STATUS_SCAN_HW, &priv->status);
  1073. }
  1074. dev_kfree_skb_any(cmd.meta.u.skb);
  1075. return rc;
  1076. }
  1077. static int iwl4965_card_state_sync_callback(struct iwl4965_priv *priv,
  1078. struct iwl4965_cmd *cmd,
  1079. struct sk_buff *skb)
  1080. {
  1081. return 1;
  1082. }
  1083. /*
  1084. * CARD_STATE_CMD
  1085. *
  1086. * Use: Sets the device's internal card state to enable, disable, or halt
  1087. *
  1088. * When in the 'enable' state the card operates as normal.
  1089. * When in the 'disable' state, the card enters into a low power mode.
  1090. * When in the 'halt' state, the card is shut down and must be fully
  1091. * restarted to come back on.
  1092. */
  1093. static int iwl4965_send_card_state(struct iwl4965_priv *priv, u32 flags, u8 meta_flag)
  1094. {
  1095. struct iwl4965_host_cmd cmd = {
  1096. .id = REPLY_CARD_STATE_CMD,
  1097. .len = sizeof(u32),
  1098. .data = &flags,
  1099. .meta.flags = meta_flag,
  1100. };
  1101. if (meta_flag & CMD_ASYNC)
  1102. cmd.meta.u.callback = iwl4965_card_state_sync_callback;
  1103. return iwl4965_send_cmd(priv, &cmd);
  1104. }
  1105. static int iwl4965_add_sta_sync_callback(struct iwl4965_priv *priv,
  1106. struct iwl4965_cmd *cmd, struct sk_buff *skb)
  1107. {
  1108. struct iwl4965_rx_packet *res = NULL;
  1109. if (!skb) {
  1110. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  1111. return 1;
  1112. }
  1113. res = (struct iwl4965_rx_packet *)skb->data;
  1114. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1115. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1116. res->hdr.flags);
  1117. return 1;
  1118. }
  1119. switch (res->u.add_sta.status) {
  1120. case ADD_STA_SUCCESS_MSK:
  1121. break;
  1122. default:
  1123. break;
  1124. }
  1125. /* We didn't cache the SKB; let the caller free it */
  1126. return 1;
  1127. }
  1128. int iwl4965_send_add_station(struct iwl4965_priv *priv,
  1129. struct iwl4965_addsta_cmd *sta, u8 flags)
  1130. {
  1131. struct iwl4965_rx_packet *res = NULL;
  1132. int rc = 0;
  1133. struct iwl4965_host_cmd cmd = {
  1134. .id = REPLY_ADD_STA,
  1135. .len = sizeof(struct iwl4965_addsta_cmd),
  1136. .meta.flags = flags,
  1137. .data = sta,
  1138. };
  1139. if (flags & CMD_ASYNC)
  1140. cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
  1141. else
  1142. cmd.meta.flags |= CMD_WANT_SKB;
  1143. rc = iwl4965_send_cmd(priv, &cmd);
  1144. if (rc || (flags & CMD_ASYNC))
  1145. return rc;
  1146. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1147. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1148. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1149. res->hdr.flags);
  1150. rc = -EIO;
  1151. }
  1152. if (rc == 0) {
  1153. switch (res->u.add_sta.status) {
  1154. case ADD_STA_SUCCESS_MSK:
  1155. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  1156. break;
  1157. default:
  1158. rc = -EIO;
  1159. IWL_WARNING("REPLY_ADD_STA failed\n");
  1160. break;
  1161. }
  1162. }
  1163. priv->alloc_rxb_skb--;
  1164. dev_kfree_skb_any(cmd.meta.u.skb);
  1165. return rc;
  1166. }
  1167. static int iwl4965_update_sta_key_info(struct iwl4965_priv *priv,
  1168. struct ieee80211_key_conf *keyconf,
  1169. u8 sta_id)
  1170. {
  1171. unsigned long flags;
  1172. __le16 key_flags = 0;
  1173. switch (keyconf->alg) {
  1174. case ALG_CCMP:
  1175. key_flags |= STA_KEY_FLG_CCMP;
  1176. key_flags |= cpu_to_le16(
  1177. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  1178. key_flags &= ~STA_KEY_FLG_INVALID;
  1179. break;
  1180. case ALG_TKIP:
  1181. case ALG_WEP:
  1182. default:
  1183. return -EINVAL;
  1184. }
  1185. spin_lock_irqsave(&priv->sta_lock, flags);
  1186. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  1187. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  1188. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  1189. keyconf->keylen);
  1190. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  1191. keyconf->keylen);
  1192. priv->stations[sta_id].sta.key.key_flags = key_flags;
  1193. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1194. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1195. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1196. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  1197. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1198. return 0;
  1199. }
  1200. static int iwl4965_clear_sta_key_info(struct iwl4965_priv *priv, u8 sta_id)
  1201. {
  1202. unsigned long flags;
  1203. spin_lock_irqsave(&priv->sta_lock, flags);
  1204. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
  1205. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
  1206. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1207. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1208. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1209. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1210. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1211. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1212. return 0;
  1213. }
  1214. static void iwl4965_clear_free_frames(struct iwl4965_priv *priv)
  1215. {
  1216. struct list_head *element;
  1217. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1218. priv->frames_count);
  1219. while (!list_empty(&priv->free_frames)) {
  1220. element = priv->free_frames.next;
  1221. list_del(element);
  1222. kfree(list_entry(element, struct iwl4965_frame, list));
  1223. priv->frames_count--;
  1224. }
  1225. if (priv->frames_count) {
  1226. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1227. priv->frames_count);
  1228. priv->frames_count = 0;
  1229. }
  1230. }
  1231. static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl4965_priv *priv)
  1232. {
  1233. struct iwl4965_frame *frame;
  1234. struct list_head *element;
  1235. if (list_empty(&priv->free_frames)) {
  1236. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1237. if (!frame) {
  1238. IWL_ERROR("Could not allocate frame!\n");
  1239. return NULL;
  1240. }
  1241. priv->frames_count++;
  1242. return frame;
  1243. }
  1244. element = priv->free_frames.next;
  1245. list_del(element);
  1246. return list_entry(element, struct iwl4965_frame, list);
  1247. }
  1248. static void iwl4965_free_frame(struct iwl4965_priv *priv, struct iwl4965_frame *frame)
  1249. {
  1250. memset(frame, 0, sizeof(*frame));
  1251. list_add(&frame->list, &priv->free_frames);
  1252. }
  1253. unsigned int iwl4965_fill_beacon_frame(struct iwl4965_priv *priv,
  1254. struct ieee80211_hdr *hdr,
  1255. const u8 *dest, int left)
  1256. {
  1257. if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
  1258. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1259. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1260. return 0;
  1261. if (priv->ibss_beacon->len > left)
  1262. return 0;
  1263. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1264. return priv->ibss_beacon->len;
  1265. }
  1266. static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
  1267. {
  1268. u8 i;
  1269. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1270. i = iwl4965_rates[i].next_ieee) {
  1271. if (rate_mask & (1 << i))
  1272. return iwl4965_rates[i].plcp;
  1273. }
  1274. return IWL_RATE_INVALID;
  1275. }
  1276. static int iwl4965_send_beacon_cmd(struct iwl4965_priv *priv)
  1277. {
  1278. struct iwl4965_frame *frame;
  1279. unsigned int frame_size;
  1280. int rc;
  1281. u8 rate;
  1282. frame = iwl4965_get_free_frame(priv);
  1283. if (!frame) {
  1284. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1285. "command.\n");
  1286. return -ENOMEM;
  1287. }
  1288. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1289. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
  1290. 0xFF0);
  1291. if (rate == IWL_INVALID_RATE)
  1292. rate = IWL_RATE_6M_PLCP;
  1293. } else {
  1294. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1295. if (rate == IWL_INVALID_RATE)
  1296. rate = IWL_RATE_1M_PLCP;
  1297. }
  1298. frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
  1299. rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1300. &frame->u.cmd[0]);
  1301. iwl4965_free_frame(priv, frame);
  1302. return rc;
  1303. }
  1304. /******************************************************************************
  1305. *
  1306. * EEPROM related functions
  1307. *
  1308. ******************************************************************************/
  1309. static void get_eeprom_mac(struct iwl4965_priv *priv, u8 *mac)
  1310. {
  1311. memcpy(mac, priv->eeprom.mac_address, 6);
  1312. }
  1313. static inline void iwl4965_eeprom_release_semaphore(struct iwl4965_priv *priv)
  1314. {
  1315. iwl4965_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
  1316. CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
  1317. }
  1318. /**
  1319. * iwl4965_eeprom_init - read EEPROM contents
  1320. *
  1321. * Load the EEPROM contents from adapter into priv->eeprom
  1322. *
  1323. * NOTE: This routine uses the non-debug IO access functions.
  1324. */
  1325. int iwl4965_eeprom_init(struct iwl4965_priv *priv)
  1326. {
  1327. u16 *e = (u16 *)&priv->eeprom;
  1328. u32 gp = iwl4965_read32(priv, CSR_EEPROM_GP);
  1329. u32 r;
  1330. int sz = sizeof(priv->eeprom);
  1331. int rc;
  1332. int i;
  1333. u16 addr;
  1334. /* The EEPROM structure has several padding buffers within it
  1335. * and when adding new EEPROM maps is subject to programmer errors
  1336. * which may be very difficult to identify without explicitly
  1337. * checking the resulting size of the eeprom map. */
  1338. BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
  1339. if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
  1340. IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
  1341. return -ENOENT;
  1342. }
  1343. /* Make sure driver (instead of uCode) is allowed to read EEPROM */
  1344. rc = iwl4965_eeprom_acquire_semaphore(priv);
  1345. if (rc < 0) {
  1346. IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
  1347. return -ENOENT;
  1348. }
  1349. /* eeprom is an array of 16bit values */
  1350. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  1351. _iwl4965_write32(priv, CSR_EEPROM_REG, addr << 1);
  1352. _iwl4965_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
  1353. for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
  1354. i += IWL_EEPROM_ACCESS_DELAY) {
  1355. r = _iwl4965_read_direct32(priv, CSR_EEPROM_REG);
  1356. if (r & CSR_EEPROM_REG_READ_VALID_MSK)
  1357. break;
  1358. udelay(IWL_EEPROM_ACCESS_DELAY);
  1359. }
  1360. if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
  1361. IWL_ERROR("Time out reading EEPROM[%d]", addr);
  1362. rc = -ETIMEDOUT;
  1363. goto done;
  1364. }
  1365. e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
  1366. }
  1367. rc = 0;
  1368. done:
  1369. iwl4965_eeprom_release_semaphore(priv);
  1370. return rc;
  1371. }
  1372. /******************************************************************************
  1373. *
  1374. * Misc. internal state and helper functions
  1375. *
  1376. ******************************************************************************/
  1377. static void iwl4965_unset_hw_setting(struct iwl4965_priv *priv)
  1378. {
  1379. if (priv->hw_setting.shared_virt)
  1380. pci_free_consistent(priv->pci_dev,
  1381. sizeof(struct iwl4965_shared),
  1382. priv->hw_setting.shared_virt,
  1383. priv->hw_setting.shared_phys);
  1384. }
  1385. /**
  1386. * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
  1387. *
  1388. * return : set the bit for each supported rate insert in ie
  1389. */
  1390. static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1391. u16 basic_rate, int *left)
  1392. {
  1393. u16 ret_rates = 0, bit;
  1394. int i;
  1395. u8 *cnt = ie;
  1396. u8 *rates = ie + 1;
  1397. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1398. if (bit & supported_rate) {
  1399. ret_rates |= bit;
  1400. rates[*cnt] = iwl4965_rates[i].ieee |
  1401. ((bit & basic_rate) ? 0x80 : 0x00);
  1402. (*cnt)++;
  1403. (*left)--;
  1404. if ((*left <= 0) ||
  1405. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1406. break;
  1407. }
  1408. }
  1409. return ret_rates;
  1410. }
  1411. /**
  1412. * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
  1413. */
  1414. static u16 iwl4965_fill_probe_req(struct iwl4965_priv *priv,
  1415. enum ieee80211_band band,
  1416. struct ieee80211_mgmt *frame,
  1417. int left, int is_direct)
  1418. {
  1419. int len = 0;
  1420. u8 *pos = NULL;
  1421. u16 active_rates, ret_rates, cck_rates, active_rate_basic;
  1422. #ifdef CONFIG_IWL4965_HT
  1423. const struct ieee80211_supported_band *sband =
  1424. iwl4965_get_hw_mode(priv, band);
  1425. #endif /* CONFIG_IWL4965_HT */
  1426. /* Make sure there is enough space for the probe request,
  1427. * two mandatory IEs and the data */
  1428. left -= 24;
  1429. if (left < 0)
  1430. return 0;
  1431. len += 24;
  1432. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1433. memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
  1434. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1435. memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
  1436. frame->seq_ctrl = 0;
  1437. /* fill in our indirect SSID IE */
  1438. /* ...next IE... */
  1439. left -= 2;
  1440. if (left < 0)
  1441. return 0;
  1442. len += 2;
  1443. pos = &(frame->u.probe_req.variable[0]);
  1444. *pos++ = WLAN_EID_SSID;
  1445. *pos++ = 0;
  1446. /* fill in our direct SSID IE... */
  1447. if (is_direct) {
  1448. /* ...next IE... */
  1449. left -= 2 + priv->essid_len;
  1450. if (left < 0)
  1451. return 0;
  1452. /* ... fill it in... */
  1453. *pos++ = WLAN_EID_SSID;
  1454. *pos++ = priv->essid_len;
  1455. memcpy(pos, priv->essid, priv->essid_len);
  1456. pos += priv->essid_len;
  1457. len += 2 + priv->essid_len;
  1458. }
  1459. /* fill in supported rate */
  1460. /* ...next IE... */
  1461. left -= 2;
  1462. if (left < 0)
  1463. return 0;
  1464. /* ... fill it in... */
  1465. *pos++ = WLAN_EID_SUPP_RATES;
  1466. *pos = 0;
  1467. /* exclude 60M rate */
  1468. active_rates = priv->rates_mask;
  1469. active_rates &= ~IWL_RATE_60M_MASK;
  1470. active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
  1471. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1472. ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
  1473. active_rate_basic, &left);
  1474. active_rates &= ~ret_rates;
  1475. ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
  1476. active_rate_basic, &left);
  1477. active_rates &= ~ret_rates;
  1478. len += 2 + *pos;
  1479. pos += (*pos) + 1;
  1480. if (active_rates == 0)
  1481. goto fill_end;
  1482. /* fill in supported extended rate */
  1483. /* ...next IE... */
  1484. left -= 2;
  1485. if (left < 0)
  1486. return 0;
  1487. /* ... fill it in... */
  1488. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1489. *pos = 0;
  1490. iwl4965_supported_rate_to_ie(pos, active_rates,
  1491. active_rate_basic, &left);
  1492. if (*pos > 0)
  1493. len += 2 + *pos;
  1494. #ifdef CONFIG_IWL4965_HT
  1495. if (sband && sband->ht_info.ht_supported) {
  1496. struct ieee80211_ht_cap *ht_cap;
  1497. pos += (*pos) + 1;
  1498. *pos++ = WLAN_EID_HT_CAPABILITY;
  1499. *pos++ = sizeof(struct ieee80211_ht_cap);
  1500. ht_cap = (struct ieee80211_ht_cap *)pos;
  1501. ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap);
  1502. memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16);
  1503. ht_cap->ampdu_params_info =(sband->ht_info.ampdu_factor &
  1504. IEEE80211_HT_CAP_AMPDU_FACTOR) |
  1505. ((sband->ht_info.ampdu_density << 2) &
  1506. IEEE80211_HT_CAP_AMPDU_DENSITY);
  1507. len += 2 + sizeof(struct ieee80211_ht_cap);
  1508. }
  1509. #endif /*CONFIG_IWL4965_HT */
  1510. fill_end:
  1511. return (u16)len;
  1512. }
  1513. /*
  1514. * QoS support
  1515. */
  1516. static int iwl4965_send_qos_params_command(struct iwl4965_priv *priv,
  1517. struct iwl4965_qosparam_cmd *qos)
  1518. {
  1519. return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1520. sizeof(struct iwl4965_qosparam_cmd), qos);
  1521. }
  1522. static void iwl4965_reset_qos(struct iwl4965_priv *priv)
  1523. {
  1524. u16 cw_min = 15;
  1525. u16 cw_max = 1023;
  1526. u8 aifs = 2;
  1527. u8 is_legacy = 0;
  1528. unsigned long flags;
  1529. int i;
  1530. spin_lock_irqsave(&priv->lock, flags);
  1531. priv->qos_data.qos_active = 0;
  1532. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
  1533. if (priv->qos_data.qos_enable)
  1534. priv->qos_data.qos_active = 1;
  1535. if (!(priv->active_rate & 0xfff0)) {
  1536. cw_min = 31;
  1537. is_legacy = 1;
  1538. }
  1539. } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1540. if (priv->qos_data.qos_enable)
  1541. priv->qos_data.qos_active = 1;
  1542. } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
  1543. cw_min = 31;
  1544. is_legacy = 1;
  1545. }
  1546. if (priv->qos_data.qos_active)
  1547. aifs = 3;
  1548. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  1549. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  1550. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  1551. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  1552. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  1553. if (priv->qos_data.qos_active) {
  1554. i = 1;
  1555. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  1556. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  1557. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  1558. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1559. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1560. i = 2;
  1561. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1562. cpu_to_le16((cw_min + 1) / 2 - 1);
  1563. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1564. cpu_to_le16(cw_max);
  1565. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1566. if (is_legacy)
  1567. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1568. cpu_to_le16(6016);
  1569. else
  1570. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1571. cpu_to_le16(3008);
  1572. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1573. i = 3;
  1574. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1575. cpu_to_le16((cw_min + 1) / 4 - 1);
  1576. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1577. cpu_to_le16((cw_max + 1) / 2 - 1);
  1578. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1579. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1580. if (is_legacy)
  1581. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1582. cpu_to_le16(3264);
  1583. else
  1584. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1585. cpu_to_le16(1504);
  1586. } else {
  1587. for (i = 1; i < 4; i++) {
  1588. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1589. cpu_to_le16(cw_min);
  1590. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1591. cpu_to_le16(cw_max);
  1592. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  1593. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1594. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1595. }
  1596. }
  1597. IWL_DEBUG_QOS("set QoS to default \n");
  1598. spin_unlock_irqrestore(&priv->lock, flags);
  1599. }
  1600. static void iwl4965_activate_qos(struct iwl4965_priv *priv, u8 force)
  1601. {
  1602. unsigned long flags;
  1603. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1604. return;
  1605. if (!priv->qos_data.qos_enable)
  1606. return;
  1607. spin_lock_irqsave(&priv->lock, flags);
  1608. priv->qos_data.def_qos_parm.qos_flags = 0;
  1609. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1610. !priv->qos_data.qos_cap.q_AP.txop_request)
  1611. priv->qos_data.def_qos_parm.qos_flags |=
  1612. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1613. if (priv->qos_data.qos_active)
  1614. priv->qos_data.def_qos_parm.qos_flags |=
  1615. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1616. #ifdef CONFIG_IWL4965_HT
  1617. if (priv->current_ht_config.is_ht)
  1618. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  1619. #endif /* CONFIG_IWL4965_HT */
  1620. spin_unlock_irqrestore(&priv->lock, flags);
  1621. if (force || iwl4965_is_associated(priv)) {
  1622. IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  1623. priv->qos_data.qos_active,
  1624. priv->qos_data.def_qos_parm.qos_flags);
  1625. iwl4965_send_qos_params_command(priv,
  1626. &(priv->qos_data.def_qos_parm));
  1627. }
  1628. }
  1629. /*
  1630. * Power management (not Tx power!) functions
  1631. */
  1632. #define MSEC_TO_USEC 1024
  1633. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1634. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1635. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1636. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1637. __constant_cpu_to_le32(X1), \
  1638. __constant_cpu_to_le32(X2), \
  1639. __constant_cpu_to_le32(X3), \
  1640. __constant_cpu_to_le32(X4)}
  1641. /* default power management (not Tx power) table values */
  1642. /* for tim 0-10 */
  1643. static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
  1644. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1645. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1646. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1647. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1648. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1649. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1650. };
  1651. /* for tim > 10 */
  1652. static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
  1653. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1654. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1655. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1656. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1657. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1658. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1659. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1660. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1661. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1662. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1663. };
  1664. int iwl4965_power_init_handle(struct iwl4965_priv *priv)
  1665. {
  1666. int rc = 0, i;
  1667. struct iwl4965_power_mgr *pow_data;
  1668. int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
  1669. u16 pci_pm;
  1670. IWL_DEBUG_POWER("Initialize power \n");
  1671. pow_data = &(priv->power_data);
  1672. memset(pow_data, 0, sizeof(*pow_data));
  1673. pow_data->active_index = IWL_POWER_RANGE_0;
  1674. pow_data->dtim_val = 0xffff;
  1675. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1676. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1677. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1678. if (rc != 0)
  1679. return 0;
  1680. else {
  1681. struct iwl4965_powertable_cmd *cmd;
  1682. IWL_DEBUG_POWER("adjust power command flags\n");
  1683. for (i = 0; i < IWL_POWER_AC; i++) {
  1684. cmd = &pow_data->pwr_range_0[i].cmd;
  1685. if (pci_pm & 0x1)
  1686. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1687. else
  1688. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1689. }
  1690. }
  1691. return rc;
  1692. }
  1693. static int iwl4965_update_power_cmd(struct iwl4965_priv *priv,
  1694. struct iwl4965_powertable_cmd *cmd, u32 mode)
  1695. {
  1696. int rc = 0, i;
  1697. u8 skip;
  1698. u32 max_sleep = 0;
  1699. struct iwl4965_power_vec_entry *range;
  1700. u8 period = 0;
  1701. struct iwl4965_power_mgr *pow_data;
  1702. if (mode > IWL_POWER_INDEX_5) {
  1703. IWL_DEBUG_POWER("Error invalid power mode \n");
  1704. return -1;
  1705. }
  1706. pow_data = &(priv->power_data);
  1707. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1708. range = &pow_data->pwr_range_0[0];
  1709. else
  1710. range = &pow_data->pwr_range_1[1];
  1711. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
  1712. #ifdef IWL_MAC80211_DISABLE
  1713. if (priv->assoc_network != NULL) {
  1714. unsigned long flags;
  1715. period = priv->assoc_network->tim.tim_period;
  1716. }
  1717. #endif /*IWL_MAC80211_DISABLE */
  1718. skip = range[mode].no_dtim;
  1719. if (period == 0) {
  1720. period = 1;
  1721. skip = 0;
  1722. }
  1723. if (skip == 0) {
  1724. max_sleep = period;
  1725. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1726. } else {
  1727. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1728. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1729. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1730. }
  1731. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1732. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1733. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1734. }
  1735. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1736. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1737. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1738. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1739. le32_to_cpu(cmd->sleep_interval[0]),
  1740. le32_to_cpu(cmd->sleep_interval[1]),
  1741. le32_to_cpu(cmd->sleep_interval[2]),
  1742. le32_to_cpu(cmd->sleep_interval[3]),
  1743. le32_to_cpu(cmd->sleep_interval[4]));
  1744. return rc;
  1745. }
  1746. static int iwl4965_send_power_mode(struct iwl4965_priv *priv, u32 mode)
  1747. {
  1748. u32 uninitialized_var(final_mode);
  1749. int rc;
  1750. struct iwl4965_powertable_cmd cmd;
  1751. /* If on battery, set to 3,
  1752. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1753. * else user level */
  1754. switch (mode) {
  1755. case IWL_POWER_BATTERY:
  1756. final_mode = IWL_POWER_INDEX_3;
  1757. break;
  1758. case IWL_POWER_AC:
  1759. final_mode = IWL_POWER_MODE_CAM;
  1760. break;
  1761. default:
  1762. final_mode = mode;
  1763. break;
  1764. }
  1765. cmd.keep_alive_beacons = 0;
  1766. iwl4965_update_power_cmd(priv, &cmd, final_mode);
  1767. rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1768. if (final_mode == IWL_POWER_MODE_CAM)
  1769. clear_bit(STATUS_POWER_PMI, &priv->status);
  1770. else
  1771. set_bit(STATUS_POWER_PMI, &priv->status);
  1772. return rc;
  1773. }
  1774. int iwl4965_is_network_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  1775. {
  1776. /* Filter incoming packets to determine if they are targeted toward
  1777. * this network, discarding packets coming from ourselves */
  1778. switch (priv->iw_mode) {
  1779. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1780. /* packets from our adapter are dropped (echo) */
  1781. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1782. return 0;
  1783. /* {broad,multi}cast packets to our IBSS go through */
  1784. if (is_multicast_ether_addr(header->addr1))
  1785. return !compare_ether_addr(header->addr3, priv->bssid);
  1786. /* packets to our adapter go through */
  1787. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1788. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1789. /* packets from our adapter are dropped (echo) */
  1790. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1791. return 0;
  1792. /* {broad,multi}cast packets to our BSS go through */
  1793. if (is_multicast_ether_addr(header->addr1))
  1794. return !compare_ether_addr(header->addr2, priv->bssid);
  1795. /* packets to our adapter go through */
  1796. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1797. }
  1798. return 1;
  1799. }
  1800. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1801. static const char *iwl4965_get_tx_fail_reason(u32 status)
  1802. {
  1803. switch (status & TX_STATUS_MSK) {
  1804. case TX_STATUS_SUCCESS:
  1805. return "SUCCESS";
  1806. TX_STATUS_ENTRY(SHORT_LIMIT);
  1807. TX_STATUS_ENTRY(LONG_LIMIT);
  1808. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1809. TX_STATUS_ENTRY(MGMNT_ABORT);
  1810. TX_STATUS_ENTRY(NEXT_FRAG);
  1811. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1812. TX_STATUS_ENTRY(DEST_PS);
  1813. TX_STATUS_ENTRY(ABORTED);
  1814. TX_STATUS_ENTRY(BT_RETRY);
  1815. TX_STATUS_ENTRY(STA_INVALID);
  1816. TX_STATUS_ENTRY(FRAG_DROPPED);
  1817. TX_STATUS_ENTRY(TID_DISABLE);
  1818. TX_STATUS_ENTRY(FRAME_FLUSHED);
  1819. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  1820. TX_STATUS_ENTRY(TX_LOCKED);
  1821. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  1822. }
  1823. return "UNKNOWN";
  1824. }
  1825. /**
  1826. * iwl4965_scan_cancel - Cancel any currently executing HW scan
  1827. *
  1828. * NOTE: priv->mutex is not required before calling this function
  1829. */
  1830. static int iwl4965_scan_cancel(struct iwl4965_priv *priv)
  1831. {
  1832. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1833. clear_bit(STATUS_SCANNING, &priv->status);
  1834. return 0;
  1835. }
  1836. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1837. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1838. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  1839. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  1840. queue_work(priv->workqueue, &priv->abort_scan);
  1841. } else
  1842. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  1843. return test_bit(STATUS_SCANNING, &priv->status);
  1844. }
  1845. return 0;
  1846. }
  1847. /**
  1848. * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
  1849. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1850. *
  1851. * NOTE: priv->mutex must be held before calling this function
  1852. */
  1853. static int iwl4965_scan_cancel_timeout(struct iwl4965_priv *priv, unsigned long ms)
  1854. {
  1855. unsigned long now = jiffies;
  1856. int ret;
  1857. ret = iwl4965_scan_cancel(priv);
  1858. if (ret && ms) {
  1859. mutex_unlock(&priv->mutex);
  1860. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  1861. test_bit(STATUS_SCANNING, &priv->status))
  1862. msleep(1);
  1863. mutex_lock(&priv->mutex);
  1864. return test_bit(STATUS_SCANNING, &priv->status);
  1865. }
  1866. return ret;
  1867. }
  1868. static void iwl4965_sequence_reset(struct iwl4965_priv *priv)
  1869. {
  1870. /* Reset ieee stats */
  1871. /* We don't reset the net_device_stats (ieee->stats) on
  1872. * re-association */
  1873. priv->last_seq_num = -1;
  1874. priv->last_frag_num = -1;
  1875. priv->last_packet_time = 0;
  1876. iwl4965_scan_cancel(priv);
  1877. }
  1878. #define MAX_UCODE_BEACON_INTERVAL 4096
  1879. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  1880. static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
  1881. {
  1882. u16 new_val = 0;
  1883. u16 beacon_factor = 0;
  1884. beacon_factor =
  1885. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  1886. / MAX_UCODE_BEACON_INTERVAL;
  1887. new_val = beacon_val / beacon_factor;
  1888. return cpu_to_le16(new_val);
  1889. }
  1890. static void iwl4965_setup_rxon_timing(struct iwl4965_priv *priv)
  1891. {
  1892. u64 interval_tm_unit;
  1893. u64 tsf, result;
  1894. unsigned long flags;
  1895. struct ieee80211_conf *conf = NULL;
  1896. u16 beacon_int = 0;
  1897. conf = ieee80211_get_hw_conf(priv->hw);
  1898. spin_lock_irqsave(&priv->lock, flags);
  1899. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  1900. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  1901. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  1902. tsf = priv->timestamp1;
  1903. tsf = ((tsf << 32) | priv->timestamp0);
  1904. beacon_int = priv->beacon_int;
  1905. spin_unlock_irqrestore(&priv->lock, flags);
  1906. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  1907. if (beacon_int == 0) {
  1908. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  1909. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  1910. } else {
  1911. priv->rxon_timing.beacon_interval =
  1912. cpu_to_le16(beacon_int);
  1913. priv->rxon_timing.beacon_interval =
  1914. iwl4965_adjust_beacon_interval(
  1915. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1916. }
  1917. priv->rxon_timing.atim_window = 0;
  1918. } else {
  1919. priv->rxon_timing.beacon_interval =
  1920. iwl4965_adjust_beacon_interval(conf->beacon_int);
  1921. /* TODO: we need to get atim_window from upper stack
  1922. * for now we set to 0 */
  1923. priv->rxon_timing.atim_window = 0;
  1924. }
  1925. interval_tm_unit =
  1926. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  1927. result = do_div(tsf, interval_tm_unit);
  1928. priv->rxon_timing.beacon_init_val =
  1929. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  1930. IWL_DEBUG_ASSOC
  1931. ("beacon interval %d beacon timer %d beacon tim %d\n",
  1932. le16_to_cpu(priv->rxon_timing.beacon_interval),
  1933. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  1934. le16_to_cpu(priv->rxon_timing.atim_window));
  1935. }
  1936. static int iwl4965_scan_initiate(struct iwl4965_priv *priv)
  1937. {
  1938. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1939. IWL_ERROR("APs don't scan.\n");
  1940. return 0;
  1941. }
  1942. if (!iwl4965_is_ready_rf(priv)) {
  1943. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  1944. return -EIO;
  1945. }
  1946. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1947. IWL_DEBUG_SCAN("Scan already in progress.\n");
  1948. return -EAGAIN;
  1949. }
  1950. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1951. IWL_DEBUG_SCAN("Scan request while abort pending. "
  1952. "Queuing.\n");
  1953. return -EAGAIN;
  1954. }
  1955. IWL_DEBUG_INFO("Starting scan...\n");
  1956. priv->scan_bands = 2;
  1957. set_bit(STATUS_SCANNING, &priv->status);
  1958. priv->scan_start = jiffies;
  1959. priv->scan_pass_start = priv->scan_start;
  1960. queue_work(priv->workqueue, &priv->request_scan);
  1961. return 0;
  1962. }
  1963. static int iwl4965_set_rxon_hwcrypto(struct iwl4965_priv *priv, int hw_decrypt)
  1964. {
  1965. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  1966. if (hw_decrypt)
  1967. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  1968. else
  1969. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  1970. return 0;
  1971. }
  1972. static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv,
  1973. enum ieee80211_band band)
  1974. {
  1975. if (band == IEEE80211_BAND_5GHZ) {
  1976. priv->staging_rxon.flags &=
  1977. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  1978. | RXON_FLG_CCK_MSK);
  1979. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1980. } else {
  1981. /* Copied from iwl4965_bg_post_associate() */
  1982. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  1983. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1984. else
  1985. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1986. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  1987. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1988. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  1989. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  1990. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  1991. }
  1992. }
  1993. /*
  1994. * initialize rxon structure with default values from eeprom
  1995. */
  1996. static void iwl4965_connection_init_rx_config(struct iwl4965_priv *priv)
  1997. {
  1998. const struct iwl4965_channel_info *ch_info;
  1999. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  2000. switch (priv->iw_mode) {
  2001. case IEEE80211_IF_TYPE_AP:
  2002. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  2003. break;
  2004. case IEEE80211_IF_TYPE_STA:
  2005. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  2006. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  2007. break;
  2008. case IEEE80211_IF_TYPE_IBSS:
  2009. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  2010. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  2011. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  2012. RXON_FILTER_ACCEPT_GRP_MSK;
  2013. break;
  2014. case IEEE80211_IF_TYPE_MNTR:
  2015. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  2016. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  2017. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  2018. break;
  2019. }
  2020. #if 0
  2021. /* TODO: Figure out when short_preamble would be set and cache from
  2022. * that */
  2023. if (!hw_to_local(priv->hw)->short_preamble)
  2024. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2025. else
  2026. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2027. #endif
  2028. ch_info = iwl4965_get_channel_info(priv, priv->band,
  2029. le16_to_cpu(priv->staging_rxon.channel));
  2030. if (!ch_info)
  2031. ch_info = &priv->channel_info[0];
  2032. /*
  2033. * in some case A channels are all non IBSS
  2034. * in this case force B/G channel
  2035. */
  2036. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  2037. !(is_channel_ibss(ch_info)))
  2038. ch_info = &priv->channel_info[0];
  2039. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  2040. priv->band = ch_info->band;
  2041. iwl4965_set_flags_for_phymode(priv, priv->band);
  2042. priv->staging_rxon.ofdm_basic_rates =
  2043. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2044. priv->staging_rxon.cck_basic_rates =
  2045. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2046. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  2047. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  2048. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2049. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  2050. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  2051. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  2052. iwl4965_set_rxon_chain(priv);
  2053. }
  2054. static int iwl4965_set_mode(struct iwl4965_priv *priv, int mode)
  2055. {
  2056. if (mode == IEEE80211_IF_TYPE_IBSS) {
  2057. const struct iwl4965_channel_info *ch_info;
  2058. ch_info = iwl4965_get_channel_info(priv,
  2059. priv->band,
  2060. le16_to_cpu(priv->staging_rxon.channel));
  2061. if (!ch_info || !is_channel_ibss(ch_info)) {
  2062. IWL_ERROR("channel %d not IBSS channel\n",
  2063. le16_to_cpu(priv->staging_rxon.channel));
  2064. return -EINVAL;
  2065. }
  2066. }
  2067. priv->iw_mode = mode;
  2068. iwl4965_connection_init_rx_config(priv);
  2069. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2070. iwl4965_clear_stations_table(priv);
  2071. /* dont commit rxon if rf-kill is on*/
  2072. if (!iwl4965_is_ready_rf(priv))
  2073. return -EAGAIN;
  2074. cancel_delayed_work(&priv->scan_check);
  2075. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  2076. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  2077. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  2078. return -EAGAIN;
  2079. }
  2080. iwl4965_commit_rxon(priv);
  2081. return 0;
  2082. }
  2083. static void iwl4965_build_tx_cmd_hwcrypto(struct iwl4965_priv *priv,
  2084. struct ieee80211_tx_control *ctl,
  2085. struct iwl4965_cmd *cmd,
  2086. struct sk_buff *skb_frag,
  2087. int last_frag)
  2088. {
  2089. struct iwl4965_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
  2090. switch (keyinfo->alg) {
  2091. case ALG_CCMP:
  2092. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  2093. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  2094. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  2095. break;
  2096. case ALG_TKIP:
  2097. #if 0
  2098. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  2099. if (last_frag)
  2100. memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
  2101. 8);
  2102. else
  2103. memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
  2104. #endif
  2105. break;
  2106. case ALG_WEP:
  2107. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  2108. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  2109. if (keyinfo->keylen == 13)
  2110. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  2111. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  2112. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  2113. "with key %d\n", ctl->key_idx);
  2114. break;
  2115. default:
  2116. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  2117. break;
  2118. }
  2119. }
  2120. /*
  2121. * handle build REPLY_TX command notification.
  2122. */
  2123. static void iwl4965_build_tx_cmd_basic(struct iwl4965_priv *priv,
  2124. struct iwl4965_cmd *cmd,
  2125. struct ieee80211_tx_control *ctrl,
  2126. struct ieee80211_hdr *hdr,
  2127. int is_unicast, u8 std_id)
  2128. {
  2129. __le16 *qc;
  2130. u16 fc = le16_to_cpu(hdr->frame_control);
  2131. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  2132. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2133. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  2134. tx_flags |= TX_CMD_FLG_ACK_MSK;
  2135. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  2136. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2137. if (ieee80211_is_probe_response(fc) &&
  2138. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  2139. tx_flags |= TX_CMD_FLG_TSF_MSK;
  2140. } else {
  2141. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  2142. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2143. }
  2144. if (ieee80211_is_back_request(fc))
  2145. tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
  2146. cmd->cmd.tx.sta_id = std_id;
  2147. if (ieee80211_get_morefrag(hdr))
  2148. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  2149. qc = ieee80211_get_qos_ctrl(hdr);
  2150. if (qc) {
  2151. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  2152. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  2153. } else
  2154. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2155. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  2156. tx_flags |= TX_CMD_FLG_RTS_MSK;
  2157. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  2158. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  2159. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2160. tx_flags |= TX_CMD_FLG_CTS_MSK;
  2161. }
  2162. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  2163. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2164. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  2165. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  2166. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  2167. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  2168. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
  2169. else
  2170. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
  2171. } else
  2172. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  2173. cmd->cmd.tx.driver_txop = 0;
  2174. cmd->cmd.tx.tx_flags = tx_flags;
  2175. cmd->cmd.tx.next_frame_len = 0;
  2176. }
  2177. /**
  2178. * iwl4965_get_sta_id - Find station's index within station table
  2179. *
  2180. * If new IBSS station, create new entry in station table
  2181. */
  2182. static int iwl4965_get_sta_id(struct iwl4965_priv *priv,
  2183. struct ieee80211_hdr *hdr)
  2184. {
  2185. int sta_id;
  2186. u16 fc = le16_to_cpu(hdr->frame_control);
  2187. DECLARE_MAC_BUF(mac);
  2188. /* If this frame is broadcast or management, use broadcast station id */
  2189. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  2190. is_multicast_ether_addr(hdr->addr1))
  2191. return priv->hw_setting.bcast_sta_id;
  2192. switch (priv->iw_mode) {
  2193. /* If we are a client station in a BSS network, use the special
  2194. * AP station entry (that's the only station we communicate with) */
  2195. case IEEE80211_IF_TYPE_STA:
  2196. return IWL_AP_ID;
  2197. /* If we are an AP, then find the station, or use BCAST */
  2198. case IEEE80211_IF_TYPE_AP:
  2199. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2200. if (sta_id != IWL_INVALID_STATION)
  2201. return sta_id;
  2202. return priv->hw_setting.bcast_sta_id;
  2203. /* If this frame is going out to an IBSS network, find the station,
  2204. * or create a new station table entry */
  2205. case IEEE80211_IF_TYPE_IBSS:
  2206. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2207. if (sta_id != IWL_INVALID_STATION)
  2208. return sta_id;
  2209. /* Create new station table entry */
  2210. sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
  2211. 0, CMD_ASYNC, NULL);
  2212. if (sta_id != IWL_INVALID_STATION)
  2213. return sta_id;
  2214. IWL_DEBUG_DROP("Station %s not in station map. "
  2215. "Defaulting to broadcast...\n",
  2216. print_mac(mac, hdr->addr1));
  2217. iwl4965_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  2218. return priv->hw_setting.bcast_sta_id;
  2219. default:
  2220. IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
  2221. return priv->hw_setting.bcast_sta_id;
  2222. }
  2223. }
  2224. /*
  2225. * start REPLY_TX command process
  2226. */
  2227. static int iwl4965_tx_skb(struct iwl4965_priv *priv,
  2228. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  2229. {
  2230. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2231. struct iwl4965_tfd_frame *tfd;
  2232. u32 *control_flags;
  2233. int txq_id = ctl->queue;
  2234. struct iwl4965_tx_queue *txq = NULL;
  2235. struct iwl4965_queue *q = NULL;
  2236. dma_addr_t phys_addr;
  2237. dma_addr_t txcmd_phys;
  2238. dma_addr_t scratch_phys;
  2239. struct iwl4965_cmd *out_cmd = NULL;
  2240. u16 len, idx, len_org;
  2241. u8 id, hdr_len, unicast;
  2242. u8 sta_id;
  2243. u16 seq_number = 0;
  2244. u16 fc;
  2245. __le16 *qc;
  2246. u8 wait_write_ptr = 0;
  2247. unsigned long flags;
  2248. int rc;
  2249. spin_lock_irqsave(&priv->lock, flags);
  2250. if (iwl4965_is_rfkill(priv)) {
  2251. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  2252. goto drop_unlock;
  2253. }
  2254. if (!priv->vif) {
  2255. IWL_DEBUG_DROP("Dropping - !priv->vif\n");
  2256. goto drop_unlock;
  2257. }
  2258. if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
  2259. IWL_ERROR("ERROR: No TX rate available.\n");
  2260. goto drop_unlock;
  2261. }
  2262. unicast = !is_multicast_ether_addr(hdr->addr1);
  2263. id = 0;
  2264. fc = le16_to_cpu(hdr->frame_control);
  2265. #ifdef CONFIG_IWL4965_DEBUG
  2266. if (ieee80211_is_auth(fc))
  2267. IWL_DEBUG_TX("Sending AUTH frame\n");
  2268. else if (ieee80211_is_assoc_request(fc))
  2269. IWL_DEBUG_TX("Sending ASSOC frame\n");
  2270. else if (ieee80211_is_reassoc_request(fc))
  2271. IWL_DEBUG_TX("Sending REASSOC frame\n");
  2272. #endif
  2273. /* drop all data frame if we are not associated */
  2274. if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
  2275. (!iwl4965_is_associated(priv) ||
  2276. ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
  2277. !priv->assoc_station_added)) {
  2278. IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
  2279. goto drop_unlock;
  2280. }
  2281. spin_unlock_irqrestore(&priv->lock, flags);
  2282. hdr_len = ieee80211_get_hdrlen(fc);
  2283. /* Find (or create) index into station table for destination station */
  2284. sta_id = iwl4965_get_sta_id(priv, hdr);
  2285. if (sta_id == IWL_INVALID_STATION) {
  2286. DECLARE_MAC_BUF(mac);
  2287. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  2288. print_mac(mac, hdr->addr1));
  2289. goto drop;
  2290. }
  2291. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  2292. qc = ieee80211_get_qos_ctrl(hdr);
  2293. if (qc) {
  2294. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2295. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  2296. IEEE80211_SCTL_SEQ;
  2297. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  2298. (hdr->seq_ctrl &
  2299. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  2300. seq_number += 0x10;
  2301. #ifdef CONFIG_IWL4965_HT
  2302. /* aggregation is on for this <sta,tid> */
  2303. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  2304. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  2305. priv->stations[sta_id].tid[tid].tfds_in_queue++;
  2306. #endif /* CONFIG_IWL4965_HT */
  2307. }
  2308. /* Descriptor for chosen Tx queue */
  2309. txq = &priv->txq[txq_id];
  2310. q = &txq->q;
  2311. spin_lock_irqsave(&priv->lock, flags);
  2312. /* Set up first empty TFD within this queue's circular TFD buffer */
  2313. tfd = &txq->bd[q->write_ptr];
  2314. memset(tfd, 0, sizeof(*tfd));
  2315. control_flags = (u32 *) tfd;
  2316. idx = get_cmd_index(q, q->write_ptr, 0);
  2317. /* Set up driver data for this TFD */
  2318. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
  2319. txq->txb[q->write_ptr].skb[0] = skb;
  2320. memcpy(&(txq->txb[q->write_ptr].status.control),
  2321. ctl, sizeof(struct ieee80211_tx_control));
  2322. /* Set up first empty entry in queue's array of Tx/cmd buffers */
  2323. out_cmd = &txq->cmd[idx];
  2324. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2325. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2326. /*
  2327. * Set up the Tx-command (not MAC!) header.
  2328. * Store the chosen Tx queue and TFD index within the sequence field;
  2329. * after Tx, uCode's Tx response will return this value so driver can
  2330. * locate the frame within the tx queue and do post-tx processing.
  2331. */
  2332. out_cmd->hdr.cmd = REPLY_TX;
  2333. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2334. INDEX_TO_SEQ(q->write_ptr)));
  2335. /* Copy MAC header from skb into command buffer */
  2336. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2337. /*
  2338. * Use the first empty entry in this queue's command buffer array
  2339. * to contain the Tx command and MAC header concatenated together
  2340. * (payload data will be in another buffer).
  2341. * Size of this varies, due to varying MAC header length.
  2342. * If end is not dword aligned, we'll have 2 extra bytes at the end
  2343. * of the MAC header (device reads on dword boundaries).
  2344. * We'll tell device about this padding later.
  2345. */
  2346. len = priv->hw_setting.tx_cmd_len +
  2347. sizeof(struct iwl4965_cmd_header) + hdr_len;
  2348. len_org = len;
  2349. len = (len + 3) & ~3;
  2350. if (len_org != len)
  2351. len_org = 1;
  2352. else
  2353. len_org = 0;
  2354. /* Physical address of this Tx command's header (not MAC header!),
  2355. * within command buffer array. */
  2356. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx +
  2357. offsetof(struct iwl4965_cmd, hdr);
  2358. /* Add buffer containing Tx command and MAC(!) header to TFD's
  2359. * first entry */
  2360. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2361. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2362. iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
  2363. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  2364. * if any (802.11 null frames have no payload). */
  2365. len = skb->len - hdr_len;
  2366. if (len) {
  2367. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2368. len, PCI_DMA_TODEVICE);
  2369. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2370. }
  2371. /* Tell 4965 about any 2-byte padding after MAC header */
  2372. if (len_org)
  2373. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  2374. /* Total # bytes to be transmitted */
  2375. len = (u16)skb->len;
  2376. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2377. /* TODO need this for burst mode later on */
  2378. iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2379. /* set is_hcca to 0; it probably will never be implemented */
  2380. iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2381. scratch_phys = txcmd_phys + sizeof(struct iwl4965_cmd_header) +
  2382. offsetof(struct iwl4965_tx_cmd, scratch);
  2383. out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
  2384. out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
  2385. if (!ieee80211_get_morefrag(hdr)) {
  2386. txq->need_update = 1;
  2387. if (qc) {
  2388. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2389. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2390. }
  2391. } else {
  2392. wait_write_ptr = 1;
  2393. txq->need_update = 0;
  2394. }
  2395. iwl4965_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2396. sizeof(out_cmd->cmd.tx));
  2397. iwl4965_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2398. ieee80211_get_hdrlen(fc));
  2399. /* Set up entry for this TFD in Tx byte-count array */
  2400. iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
  2401. /* Tell device the write index *just past* this latest filled TFD */
  2402. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  2403. rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
  2404. spin_unlock_irqrestore(&priv->lock, flags);
  2405. if (rc)
  2406. return rc;
  2407. if ((iwl4965_queue_space(q) < q->high_mark)
  2408. && priv->mac80211_registered) {
  2409. if (wait_write_ptr) {
  2410. spin_lock_irqsave(&priv->lock, flags);
  2411. txq->need_update = 1;
  2412. iwl4965_tx_queue_update_write_ptr(priv, txq);
  2413. spin_unlock_irqrestore(&priv->lock, flags);
  2414. }
  2415. ieee80211_stop_queue(priv->hw, ctl->queue);
  2416. }
  2417. return 0;
  2418. drop_unlock:
  2419. spin_unlock_irqrestore(&priv->lock, flags);
  2420. drop:
  2421. return -1;
  2422. }
  2423. static void iwl4965_set_rate(struct iwl4965_priv *priv)
  2424. {
  2425. const struct ieee80211_supported_band *hw = NULL;
  2426. struct ieee80211_rate *rate;
  2427. int i;
  2428. hw = iwl4965_get_hw_mode(priv, priv->band);
  2429. if (!hw) {
  2430. IWL_ERROR("Failed to set rate: unable to get hw mode\n");
  2431. return;
  2432. }
  2433. priv->active_rate = 0;
  2434. priv->active_rate_basic = 0;
  2435. for (i = 0; i < hw->n_bitrates; i++) {
  2436. rate = &(hw->bitrates[i]);
  2437. if (rate->hw_value < IWL_RATE_COUNT)
  2438. priv->active_rate |= (1 << rate->hw_value);
  2439. }
  2440. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2441. priv->active_rate, priv->active_rate_basic);
  2442. /*
  2443. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2444. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2445. * OFDM
  2446. */
  2447. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2448. priv->staging_rxon.cck_basic_rates =
  2449. ((priv->active_rate_basic &
  2450. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2451. else
  2452. priv->staging_rxon.cck_basic_rates =
  2453. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2454. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2455. priv->staging_rxon.ofdm_basic_rates =
  2456. ((priv->active_rate_basic &
  2457. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2458. IWL_FIRST_OFDM_RATE) & 0xFF;
  2459. else
  2460. priv->staging_rxon.ofdm_basic_rates =
  2461. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2462. }
  2463. static void iwl4965_radio_kill_sw(struct iwl4965_priv *priv, int disable_radio)
  2464. {
  2465. unsigned long flags;
  2466. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2467. return;
  2468. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2469. disable_radio ? "OFF" : "ON");
  2470. if (disable_radio) {
  2471. iwl4965_scan_cancel(priv);
  2472. /* FIXME: This is a workaround for AP */
  2473. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2474. spin_lock_irqsave(&priv->lock, flags);
  2475. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2476. CSR_UCODE_SW_BIT_RFKILL);
  2477. spin_unlock_irqrestore(&priv->lock, flags);
  2478. iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2479. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2480. }
  2481. return;
  2482. }
  2483. spin_lock_irqsave(&priv->lock, flags);
  2484. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2485. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2486. spin_unlock_irqrestore(&priv->lock, flags);
  2487. /* wake up ucode */
  2488. msleep(10);
  2489. spin_lock_irqsave(&priv->lock, flags);
  2490. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  2491. if (!iwl4965_grab_nic_access(priv))
  2492. iwl4965_release_nic_access(priv);
  2493. spin_unlock_irqrestore(&priv->lock, flags);
  2494. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2495. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2496. "disabled by HW switch\n");
  2497. return;
  2498. }
  2499. queue_work(priv->workqueue, &priv->restart);
  2500. return;
  2501. }
  2502. void iwl4965_set_decrypted_flag(struct iwl4965_priv *priv, struct sk_buff *skb,
  2503. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2504. {
  2505. u16 fc =
  2506. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2507. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2508. return;
  2509. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2510. return;
  2511. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2512. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2513. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2514. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2515. RX_RES_STATUS_BAD_ICV_MIC)
  2516. stats->flag |= RX_FLAG_MMIC_ERROR;
  2517. case RX_RES_STATUS_SEC_TYPE_WEP:
  2518. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2519. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2520. RX_RES_STATUS_DECRYPT_OK) {
  2521. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2522. stats->flag |= RX_FLAG_DECRYPTED;
  2523. }
  2524. break;
  2525. default:
  2526. break;
  2527. }
  2528. }
  2529. #define IWL_PACKET_RETRY_TIME HZ
  2530. int iwl4965_is_duplicate_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  2531. {
  2532. u16 sc = le16_to_cpu(header->seq_ctrl);
  2533. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2534. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2535. u16 *last_seq, *last_frag;
  2536. unsigned long *last_time;
  2537. switch (priv->iw_mode) {
  2538. case IEEE80211_IF_TYPE_IBSS:{
  2539. struct list_head *p;
  2540. struct iwl4965_ibss_seq *entry = NULL;
  2541. u8 *mac = header->addr2;
  2542. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2543. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2544. entry = list_entry(p, struct iwl4965_ibss_seq, list);
  2545. if (!compare_ether_addr(entry->mac, mac))
  2546. break;
  2547. }
  2548. if (p == &priv->ibss_mac_hash[index]) {
  2549. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2550. if (!entry) {
  2551. IWL_ERROR("Cannot malloc new mac entry\n");
  2552. return 0;
  2553. }
  2554. memcpy(entry->mac, mac, ETH_ALEN);
  2555. entry->seq_num = seq;
  2556. entry->frag_num = frag;
  2557. entry->packet_time = jiffies;
  2558. list_add(&entry->list, &priv->ibss_mac_hash[index]);
  2559. return 0;
  2560. }
  2561. last_seq = &entry->seq_num;
  2562. last_frag = &entry->frag_num;
  2563. last_time = &entry->packet_time;
  2564. break;
  2565. }
  2566. case IEEE80211_IF_TYPE_STA:
  2567. last_seq = &priv->last_seq_num;
  2568. last_frag = &priv->last_frag_num;
  2569. last_time = &priv->last_packet_time;
  2570. break;
  2571. default:
  2572. return 0;
  2573. }
  2574. if ((*last_seq == seq) &&
  2575. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2576. if (*last_frag == frag)
  2577. goto drop;
  2578. if (*last_frag + 1 != frag)
  2579. /* out-of-order fragment */
  2580. goto drop;
  2581. } else
  2582. *last_seq = seq;
  2583. *last_frag = frag;
  2584. *last_time = jiffies;
  2585. return 0;
  2586. drop:
  2587. return 1;
  2588. }
  2589. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2590. #include "iwl-spectrum.h"
  2591. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2592. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2593. #define TIME_UNIT 1024
  2594. /*
  2595. * extended beacon time format
  2596. * time in usec will be changed into a 32-bit value in 8:24 format
  2597. * the high 1 byte is the beacon counts
  2598. * the lower 3 bytes is the time in usec within one beacon interval
  2599. */
  2600. static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2601. {
  2602. u32 quot;
  2603. u32 rem;
  2604. u32 interval = beacon_interval * 1024;
  2605. if (!interval || !usec)
  2606. return 0;
  2607. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2608. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2609. return (quot << 24) + rem;
  2610. }
  2611. /* base is usually what we get from ucode with each received frame,
  2612. * the same as HW timer counter counting down
  2613. */
  2614. static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2615. {
  2616. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2617. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2618. u32 interval = beacon_interval * TIME_UNIT;
  2619. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2620. (addon & BEACON_TIME_MASK_HIGH);
  2621. if (base_low > addon_low)
  2622. res += base_low - addon_low;
  2623. else if (base_low < addon_low) {
  2624. res += interval + base_low - addon_low;
  2625. res += (1 << 24);
  2626. } else
  2627. res += (1 << 24);
  2628. return cpu_to_le32(res);
  2629. }
  2630. static int iwl4965_get_measurement(struct iwl4965_priv *priv,
  2631. struct ieee80211_measurement_params *params,
  2632. u8 type)
  2633. {
  2634. struct iwl4965_spectrum_cmd spectrum;
  2635. struct iwl4965_rx_packet *res;
  2636. struct iwl4965_host_cmd cmd = {
  2637. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2638. .data = (void *)&spectrum,
  2639. .meta.flags = CMD_WANT_SKB,
  2640. };
  2641. u32 add_time = le64_to_cpu(params->start_time);
  2642. int rc;
  2643. int spectrum_resp_status;
  2644. int duration = le16_to_cpu(params->duration);
  2645. if (iwl4965_is_associated(priv))
  2646. add_time =
  2647. iwl4965_usecs_to_beacons(
  2648. le64_to_cpu(params->start_time) - priv->last_tsf,
  2649. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2650. memset(&spectrum, 0, sizeof(spectrum));
  2651. spectrum.channel_count = cpu_to_le16(1);
  2652. spectrum.flags =
  2653. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2654. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2655. cmd.len = sizeof(spectrum);
  2656. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2657. if (iwl4965_is_associated(priv))
  2658. spectrum.start_time =
  2659. iwl4965_add_beacon_time(priv->last_beacon_time,
  2660. add_time,
  2661. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2662. else
  2663. spectrum.start_time = 0;
  2664. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2665. spectrum.channels[0].channel = params->channel;
  2666. spectrum.channels[0].type = type;
  2667. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2668. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2669. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2670. rc = iwl4965_send_cmd_sync(priv, &cmd);
  2671. if (rc)
  2672. return rc;
  2673. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  2674. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2675. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2676. rc = -EIO;
  2677. }
  2678. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2679. switch (spectrum_resp_status) {
  2680. case 0: /* Command will be handled */
  2681. if (res->u.spectrum.id != 0xff) {
  2682. IWL_DEBUG_INFO
  2683. ("Replaced existing measurement: %d\n",
  2684. res->u.spectrum.id);
  2685. priv->measurement_status &= ~MEASUREMENT_READY;
  2686. }
  2687. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2688. rc = 0;
  2689. break;
  2690. case 1: /* Command will not be handled */
  2691. rc = -EAGAIN;
  2692. break;
  2693. }
  2694. dev_kfree_skb_any(cmd.meta.u.skb);
  2695. return rc;
  2696. }
  2697. #endif
  2698. static void iwl4965_txstatus_to_ieee(struct iwl4965_priv *priv,
  2699. struct iwl4965_tx_info *tx_sta)
  2700. {
  2701. tx_sta->status.ack_signal = 0;
  2702. tx_sta->status.excessive_retries = 0;
  2703. tx_sta->status.queue_length = 0;
  2704. tx_sta->status.queue_number = 0;
  2705. if (in_interrupt())
  2706. ieee80211_tx_status_irqsafe(priv->hw,
  2707. tx_sta->skb[0], &(tx_sta->status));
  2708. else
  2709. ieee80211_tx_status(priv->hw,
  2710. tx_sta->skb[0], &(tx_sta->status));
  2711. tx_sta->skb[0] = NULL;
  2712. }
  2713. /**
  2714. * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
  2715. *
  2716. * When FW advances 'R' index, all entries between old and new 'R' index
  2717. * need to be reclaimed. As result, some free space forms. If there is
  2718. * enough free space (> low mark), wake the stack that feeds us.
  2719. */
  2720. int iwl4965_tx_queue_reclaim(struct iwl4965_priv *priv, int txq_id, int index)
  2721. {
  2722. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2723. struct iwl4965_queue *q = &txq->q;
  2724. int nfreed = 0;
  2725. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2726. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2727. "is out of range [0-%d] %d %d.\n", txq_id,
  2728. index, q->n_bd, q->write_ptr, q->read_ptr);
  2729. return 0;
  2730. }
  2731. for (index = iwl_queue_inc_wrap(index, q->n_bd);
  2732. q->read_ptr != index;
  2733. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2734. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2735. iwl4965_txstatus_to_ieee(priv,
  2736. &(txq->txb[txq->q.read_ptr]));
  2737. iwl4965_hw_txq_free_tfd(priv, txq);
  2738. } else if (nfreed > 1) {
  2739. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2740. q->write_ptr, q->read_ptr);
  2741. queue_work(priv->workqueue, &priv->restart);
  2742. }
  2743. nfreed++;
  2744. }
  2745. /* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2746. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2747. priv->mac80211_registered)
  2748. ieee80211_wake_queue(priv->hw, txq_id); */
  2749. return nfreed;
  2750. }
  2751. static int iwl4965_is_tx_success(u32 status)
  2752. {
  2753. status &= TX_STATUS_MSK;
  2754. return (status == TX_STATUS_SUCCESS)
  2755. || (status == TX_STATUS_DIRECT_DONE);
  2756. }
  2757. /******************************************************************************
  2758. *
  2759. * Generic RX handler implementations
  2760. *
  2761. ******************************************************************************/
  2762. #ifdef CONFIG_IWL4965_HT
  2763. static inline int iwl4965_get_ra_sta_id(struct iwl4965_priv *priv,
  2764. struct ieee80211_hdr *hdr)
  2765. {
  2766. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  2767. return IWL_AP_ID;
  2768. else {
  2769. u8 *da = ieee80211_get_DA(hdr);
  2770. return iwl4965_hw_find_station(priv, da);
  2771. }
  2772. }
  2773. static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
  2774. struct iwl4965_priv *priv, int txq_id, int idx)
  2775. {
  2776. if (priv->txq[txq_id].txb[idx].skb[0])
  2777. return (struct ieee80211_hdr *)priv->txq[txq_id].
  2778. txb[idx].skb[0]->data;
  2779. return NULL;
  2780. }
  2781. static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
  2782. {
  2783. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  2784. tx_resp->frame_count);
  2785. return le32_to_cpu(*scd_ssn) & MAX_SN;
  2786. }
  2787. /**
  2788. * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
  2789. */
  2790. static int iwl4965_tx_status_reply_tx(struct iwl4965_priv *priv,
  2791. struct iwl4965_ht_agg *agg,
  2792. struct iwl4965_tx_resp_agg *tx_resp,
  2793. u16 start_idx)
  2794. {
  2795. u16 status;
  2796. struct agg_tx_status *frame_status = &tx_resp->status;
  2797. struct ieee80211_tx_status *tx_status = NULL;
  2798. struct ieee80211_hdr *hdr = NULL;
  2799. int i, sh;
  2800. int txq_id, idx;
  2801. u16 seq;
  2802. if (agg->wait_for_ba)
  2803. IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
  2804. agg->frame_count = tx_resp->frame_count;
  2805. agg->start_idx = start_idx;
  2806. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2807. agg->bitmap = 0;
  2808. /* # frames attempted by Tx command */
  2809. if (agg->frame_count == 1) {
  2810. /* Only one frame was attempted; no block-ack will arrive */
  2811. status = le16_to_cpu(frame_status[0].status);
  2812. seq = le16_to_cpu(frame_status[0].sequence);
  2813. idx = SEQ_TO_INDEX(seq);
  2814. txq_id = SEQ_TO_QUEUE(seq);
  2815. /* FIXME: code repetition */
  2816. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
  2817. agg->frame_count, agg->start_idx, idx);
  2818. tx_status = &(priv->txq[txq_id].txb[idx].status);
  2819. tx_status->retry_count = tx_resp->failure_frame;
  2820. tx_status->queue_number = status & 0xff;
  2821. tx_status->queue_length = tx_resp->failure_rts;
  2822. tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
  2823. tx_status->flags = iwl4965_is_tx_success(status)?
  2824. IEEE80211_TX_STATUS_ACK : 0;
  2825. iwl4965_hwrate_to_tx_control(priv,
  2826. le32_to_cpu(tx_resp->rate_n_flags),
  2827. &tx_status->control);
  2828. /* FIXME: code repetition end */
  2829. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  2830. status & 0xff, tx_resp->failure_frame);
  2831. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  2832. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  2833. agg->wait_for_ba = 0;
  2834. } else {
  2835. /* Two or more frames were attempted; expect block-ack */
  2836. u64 bitmap = 0;
  2837. int start = agg->start_idx;
  2838. /* Construct bit-map of pending frames within Tx window */
  2839. for (i = 0; i < agg->frame_count; i++) {
  2840. u16 sc;
  2841. status = le16_to_cpu(frame_status[i].status);
  2842. seq = le16_to_cpu(frame_status[i].sequence);
  2843. idx = SEQ_TO_INDEX(seq);
  2844. txq_id = SEQ_TO_QUEUE(seq);
  2845. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  2846. AGG_TX_STATE_ABORT_MSK))
  2847. continue;
  2848. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  2849. agg->frame_count, txq_id, idx);
  2850. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
  2851. sc = le16_to_cpu(hdr->seq_ctrl);
  2852. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  2853. IWL_ERROR("BUG_ON idx doesn't match seq control"
  2854. " idx=%d, seq_idx=%d, seq=%d\n",
  2855. idx, SEQ_TO_SN(sc),
  2856. hdr->seq_ctrl);
  2857. return -1;
  2858. }
  2859. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  2860. i, idx, SEQ_TO_SN(sc));
  2861. sh = idx - start;
  2862. if (sh > 64) {
  2863. sh = (start - idx) + 0xff;
  2864. bitmap = bitmap << sh;
  2865. sh = 0;
  2866. start = idx;
  2867. } else if (sh < -64)
  2868. sh = 0xff - (start - idx);
  2869. else if (sh < 0) {
  2870. sh = start - idx;
  2871. start = idx;
  2872. bitmap = bitmap << sh;
  2873. sh = 0;
  2874. }
  2875. bitmap |= (1 << sh);
  2876. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  2877. start, (u32)(bitmap & 0xFFFFFFFF));
  2878. }
  2879. agg->bitmap = bitmap;
  2880. agg->start_idx = start;
  2881. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2882. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
  2883. agg->frame_count, agg->start_idx,
  2884. agg->bitmap);
  2885. if (bitmap)
  2886. agg->wait_for_ba = 1;
  2887. }
  2888. return 0;
  2889. }
  2890. #endif
  2891. /**
  2892. * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
  2893. */
  2894. static void iwl4965_rx_reply_tx(struct iwl4965_priv *priv,
  2895. struct iwl4965_rx_mem_buffer *rxb)
  2896. {
  2897. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2898. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2899. int txq_id = SEQ_TO_QUEUE(sequence);
  2900. int index = SEQ_TO_INDEX(sequence);
  2901. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2902. struct ieee80211_tx_status *tx_status;
  2903. struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  2904. u32 status = le32_to_cpu(tx_resp->status);
  2905. #ifdef CONFIG_IWL4965_HT
  2906. int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
  2907. struct ieee80211_hdr *hdr;
  2908. __le16 *qc;
  2909. #endif
  2910. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  2911. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  2912. "is out of range [0-%d] %d %d\n", txq_id,
  2913. index, txq->q.n_bd, txq->q.write_ptr,
  2914. txq->q.read_ptr);
  2915. return;
  2916. }
  2917. #ifdef CONFIG_IWL4965_HT
  2918. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
  2919. qc = ieee80211_get_qos_ctrl(hdr);
  2920. if (qc)
  2921. tid = le16_to_cpu(*qc) & 0xf;
  2922. sta_id = iwl4965_get_ra_sta_id(priv, hdr);
  2923. if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
  2924. IWL_ERROR("Station not known\n");
  2925. return;
  2926. }
  2927. if (txq->sched_retry) {
  2928. const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
  2929. struct iwl4965_ht_agg *agg = NULL;
  2930. if (!qc)
  2931. return;
  2932. agg = &priv->stations[sta_id].tid[tid].agg;
  2933. iwl4965_tx_status_reply_tx(priv, agg,
  2934. (struct iwl4965_tx_resp_agg *)tx_resp, index);
  2935. if ((tx_resp->frame_count == 1) &&
  2936. !iwl4965_is_tx_success(status)) {
  2937. /* TODO: send BAR */
  2938. }
  2939. if (txq->q.read_ptr != (scd_ssn & 0xff)) {
  2940. int freed;
  2941. index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  2942. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  2943. "%d index %d\n", scd_ssn , index);
  2944. freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2945. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2946. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2947. txq_id >= 0 && priv->mac80211_registered &&
  2948. agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
  2949. ieee80211_wake_queue(priv->hw, txq_id);
  2950. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2951. }
  2952. } else {
  2953. #endif /* CONFIG_IWL4965_HT */
  2954. tx_status = &(txq->txb[txq->q.read_ptr].status);
  2955. tx_status->retry_count = tx_resp->failure_frame;
  2956. tx_status->queue_number = status;
  2957. tx_status->queue_length = tx_resp->bt_kill_count;
  2958. tx_status->queue_length |= tx_resp->failure_rts;
  2959. tx_status->flags =
  2960. iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  2961. iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags),
  2962. &tx_status->control);
  2963. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  2964. "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
  2965. status, le32_to_cpu(tx_resp->rate_n_flags),
  2966. tx_resp->failure_frame);
  2967. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  2968. if (index != -1) {
  2969. int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2970. #ifdef CONFIG_IWL4965_HT
  2971. if (tid != MAX_TID_COUNT)
  2972. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2973. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2974. (txq_id >= 0) &&
  2975. priv->mac80211_registered)
  2976. ieee80211_wake_queue(priv->hw, txq_id);
  2977. if (tid != MAX_TID_COUNT)
  2978. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2979. #endif
  2980. }
  2981. #ifdef CONFIG_IWL4965_HT
  2982. }
  2983. #endif /* CONFIG_IWL4965_HT */
  2984. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  2985. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  2986. }
  2987. static void iwl4965_rx_reply_alive(struct iwl4965_priv *priv,
  2988. struct iwl4965_rx_mem_buffer *rxb)
  2989. {
  2990. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2991. struct iwl4965_alive_resp *palive;
  2992. struct delayed_work *pwork;
  2993. palive = &pkt->u.alive_frame;
  2994. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  2995. "0x%01X 0x%01X\n",
  2996. palive->is_valid, palive->ver_type,
  2997. palive->ver_subtype);
  2998. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  2999. IWL_DEBUG_INFO("Initialization Alive received.\n");
  3000. memcpy(&priv->card_alive_init,
  3001. &pkt->u.alive_frame,
  3002. sizeof(struct iwl4965_init_alive_resp));
  3003. pwork = &priv->init_alive_start;
  3004. } else {
  3005. IWL_DEBUG_INFO("Runtime Alive received.\n");
  3006. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  3007. sizeof(struct iwl4965_alive_resp));
  3008. pwork = &priv->alive_start;
  3009. }
  3010. /* We delay the ALIVE response by 5ms to
  3011. * give the HW RF Kill time to activate... */
  3012. if (palive->is_valid == UCODE_VALID_OK)
  3013. queue_delayed_work(priv->workqueue, pwork,
  3014. msecs_to_jiffies(5));
  3015. else
  3016. IWL_WARNING("uCode did not respond OK.\n");
  3017. }
  3018. static void iwl4965_rx_reply_add_sta(struct iwl4965_priv *priv,
  3019. struct iwl4965_rx_mem_buffer *rxb)
  3020. {
  3021. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3022. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  3023. return;
  3024. }
  3025. static void iwl4965_rx_reply_error(struct iwl4965_priv *priv,
  3026. struct iwl4965_rx_mem_buffer *rxb)
  3027. {
  3028. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3029. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  3030. "seq 0x%04X ser 0x%08X\n",
  3031. le32_to_cpu(pkt->u.err_resp.error_type),
  3032. get_cmd_string(pkt->u.err_resp.cmd_id),
  3033. pkt->u.err_resp.cmd_id,
  3034. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  3035. le32_to_cpu(pkt->u.err_resp.error_info));
  3036. }
  3037. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  3038. static void iwl4965_rx_csa(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  3039. {
  3040. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3041. struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
  3042. struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
  3043. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  3044. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  3045. rxon->channel = csa->channel;
  3046. priv->staging_rxon.channel = csa->channel;
  3047. }
  3048. static void iwl4965_rx_spectrum_measure_notif(struct iwl4965_priv *priv,
  3049. struct iwl4965_rx_mem_buffer *rxb)
  3050. {
  3051. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  3052. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3053. struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
  3054. if (!report->state) {
  3055. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  3056. "Spectrum Measure Notification: Start\n");
  3057. return;
  3058. }
  3059. memcpy(&priv->measure_report, report, sizeof(*report));
  3060. priv->measurement_status |= MEASUREMENT_READY;
  3061. #endif
  3062. }
  3063. static void iwl4965_rx_pm_sleep_notif(struct iwl4965_priv *priv,
  3064. struct iwl4965_rx_mem_buffer *rxb)
  3065. {
  3066. #ifdef CONFIG_IWL4965_DEBUG
  3067. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3068. struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
  3069. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  3070. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  3071. #endif
  3072. }
  3073. static void iwl4965_rx_pm_debug_statistics_notif(struct iwl4965_priv *priv,
  3074. struct iwl4965_rx_mem_buffer *rxb)
  3075. {
  3076. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3077. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  3078. "notification for %s:\n",
  3079. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  3080. iwl4965_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  3081. }
  3082. static void iwl4965_bg_beacon_update(struct work_struct *work)
  3083. {
  3084. struct iwl4965_priv *priv =
  3085. container_of(work, struct iwl4965_priv, beacon_update);
  3086. struct sk_buff *beacon;
  3087. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  3088. beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
  3089. if (!beacon) {
  3090. IWL_ERROR("update beacon failed\n");
  3091. return;
  3092. }
  3093. mutex_lock(&priv->mutex);
  3094. /* new beacon skb is allocated every time; dispose previous.*/
  3095. if (priv->ibss_beacon)
  3096. dev_kfree_skb(priv->ibss_beacon);
  3097. priv->ibss_beacon = beacon;
  3098. mutex_unlock(&priv->mutex);
  3099. iwl4965_send_beacon_cmd(priv);
  3100. }
  3101. static void iwl4965_rx_beacon_notif(struct iwl4965_priv *priv,
  3102. struct iwl4965_rx_mem_buffer *rxb)
  3103. {
  3104. #ifdef CONFIG_IWL4965_DEBUG
  3105. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3106. struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
  3107. u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  3108. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  3109. "tsf %d %d rate %d\n",
  3110. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  3111. beacon->beacon_notify_hdr.failure_frame,
  3112. le32_to_cpu(beacon->ibss_mgr_status),
  3113. le32_to_cpu(beacon->high_tsf),
  3114. le32_to_cpu(beacon->low_tsf), rate);
  3115. #endif
  3116. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  3117. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  3118. queue_work(priv->workqueue, &priv->beacon_update);
  3119. }
  3120. /* Service response to REPLY_SCAN_CMD (0x80) */
  3121. static void iwl4965_rx_reply_scan(struct iwl4965_priv *priv,
  3122. struct iwl4965_rx_mem_buffer *rxb)
  3123. {
  3124. #ifdef CONFIG_IWL4965_DEBUG
  3125. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3126. struct iwl4965_scanreq_notification *notif =
  3127. (struct iwl4965_scanreq_notification *)pkt->u.raw;
  3128. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  3129. #endif
  3130. }
  3131. /* Service SCAN_START_NOTIFICATION (0x82) */
  3132. static void iwl4965_rx_scan_start_notif(struct iwl4965_priv *priv,
  3133. struct iwl4965_rx_mem_buffer *rxb)
  3134. {
  3135. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3136. struct iwl4965_scanstart_notification *notif =
  3137. (struct iwl4965_scanstart_notification *)pkt->u.raw;
  3138. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  3139. IWL_DEBUG_SCAN("Scan start: "
  3140. "%d [802.11%s] "
  3141. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  3142. notif->channel,
  3143. notif->band ? "bg" : "a",
  3144. notif->tsf_high,
  3145. notif->tsf_low, notif->status, notif->beacon_timer);
  3146. }
  3147. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  3148. static void iwl4965_rx_scan_results_notif(struct iwl4965_priv *priv,
  3149. struct iwl4965_rx_mem_buffer *rxb)
  3150. {
  3151. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3152. struct iwl4965_scanresults_notification *notif =
  3153. (struct iwl4965_scanresults_notification *)pkt->u.raw;
  3154. IWL_DEBUG_SCAN("Scan ch.res: "
  3155. "%d [802.11%s] "
  3156. "(TSF: 0x%08X:%08X) - %d "
  3157. "elapsed=%lu usec (%dms since last)\n",
  3158. notif->channel,
  3159. notif->band ? "bg" : "a",
  3160. le32_to_cpu(notif->tsf_high),
  3161. le32_to_cpu(notif->tsf_low),
  3162. le32_to_cpu(notif->statistics[0]),
  3163. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  3164. jiffies_to_msecs(elapsed_jiffies
  3165. (priv->last_scan_jiffies, jiffies)));
  3166. priv->last_scan_jiffies = jiffies;
  3167. priv->next_scan_jiffies = 0;
  3168. }
  3169. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  3170. static void iwl4965_rx_scan_complete_notif(struct iwl4965_priv *priv,
  3171. struct iwl4965_rx_mem_buffer *rxb)
  3172. {
  3173. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3174. struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  3175. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  3176. scan_notif->scanned_channels,
  3177. scan_notif->tsf_low,
  3178. scan_notif->tsf_high, scan_notif->status);
  3179. /* The HW is no longer scanning */
  3180. clear_bit(STATUS_SCAN_HW, &priv->status);
  3181. /* The scan completion notification came in, so kill that timer... */
  3182. cancel_delayed_work(&priv->scan_check);
  3183. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  3184. (priv->scan_bands == 2) ? "2.4" : "5.2",
  3185. jiffies_to_msecs(elapsed_jiffies
  3186. (priv->scan_pass_start, jiffies)));
  3187. /* Remove this scanned band from the list
  3188. * of pending bands to scan */
  3189. priv->scan_bands--;
  3190. /* If a request to abort was given, or the scan did not succeed
  3191. * then we reset the scan state machine and terminate,
  3192. * re-queuing another scan if one has been requested */
  3193. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3194. IWL_DEBUG_INFO("Aborted scan completed.\n");
  3195. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  3196. } else {
  3197. /* If there are more bands on this scan pass reschedule */
  3198. if (priv->scan_bands > 0)
  3199. goto reschedule;
  3200. }
  3201. priv->last_scan_jiffies = jiffies;
  3202. priv->next_scan_jiffies = 0;
  3203. IWL_DEBUG_INFO("Setting scan to off\n");
  3204. clear_bit(STATUS_SCANNING, &priv->status);
  3205. IWL_DEBUG_INFO("Scan took %dms\n",
  3206. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  3207. queue_work(priv->workqueue, &priv->scan_completed);
  3208. return;
  3209. reschedule:
  3210. priv->scan_pass_start = jiffies;
  3211. queue_work(priv->workqueue, &priv->request_scan);
  3212. }
  3213. /* Handle notification from uCode that card's power state is changing
  3214. * due to software, hardware, or critical temperature RFKILL */
  3215. static void iwl4965_rx_card_state_notif(struct iwl4965_priv *priv,
  3216. struct iwl4965_rx_mem_buffer *rxb)
  3217. {
  3218. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3219. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  3220. unsigned long status = priv->status;
  3221. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  3222. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  3223. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  3224. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  3225. RF_CARD_DISABLED)) {
  3226. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3227. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3228. if (!iwl4965_grab_nic_access(priv)) {
  3229. iwl4965_write_direct32(
  3230. priv, HBUS_TARG_MBX_C,
  3231. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3232. iwl4965_release_nic_access(priv);
  3233. }
  3234. if (!(flags & RXON_CARD_DISABLED)) {
  3235. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  3236. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3237. if (!iwl4965_grab_nic_access(priv)) {
  3238. iwl4965_write_direct32(
  3239. priv, HBUS_TARG_MBX_C,
  3240. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3241. iwl4965_release_nic_access(priv);
  3242. }
  3243. }
  3244. if (flags & RF_CARD_DISABLED) {
  3245. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3246. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  3247. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3248. if (!iwl4965_grab_nic_access(priv))
  3249. iwl4965_release_nic_access(priv);
  3250. }
  3251. }
  3252. if (flags & HW_CARD_DISABLED)
  3253. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3254. else
  3255. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3256. if (flags & SW_CARD_DISABLED)
  3257. set_bit(STATUS_RF_KILL_SW, &priv->status);
  3258. else
  3259. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  3260. if (!(flags & RXON_CARD_DISABLED))
  3261. iwl4965_scan_cancel(priv);
  3262. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  3263. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  3264. (test_bit(STATUS_RF_KILL_SW, &status) !=
  3265. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  3266. queue_work(priv->workqueue, &priv->rf_kill);
  3267. else
  3268. wake_up_interruptible(&priv->wait_command_queue);
  3269. }
  3270. /**
  3271. * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
  3272. *
  3273. * Setup the RX handlers for each of the reply types sent from the uCode
  3274. * to the host.
  3275. *
  3276. * This function chains into the hardware specific files for them to setup
  3277. * any hardware specific handlers as well.
  3278. */
  3279. static void iwl4965_setup_rx_handlers(struct iwl4965_priv *priv)
  3280. {
  3281. priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
  3282. priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
  3283. priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
  3284. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
  3285. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  3286. iwl4965_rx_spectrum_measure_notif;
  3287. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
  3288. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  3289. iwl4965_rx_pm_debug_statistics_notif;
  3290. priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
  3291. /*
  3292. * The same handler is used for both the REPLY to a discrete
  3293. * statistics request from the host as well as for the periodic
  3294. * statistics notifications (after received beacons) from the uCode.
  3295. */
  3296. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
  3297. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
  3298. priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
  3299. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
  3300. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  3301. iwl4965_rx_scan_results_notif;
  3302. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  3303. iwl4965_rx_scan_complete_notif;
  3304. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
  3305. priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
  3306. /* Set up hardware specific Rx handlers */
  3307. iwl4965_hw_rx_handler_setup(priv);
  3308. }
  3309. /**
  3310. * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3311. * @rxb: Rx buffer to reclaim
  3312. *
  3313. * If an Rx buffer has an async callback associated with it the callback
  3314. * will be executed. The attached skb (if present) will only be freed
  3315. * if the callback returns 1
  3316. */
  3317. static void iwl4965_tx_cmd_complete(struct iwl4965_priv *priv,
  3318. struct iwl4965_rx_mem_buffer *rxb)
  3319. {
  3320. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3321. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3322. int txq_id = SEQ_TO_QUEUE(sequence);
  3323. int index = SEQ_TO_INDEX(sequence);
  3324. int huge = sequence & SEQ_HUGE_FRAME;
  3325. int cmd_index;
  3326. struct iwl4965_cmd *cmd;
  3327. /* If a Tx command is being handled and it isn't in the actual
  3328. * command queue then there a command routing bug has been introduced
  3329. * in the queue management code. */
  3330. if (txq_id != IWL_CMD_QUEUE_NUM)
  3331. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3332. txq_id, pkt->hdr.cmd);
  3333. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3334. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3335. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3336. /* Input error checking is done when commands are added to queue. */
  3337. if (cmd->meta.flags & CMD_WANT_SKB) {
  3338. cmd->meta.source->u.skb = rxb->skb;
  3339. rxb->skb = NULL;
  3340. } else if (cmd->meta.u.callback &&
  3341. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3342. rxb->skb = NULL;
  3343. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3344. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3345. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3346. wake_up_interruptible(&priv->wait_command_queue);
  3347. }
  3348. }
  3349. /************************** RX-FUNCTIONS ****************************/
  3350. /*
  3351. * Rx theory of operation
  3352. *
  3353. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  3354. * each of which point to Receive Buffers to be filled by 4965. These get
  3355. * used not only for Rx frames, but for any command response or notification
  3356. * from the 4965. The driver and 4965 manage the Rx buffers by means
  3357. * of indexes into the circular buffer.
  3358. *
  3359. * Rx Queue Indexes
  3360. * The host/firmware share two index registers for managing the Rx buffers.
  3361. *
  3362. * The READ index maps to the first position that the firmware may be writing
  3363. * to -- the driver can read up to (but not including) this position and get
  3364. * good data.
  3365. * The READ index is managed by the firmware once the card is enabled.
  3366. *
  3367. * The WRITE index maps to the last position the driver has read from -- the
  3368. * position preceding WRITE is the last slot the firmware can place a packet.
  3369. *
  3370. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3371. * WRITE = READ.
  3372. *
  3373. * During initialization, the host sets up the READ queue position to the first
  3374. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3375. *
  3376. * When the firmware places a packet in a buffer, it will advance the READ index
  3377. * and fire the RX interrupt. The driver can then query the READ index and
  3378. * process as many packets as possible, moving the WRITE index forward as it
  3379. * resets the Rx queue buffers with new memory.
  3380. *
  3381. * The management in the driver is as follows:
  3382. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3383. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3384. * to replenish the iwl->rxq->rx_free.
  3385. * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
  3386. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3387. * 'processed' and 'read' driver indexes as well)
  3388. * + A received packet is processed and handed to the kernel network stack,
  3389. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3390. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3391. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3392. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3393. * were enough free buffers and RX_STALLED is set it is cleared.
  3394. *
  3395. *
  3396. * Driver sequence:
  3397. *
  3398. * iwl4965_rx_queue_alloc() Allocates rx_free
  3399. * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3400. * iwl4965_rx_queue_restock
  3401. * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
  3402. * queue, updates firmware pointers, and updates
  3403. * the WRITE index. If insufficient rx_free buffers
  3404. * are available, schedules iwl4965_rx_replenish
  3405. *
  3406. * -- enable interrupts --
  3407. * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
  3408. * READ INDEX, detaching the SKB from the pool.
  3409. * Moves the packet buffer from queue to rx_used.
  3410. * Calls iwl4965_rx_queue_restock to refill any empty
  3411. * slots.
  3412. * ...
  3413. *
  3414. */
  3415. /**
  3416. * iwl4965_rx_queue_space - Return number of free slots available in queue.
  3417. */
  3418. static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
  3419. {
  3420. int s = q->read - q->write;
  3421. if (s <= 0)
  3422. s += RX_QUEUE_SIZE;
  3423. /* keep some buffer to not confuse full and empty queue */
  3424. s -= 2;
  3425. if (s < 0)
  3426. s = 0;
  3427. return s;
  3428. }
  3429. /**
  3430. * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3431. */
  3432. int iwl4965_rx_queue_update_write_ptr(struct iwl4965_priv *priv, struct iwl4965_rx_queue *q)
  3433. {
  3434. u32 reg = 0;
  3435. int rc = 0;
  3436. unsigned long flags;
  3437. spin_lock_irqsave(&q->lock, flags);
  3438. if (q->need_update == 0)
  3439. goto exit_unlock;
  3440. /* If power-saving is in use, make sure device is awake */
  3441. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3442. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3443. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3444. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3445. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3446. goto exit_unlock;
  3447. }
  3448. rc = iwl4965_grab_nic_access(priv);
  3449. if (rc)
  3450. goto exit_unlock;
  3451. /* Device expects a multiple of 8 */
  3452. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
  3453. q->write & ~0x7);
  3454. iwl4965_release_nic_access(priv);
  3455. /* Else device is assumed to be awake */
  3456. } else
  3457. /* Device expects a multiple of 8 */
  3458. iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3459. q->need_update = 0;
  3460. exit_unlock:
  3461. spin_unlock_irqrestore(&q->lock, flags);
  3462. return rc;
  3463. }
  3464. /**
  3465. * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  3466. */
  3467. static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl4965_priv *priv,
  3468. dma_addr_t dma_addr)
  3469. {
  3470. return cpu_to_le32((u32)(dma_addr >> 8));
  3471. }
  3472. /**
  3473. * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
  3474. *
  3475. * If there are slots in the RX queue that need to be restocked,
  3476. * and we have free pre-allocated buffers, fill the ranks as much
  3477. * as we can, pulling from rx_free.
  3478. *
  3479. * This moves the 'write' index forward to catch up with 'processed', and
  3480. * also updates the memory address in the firmware to reference the new
  3481. * target buffer.
  3482. */
  3483. static int iwl4965_rx_queue_restock(struct iwl4965_priv *priv)
  3484. {
  3485. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3486. struct list_head *element;
  3487. struct iwl4965_rx_mem_buffer *rxb;
  3488. unsigned long flags;
  3489. int write, rc;
  3490. spin_lock_irqsave(&rxq->lock, flags);
  3491. write = rxq->write & ~0x7;
  3492. while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3493. /* Get next free Rx buffer, remove from free list */
  3494. element = rxq->rx_free.next;
  3495. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3496. list_del(element);
  3497. /* Point to Rx buffer via next RBD in circular buffer */
  3498. rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3499. rxq->queue[rxq->write] = rxb;
  3500. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3501. rxq->free_count--;
  3502. }
  3503. spin_unlock_irqrestore(&rxq->lock, flags);
  3504. /* If the pre-allocated buffer pool is dropping low, schedule to
  3505. * refill it */
  3506. if (rxq->free_count <= RX_LOW_WATERMARK)
  3507. queue_work(priv->workqueue, &priv->rx_replenish);
  3508. /* If we've added more space for the firmware to place data, tell it.
  3509. * Increment device's write pointer in multiples of 8. */
  3510. if ((write != (rxq->write & ~0x7))
  3511. || (abs(rxq->write - rxq->read) > 7)) {
  3512. spin_lock_irqsave(&rxq->lock, flags);
  3513. rxq->need_update = 1;
  3514. spin_unlock_irqrestore(&rxq->lock, flags);
  3515. rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
  3516. if (rc)
  3517. return rc;
  3518. }
  3519. return 0;
  3520. }
  3521. /**
  3522. * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
  3523. *
  3524. * When moving to rx_free an SKB is allocated for the slot.
  3525. *
  3526. * Also restock the Rx queue via iwl4965_rx_queue_restock.
  3527. * This is called as a scheduled work item (except for during initialization)
  3528. */
  3529. static void iwl4965_rx_allocate(struct iwl4965_priv *priv)
  3530. {
  3531. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3532. struct list_head *element;
  3533. struct iwl4965_rx_mem_buffer *rxb;
  3534. unsigned long flags;
  3535. spin_lock_irqsave(&rxq->lock, flags);
  3536. while (!list_empty(&rxq->rx_used)) {
  3537. element = rxq->rx_used.next;
  3538. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3539. /* Alloc a new receive buffer */
  3540. rxb->skb =
  3541. alloc_skb(priv->hw_setting.rx_buf_size,
  3542. __GFP_NOWARN | GFP_ATOMIC);
  3543. if (!rxb->skb) {
  3544. if (net_ratelimit())
  3545. printk(KERN_CRIT DRV_NAME
  3546. ": Can not allocate SKB buffers\n");
  3547. /* We don't reschedule replenish work here -- we will
  3548. * call the restock method and if it still needs
  3549. * more buffers it will schedule replenish */
  3550. break;
  3551. }
  3552. priv->alloc_rxb_skb++;
  3553. list_del(element);
  3554. /* Get physical address of RB/SKB */
  3555. rxb->dma_addr =
  3556. pci_map_single(priv->pci_dev, rxb->skb->data,
  3557. priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
  3558. list_add_tail(&rxb->list, &rxq->rx_free);
  3559. rxq->free_count++;
  3560. }
  3561. spin_unlock_irqrestore(&rxq->lock, flags);
  3562. }
  3563. /*
  3564. * this should be called while priv->lock is locked
  3565. */
  3566. static void __iwl4965_rx_replenish(void *data)
  3567. {
  3568. struct iwl4965_priv *priv = data;
  3569. iwl4965_rx_allocate(priv);
  3570. iwl4965_rx_queue_restock(priv);
  3571. }
  3572. void iwl4965_rx_replenish(void *data)
  3573. {
  3574. struct iwl4965_priv *priv = data;
  3575. unsigned long flags;
  3576. iwl4965_rx_allocate(priv);
  3577. spin_lock_irqsave(&priv->lock, flags);
  3578. iwl4965_rx_queue_restock(priv);
  3579. spin_unlock_irqrestore(&priv->lock, flags);
  3580. }
  3581. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3582. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  3583. * This free routine walks the list of POOL entries and if SKB is set to
  3584. * non NULL it is unmapped and freed
  3585. */
  3586. static void iwl4965_rx_queue_free(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3587. {
  3588. int i;
  3589. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3590. if (rxq->pool[i].skb != NULL) {
  3591. pci_unmap_single(priv->pci_dev,
  3592. rxq->pool[i].dma_addr,
  3593. priv->hw_setting.rx_buf_size,
  3594. PCI_DMA_FROMDEVICE);
  3595. dev_kfree_skb(rxq->pool[i].skb);
  3596. }
  3597. }
  3598. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3599. rxq->dma_addr);
  3600. rxq->bd = NULL;
  3601. }
  3602. int iwl4965_rx_queue_alloc(struct iwl4965_priv *priv)
  3603. {
  3604. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3605. struct pci_dev *dev = priv->pci_dev;
  3606. int i;
  3607. spin_lock_init(&rxq->lock);
  3608. INIT_LIST_HEAD(&rxq->rx_free);
  3609. INIT_LIST_HEAD(&rxq->rx_used);
  3610. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  3611. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3612. if (!rxq->bd)
  3613. return -ENOMEM;
  3614. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3615. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3616. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3617. /* Set us so that we have processed and used all buffers, but have
  3618. * not restocked the Rx queue with fresh buffers */
  3619. rxq->read = rxq->write = 0;
  3620. rxq->free_count = 0;
  3621. rxq->need_update = 0;
  3622. return 0;
  3623. }
  3624. void iwl4965_rx_queue_reset(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3625. {
  3626. unsigned long flags;
  3627. int i;
  3628. spin_lock_irqsave(&rxq->lock, flags);
  3629. INIT_LIST_HEAD(&rxq->rx_free);
  3630. INIT_LIST_HEAD(&rxq->rx_used);
  3631. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3632. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3633. /* In the reset function, these buffers may have been allocated
  3634. * to an SKB, so we need to unmap and free potential storage */
  3635. if (rxq->pool[i].skb != NULL) {
  3636. pci_unmap_single(priv->pci_dev,
  3637. rxq->pool[i].dma_addr,
  3638. priv->hw_setting.rx_buf_size,
  3639. PCI_DMA_FROMDEVICE);
  3640. priv->alloc_rxb_skb--;
  3641. dev_kfree_skb(rxq->pool[i].skb);
  3642. rxq->pool[i].skb = NULL;
  3643. }
  3644. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3645. }
  3646. /* Set us so that we have processed and used all buffers, but have
  3647. * not restocked the Rx queue with fresh buffers */
  3648. rxq->read = rxq->write = 0;
  3649. rxq->free_count = 0;
  3650. spin_unlock_irqrestore(&rxq->lock, flags);
  3651. }
  3652. /* Convert linear signal-to-noise ratio into dB */
  3653. static u8 ratio2dB[100] = {
  3654. /* 0 1 2 3 4 5 6 7 8 9 */
  3655. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3656. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3657. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3658. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3659. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3660. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3661. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3662. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3663. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3664. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3665. };
  3666. /* Calculates a relative dB value from a ratio of linear
  3667. * (i.e. not dB) signal levels.
  3668. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3669. int iwl4965_calc_db_from_ratio(int sig_ratio)
  3670. {
  3671. /* 1000:1 or higher just report as 60 dB */
  3672. if (sig_ratio >= 1000)
  3673. return 60;
  3674. /* 100:1 or higher, divide by 10 and use table,
  3675. * add 20 dB to make up for divide by 10 */
  3676. if (sig_ratio >= 100)
  3677. return (20 + (int)ratio2dB[sig_ratio/10]);
  3678. /* We shouldn't see this */
  3679. if (sig_ratio < 1)
  3680. return 0;
  3681. /* Use table for ratios 1:1 - 99:1 */
  3682. return (int)ratio2dB[sig_ratio];
  3683. }
  3684. #define PERFECT_RSSI (-20) /* dBm */
  3685. #define WORST_RSSI (-95) /* dBm */
  3686. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3687. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3688. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3689. * about formulas used below. */
  3690. int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3691. {
  3692. int sig_qual;
  3693. int degradation = PERFECT_RSSI - rssi_dbm;
  3694. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3695. * as indicator; formula is (signal dbm - noise dbm).
  3696. * SNR at or above 40 is a great signal (100%).
  3697. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3698. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3699. if (noise_dbm) {
  3700. if (rssi_dbm - noise_dbm >= 40)
  3701. return 100;
  3702. else if (rssi_dbm < noise_dbm)
  3703. return 0;
  3704. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3705. /* Else use just the signal level.
  3706. * This formula is a least squares fit of data points collected and
  3707. * compared with a reference system that had a percentage (%) display
  3708. * for signal quality. */
  3709. } else
  3710. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3711. (15 * RSSI_RANGE + 62 * degradation)) /
  3712. (RSSI_RANGE * RSSI_RANGE);
  3713. if (sig_qual > 100)
  3714. sig_qual = 100;
  3715. else if (sig_qual < 1)
  3716. sig_qual = 0;
  3717. return sig_qual;
  3718. }
  3719. /**
  3720. * iwl4965_rx_handle - Main entry function for receiving responses from uCode
  3721. *
  3722. * Uses the priv->rx_handlers callback function array to invoke
  3723. * the appropriate handlers, including command responses,
  3724. * frame-received notifications, and other notifications.
  3725. */
  3726. static void iwl4965_rx_handle(struct iwl4965_priv *priv)
  3727. {
  3728. struct iwl4965_rx_mem_buffer *rxb;
  3729. struct iwl4965_rx_packet *pkt;
  3730. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3731. u32 r, i;
  3732. int reclaim;
  3733. unsigned long flags;
  3734. u8 fill_rx = 0;
  3735. u32 count = 8;
  3736. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  3737. * buffer that the driver may process (last buffer filled by ucode). */
  3738. r = iwl4965_hw_get_rx_read(priv);
  3739. i = rxq->read;
  3740. /* Rx interrupt, but nothing sent from uCode */
  3741. if (i == r)
  3742. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3743. if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  3744. fill_rx = 1;
  3745. while (i != r) {
  3746. rxb = rxq->queue[i];
  3747. /* If an RXB doesn't have a Rx queue slot associated with it,
  3748. * then a bug has been introduced in the queue refilling
  3749. * routines -- catch it here */
  3750. BUG_ON(rxb == NULL);
  3751. rxq->queue[i] = NULL;
  3752. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3753. priv->hw_setting.rx_buf_size,
  3754. PCI_DMA_FROMDEVICE);
  3755. pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3756. /* Reclaim a command buffer only if this packet is a response
  3757. * to a (driver-originated) command.
  3758. * If the packet (e.g. Rx frame) originated from uCode,
  3759. * there is no command buffer to reclaim.
  3760. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3761. * but apparently a few don't get set; catch them here. */
  3762. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3763. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3764. (pkt->hdr.cmd != REPLY_4965_RX) &&
  3765. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  3766. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3767. (pkt->hdr.cmd != REPLY_TX);
  3768. /* Based on type of command response or notification,
  3769. * handle those that need handling via function in
  3770. * rx_handlers table. See iwl4965_setup_rx_handlers() */
  3771. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3772. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3773. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3774. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3775. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3776. } else {
  3777. /* No handling needed */
  3778. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3779. "r %d i %d No handler needed for %s, 0x%02x\n",
  3780. r, i, get_cmd_string(pkt->hdr.cmd),
  3781. pkt->hdr.cmd);
  3782. }
  3783. if (reclaim) {
  3784. /* Invoke any callbacks, transfer the skb to caller, and
  3785. * fire off the (possibly) blocking iwl4965_send_cmd()
  3786. * as we reclaim the driver command queue */
  3787. if (rxb && rxb->skb)
  3788. iwl4965_tx_cmd_complete(priv, rxb);
  3789. else
  3790. IWL_WARNING("Claim null rxb?\n");
  3791. }
  3792. /* For now we just don't re-use anything. We can tweak this
  3793. * later to try and re-use notification packets and SKBs that
  3794. * fail to Rx correctly */
  3795. if (rxb->skb != NULL) {
  3796. priv->alloc_rxb_skb--;
  3797. dev_kfree_skb_any(rxb->skb);
  3798. rxb->skb = NULL;
  3799. }
  3800. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3801. priv->hw_setting.rx_buf_size,
  3802. PCI_DMA_FROMDEVICE);
  3803. spin_lock_irqsave(&rxq->lock, flags);
  3804. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3805. spin_unlock_irqrestore(&rxq->lock, flags);
  3806. i = (i + 1) & RX_QUEUE_MASK;
  3807. /* If there are a lot of unused frames,
  3808. * restock the Rx queue so ucode wont assert. */
  3809. if (fill_rx) {
  3810. count++;
  3811. if (count >= 8) {
  3812. priv->rxq.read = i;
  3813. __iwl4965_rx_replenish(priv);
  3814. count = 0;
  3815. }
  3816. }
  3817. }
  3818. /* Backtrack one entry */
  3819. priv->rxq.read = i;
  3820. iwl4965_rx_queue_restock(priv);
  3821. }
  3822. /**
  3823. * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
  3824. */
  3825. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  3826. struct iwl4965_tx_queue *txq)
  3827. {
  3828. u32 reg = 0;
  3829. int rc = 0;
  3830. int txq_id = txq->q.id;
  3831. if (txq->need_update == 0)
  3832. return rc;
  3833. /* if we're trying to save power */
  3834. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3835. /* wake up nic if it's powered down ...
  3836. * uCode will wake up, and interrupt us again, so next
  3837. * time we'll skip this part. */
  3838. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3839. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3840. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  3841. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3842. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3843. return rc;
  3844. }
  3845. /* restore this queue's parameters in nic hardware. */
  3846. rc = iwl4965_grab_nic_access(priv);
  3847. if (rc)
  3848. return rc;
  3849. iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
  3850. txq->q.write_ptr | (txq_id << 8));
  3851. iwl4965_release_nic_access(priv);
  3852. /* else not in power-save mode, uCode will never sleep when we're
  3853. * trying to tx (during RFKILL, we're not trying to tx). */
  3854. } else
  3855. iwl4965_write32(priv, HBUS_TARG_WRPTR,
  3856. txq->q.write_ptr | (txq_id << 8));
  3857. txq->need_update = 0;
  3858. return rc;
  3859. }
  3860. #ifdef CONFIG_IWL4965_DEBUG
  3861. static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
  3862. {
  3863. DECLARE_MAC_BUF(mac);
  3864. IWL_DEBUG_RADIO("RX CONFIG:\n");
  3865. iwl4965_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3866. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3867. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3868. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  3869. le32_to_cpu(rxon->filter_flags));
  3870. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3871. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3872. rxon->ofdm_basic_rates);
  3873. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3874. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  3875. print_mac(mac, rxon->node_addr));
  3876. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  3877. print_mac(mac, rxon->bssid_addr));
  3878. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3879. }
  3880. #endif
  3881. static void iwl4965_enable_interrupts(struct iwl4965_priv *priv)
  3882. {
  3883. IWL_DEBUG_ISR("Enabling interrupts\n");
  3884. set_bit(STATUS_INT_ENABLED, &priv->status);
  3885. iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  3886. }
  3887. static inline void iwl4965_disable_interrupts(struct iwl4965_priv *priv)
  3888. {
  3889. clear_bit(STATUS_INT_ENABLED, &priv->status);
  3890. /* disable interrupts from uCode/NIC to host */
  3891. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  3892. /* acknowledge/clear/reset any interrupts still pending
  3893. * from uCode or flow handler (Rx/Tx DMA) */
  3894. iwl4965_write32(priv, CSR_INT, 0xffffffff);
  3895. iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  3896. IWL_DEBUG_ISR("Disabled interrupts\n");
  3897. }
  3898. static const char *desc_lookup(int i)
  3899. {
  3900. switch (i) {
  3901. case 1:
  3902. return "FAIL";
  3903. case 2:
  3904. return "BAD_PARAM";
  3905. case 3:
  3906. return "BAD_CHECKSUM";
  3907. case 4:
  3908. return "NMI_INTERRUPT";
  3909. case 5:
  3910. return "SYSASSERT";
  3911. case 6:
  3912. return "FATAL_ERROR";
  3913. }
  3914. return "UNKNOWN";
  3915. }
  3916. #define ERROR_START_OFFSET (1 * sizeof(u32))
  3917. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  3918. static void iwl4965_dump_nic_error_log(struct iwl4965_priv *priv)
  3919. {
  3920. u32 data2, line;
  3921. u32 desc, time, count, base, data1;
  3922. u32 blink1, blink2, ilink1, ilink2;
  3923. int rc;
  3924. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  3925. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  3926. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  3927. return;
  3928. }
  3929. rc = iwl4965_grab_nic_access(priv);
  3930. if (rc) {
  3931. IWL_WARNING("Can not read from adapter at this time.\n");
  3932. return;
  3933. }
  3934. count = iwl4965_read_targ_mem(priv, base);
  3935. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  3936. IWL_ERROR("Start IWL Error Log Dump:\n");
  3937. IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
  3938. }
  3939. desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
  3940. blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
  3941. blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
  3942. ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
  3943. ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
  3944. data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
  3945. data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
  3946. line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
  3947. time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
  3948. IWL_ERROR("Desc Time "
  3949. "data1 data2 line\n");
  3950. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  3951. desc_lookup(desc), desc, time, data1, data2, line);
  3952. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  3953. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  3954. ilink1, ilink2);
  3955. iwl4965_release_nic_access(priv);
  3956. }
  3957. #define EVENT_START_OFFSET (4 * sizeof(u32))
  3958. /**
  3959. * iwl4965_print_event_log - Dump error event log to syslog
  3960. *
  3961. * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
  3962. */
  3963. static void iwl4965_print_event_log(struct iwl4965_priv *priv, u32 start_idx,
  3964. u32 num_events, u32 mode)
  3965. {
  3966. u32 i;
  3967. u32 base; /* SRAM byte address of event log header */
  3968. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  3969. u32 ptr; /* SRAM byte address of log data */
  3970. u32 ev, time, data; /* event log data */
  3971. if (num_events == 0)
  3972. return;
  3973. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3974. if (mode == 0)
  3975. event_size = 2 * sizeof(u32);
  3976. else
  3977. event_size = 3 * sizeof(u32);
  3978. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  3979. /* "time" is actually "data" for mode 0 (no timestamp).
  3980. * place event id # at far right for easier visual parsing. */
  3981. for (i = 0; i < num_events; i++) {
  3982. ev = iwl4965_read_targ_mem(priv, ptr);
  3983. ptr += sizeof(u32);
  3984. time = iwl4965_read_targ_mem(priv, ptr);
  3985. ptr += sizeof(u32);
  3986. if (mode == 0)
  3987. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  3988. else {
  3989. data = iwl4965_read_targ_mem(priv, ptr);
  3990. ptr += sizeof(u32);
  3991. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  3992. }
  3993. }
  3994. }
  3995. static void iwl4965_dump_nic_event_log(struct iwl4965_priv *priv)
  3996. {
  3997. int rc;
  3998. u32 base; /* SRAM byte address of event log header */
  3999. u32 capacity; /* event log capacity in # entries */
  4000. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  4001. u32 num_wraps; /* # times uCode wrapped to top of log */
  4002. u32 next_entry; /* index of next entry to be written by uCode */
  4003. u32 size; /* # entries that we'll print */
  4004. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4005. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  4006. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  4007. return;
  4008. }
  4009. rc = iwl4965_grab_nic_access(priv);
  4010. if (rc) {
  4011. IWL_WARNING("Can not read from adapter at this time.\n");
  4012. return;
  4013. }
  4014. /* event log header */
  4015. capacity = iwl4965_read_targ_mem(priv, base);
  4016. mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
  4017. num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
  4018. next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
  4019. size = num_wraps ? capacity : next_entry;
  4020. /* bail out if nothing in log */
  4021. if (size == 0) {
  4022. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  4023. iwl4965_release_nic_access(priv);
  4024. return;
  4025. }
  4026. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  4027. size, num_wraps);
  4028. /* if uCode has wrapped back to top of log, start at the oldest entry,
  4029. * i.e the next one that uCode would fill. */
  4030. if (num_wraps)
  4031. iwl4965_print_event_log(priv, next_entry,
  4032. capacity - next_entry, mode);
  4033. /* (then/else) start at top of log */
  4034. iwl4965_print_event_log(priv, 0, next_entry, mode);
  4035. iwl4965_release_nic_access(priv);
  4036. }
  4037. /**
  4038. * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
  4039. */
  4040. static void iwl4965_irq_handle_error(struct iwl4965_priv *priv)
  4041. {
  4042. /* Set the FW error flag -- cleared on iwl4965_down */
  4043. set_bit(STATUS_FW_ERROR, &priv->status);
  4044. /* Cancel currently queued command. */
  4045. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  4046. #ifdef CONFIG_IWL4965_DEBUG
  4047. if (iwl4965_debug_level & IWL_DL_FW_ERRORS) {
  4048. iwl4965_dump_nic_error_log(priv);
  4049. iwl4965_dump_nic_event_log(priv);
  4050. iwl4965_print_rx_config_cmd(&priv->staging_rxon);
  4051. }
  4052. #endif
  4053. wake_up_interruptible(&priv->wait_command_queue);
  4054. /* Keep the restart process from trying to send host
  4055. * commands by clearing the INIT status bit */
  4056. clear_bit(STATUS_READY, &priv->status);
  4057. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4058. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  4059. "Restarting adapter due to uCode error.\n");
  4060. if (iwl4965_is_associated(priv)) {
  4061. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  4062. sizeof(priv->recovery_rxon));
  4063. priv->error_recovering = 1;
  4064. }
  4065. queue_work(priv->workqueue, &priv->restart);
  4066. }
  4067. }
  4068. static void iwl4965_error_recovery(struct iwl4965_priv *priv)
  4069. {
  4070. unsigned long flags;
  4071. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  4072. sizeof(priv->staging_rxon));
  4073. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4074. iwl4965_commit_rxon(priv);
  4075. iwl4965_rxon_add_station(priv, priv->bssid, 1);
  4076. spin_lock_irqsave(&priv->lock, flags);
  4077. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  4078. priv->error_recovering = 0;
  4079. spin_unlock_irqrestore(&priv->lock, flags);
  4080. }
  4081. static void iwl4965_irq_tasklet(struct iwl4965_priv *priv)
  4082. {
  4083. u32 inta, handled = 0;
  4084. u32 inta_fh;
  4085. unsigned long flags;
  4086. #ifdef CONFIG_IWL4965_DEBUG
  4087. u32 inta_mask;
  4088. #endif
  4089. spin_lock_irqsave(&priv->lock, flags);
  4090. /* Ack/clear/reset pending uCode interrupts.
  4091. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  4092. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  4093. inta = iwl4965_read32(priv, CSR_INT);
  4094. iwl4965_write32(priv, CSR_INT, inta);
  4095. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  4096. * Any new interrupts that happen after this, either while we're
  4097. * in this tasklet, or later, will show up in next ISR/tasklet. */
  4098. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4099. iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  4100. #ifdef CONFIG_IWL4965_DEBUG
  4101. if (iwl4965_debug_level & IWL_DL_ISR) {
  4102. /* just for debug */
  4103. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4104. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4105. inta, inta_mask, inta_fh);
  4106. }
  4107. #endif
  4108. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  4109. * atomic, make sure that inta covers all the interrupts that
  4110. * we've discovered, even if FH interrupt came in just after
  4111. * reading CSR_INT. */
  4112. if (inta_fh & CSR49_FH_INT_RX_MASK)
  4113. inta |= CSR_INT_BIT_FH_RX;
  4114. if (inta_fh & CSR49_FH_INT_TX_MASK)
  4115. inta |= CSR_INT_BIT_FH_TX;
  4116. /* Now service all interrupt bits discovered above. */
  4117. if (inta & CSR_INT_BIT_HW_ERR) {
  4118. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  4119. /* Tell the device to stop sending interrupts */
  4120. iwl4965_disable_interrupts(priv);
  4121. iwl4965_irq_handle_error(priv);
  4122. handled |= CSR_INT_BIT_HW_ERR;
  4123. spin_unlock_irqrestore(&priv->lock, flags);
  4124. return;
  4125. }
  4126. #ifdef CONFIG_IWL4965_DEBUG
  4127. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4128. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  4129. if (inta & CSR_INT_BIT_SCD)
  4130. IWL_DEBUG_ISR("Scheduler finished to transmit "
  4131. "the frame/frames.\n");
  4132. /* Alive notification via Rx interrupt will do the real work */
  4133. if (inta & CSR_INT_BIT_ALIVE)
  4134. IWL_DEBUG_ISR("Alive interrupt\n");
  4135. }
  4136. #endif
  4137. /* Safely ignore these bits for debug checks below */
  4138. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  4139. /* HW RF KILL switch toggled */
  4140. if (inta & CSR_INT_BIT_RF_KILL) {
  4141. int hw_rf_kill = 0;
  4142. if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
  4143. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  4144. hw_rf_kill = 1;
  4145. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  4146. "RF_KILL bit toggled to %s.\n",
  4147. hw_rf_kill ? "disable radio":"enable radio");
  4148. /* Queue restart only if RF_KILL switch was set to "kill"
  4149. * when we loaded driver, and is now set to "enable".
  4150. * After we're Alive, RF_KILL gets handled by
  4151. * iwl4965_rx_card_state_notif() */
  4152. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
  4153. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4154. queue_work(priv->workqueue, &priv->restart);
  4155. }
  4156. handled |= CSR_INT_BIT_RF_KILL;
  4157. }
  4158. /* Chip got too hot and stopped itself */
  4159. if (inta & CSR_INT_BIT_CT_KILL) {
  4160. IWL_ERROR("Microcode CT kill error detected.\n");
  4161. handled |= CSR_INT_BIT_CT_KILL;
  4162. }
  4163. /* Error detected by uCode */
  4164. if (inta & CSR_INT_BIT_SW_ERR) {
  4165. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  4166. inta);
  4167. iwl4965_irq_handle_error(priv);
  4168. handled |= CSR_INT_BIT_SW_ERR;
  4169. }
  4170. /* uCode wakes up after power-down sleep */
  4171. if (inta & CSR_INT_BIT_WAKEUP) {
  4172. IWL_DEBUG_ISR("Wakeup interrupt\n");
  4173. iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
  4174. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  4175. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  4176. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  4177. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  4178. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  4179. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  4180. handled |= CSR_INT_BIT_WAKEUP;
  4181. }
  4182. /* All uCode command responses, including Tx command responses,
  4183. * Rx "responses" (frame-received notification), and other
  4184. * notifications from uCode come through here*/
  4185. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  4186. iwl4965_rx_handle(priv);
  4187. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  4188. }
  4189. if (inta & CSR_INT_BIT_FH_TX) {
  4190. IWL_DEBUG_ISR("Tx interrupt\n");
  4191. handled |= CSR_INT_BIT_FH_TX;
  4192. }
  4193. if (inta & ~handled)
  4194. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  4195. if (inta & ~CSR_INI_SET_MASK) {
  4196. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  4197. inta & ~CSR_INI_SET_MASK);
  4198. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  4199. }
  4200. /* Re-enable all interrupts */
  4201. iwl4965_enable_interrupts(priv);
  4202. #ifdef CONFIG_IWL4965_DEBUG
  4203. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4204. inta = iwl4965_read32(priv, CSR_INT);
  4205. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4206. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4207. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  4208. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  4209. }
  4210. #endif
  4211. spin_unlock_irqrestore(&priv->lock, flags);
  4212. }
  4213. static irqreturn_t iwl4965_isr(int irq, void *data)
  4214. {
  4215. struct iwl4965_priv *priv = data;
  4216. u32 inta, inta_mask;
  4217. u32 inta_fh;
  4218. if (!priv)
  4219. return IRQ_NONE;
  4220. spin_lock(&priv->lock);
  4221. /* Disable (but don't clear!) interrupts here to avoid
  4222. * back-to-back ISRs and sporadic interrupts from our NIC.
  4223. * If we have something to service, the tasklet will re-enable ints.
  4224. * If we *don't* have something, we'll re-enable before leaving here. */
  4225. inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
  4226. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  4227. /* Discover which interrupts are active/pending */
  4228. inta = iwl4965_read32(priv, CSR_INT);
  4229. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4230. /* Ignore interrupt if there's nothing in NIC to service.
  4231. * This may be due to IRQ shared with another device,
  4232. * or due to sporadic interrupts thrown from our NIC. */
  4233. if (!inta && !inta_fh) {
  4234. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4235. goto none;
  4236. }
  4237. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  4238. /* Hardware disappeared. It might have already raised
  4239. * an interrupt */
  4240. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  4241. goto unplugged;
  4242. }
  4243. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4244. inta, inta_mask, inta_fh);
  4245. inta &= ~CSR_INT_BIT_SCD;
  4246. /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
  4247. if (likely(inta || inta_fh))
  4248. tasklet_schedule(&priv->irq_tasklet);
  4249. unplugged:
  4250. spin_unlock(&priv->lock);
  4251. return IRQ_HANDLED;
  4252. none:
  4253. /* re-enable interrupts here since we don't have anything to service. */
  4254. iwl4965_enable_interrupts(priv);
  4255. spin_unlock(&priv->lock);
  4256. return IRQ_NONE;
  4257. }
  4258. /************************** EEPROM BANDS ****************************
  4259. *
  4260. * The iwl4965_eeprom_band definitions below provide the mapping from the
  4261. * EEPROM contents to the specific channel number supported for each
  4262. * band.
  4263. *
  4264. * For example, iwl4965_priv->eeprom.band_3_channels[4] from the band_3
  4265. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  4266. * The specific geography and calibration information for that channel
  4267. * is contained in the eeprom map itself.
  4268. *
  4269. * During init, we copy the eeprom information and channel map
  4270. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  4271. *
  4272. * channel_map_24/52 provides the index in the channel_info array for a
  4273. * given channel. We have to have two separate maps as there is channel
  4274. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  4275. * band_2
  4276. *
  4277. * A value of 0xff stored in the channel_map indicates that the channel
  4278. * is not supported by the hardware at all.
  4279. *
  4280. * A value of 0xfe in the channel_map indicates that the channel is not
  4281. * valid for Tx with the current hardware. This means that
  4282. * while the system can tune and receive on a given channel, it may not
  4283. * be able to associate or transmit any frames on that
  4284. * channel. There is no corresponding channel information for that
  4285. * entry.
  4286. *
  4287. *********************************************************************/
  4288. /* 2.4 GHz */
  4289. static const u8 iwl4965_eeprom_band_1[14] = {
  4290. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  4291. };
  4292. /* 5.2 GHz bands */
  4293. static const u8 iwl4965_eeprom_band_2[] = { /* 4915-5080MHz */
  4294. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  4295. };
  4296. static const u8 iwl4965_eeprom_band_3[] = { /* 5170-5320MHz */
  4297. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  4298. };
  4299. static const u8 iwl4965_eeprom_band_4[] = { /* 5500-5700MHz */
  4300. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  4301. };
  4302. static const u8 iwl4965_eeprom_band_5[] = { /* 5725-5825MHz */
  4303. 145, 149, 153, 157, 161, 165
  4304. };
  4305. static u8 iwl4965_eeprom_band_6[] = { /* 2.4 FAT channel */
  4306. 1, 2, 3, 4, 5, 6, 7
  4307. };
  4308. static u8 iwl4965_eeprom_band_7[] = { /* 5.2 FAT channel */
  4309. 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
  4310. };
  4311. static void iwl4965_init_band_reference(const struct iwl4965_priv *priv,
  4312. int band,
  4313. int *eeprom_ch_count,
  4314. const struct iwl4965_eeprom_channel
  4315. **eeprom_ch_info,
  4316. const u8 **eeprom_ch_index)
  4317. {
  4318. switch (band) {
  4319. case 1: /* 2.4GHz band */
  4320. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_1);
  4321. *eeprom_ch_info = priv->eeprom.band_1_channels;
  4322. *eeprom_ch_index = iwl4965_eeprom_band_1;
  4323. break;
  4324. case 2: /* 4.9GHz band */
  4325. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_2);
  4326. *eeprom_ch_info = priv->eeprom.band_2_channels;
  4327. *eeprom_ch_index = iwl4965_eeprom_band_2;
  4328. break;
  4329. case 3: /* 5.2GHz band */
  4330. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_3);
  4331. *eeprom_ch_info = priv->eeprom.band_3_channels;
  4332. *eeprom_ch_index = iwl4965_eeprom_band_3;
  4333. break;
  4334. case 4: /* 5.5GHz band */
  4335. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_4);
  4336. *eeprom_ch_info = priv->eeprom.band_4_channels;
  4337. *eeprom_ch_index = iwl4965_eeprom_band_4;
  4338. break;
  4339. case 5: /* 5.7GHz band */
  4340. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_5);
  4341. *eeprom_ch_info = priv->eeprom.band_5_channels;
  4342. *eeprom_ch_index = iwl4965_eeprom_band_5;
  4343. break;
  4344. case 6: /* 2.4GHz FAT channels */
  4345. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_6);
  4346. *eeprom_ch_info = priv->eeprom.band_24_channels;
  4347. *eeprom_ch_index = iwl4965_eeprom_band_6;
  4348. break;
  4349. case 7: /* 5 GHz FAT channels */
  4350. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_7);
  4351. *eeprom_ch_info = priv->eeprom.band_52_channels;
  4352. *eeprom_ch_index = iwl4965_eeprom_band_7;
  4353. break;
  4354. default:
  4355. BUG();
  4356. return;
  4357. }
  4358. }
  4359. /**
  4360. * iwl4965_get_channel_info - Find driver's private channel info
  4361. *
  4362. * Based on band and channel number.
  4363. */
  4364. const struct iwl4965_channel_info *iwl4965_get_channel_info(const struct iwl4965_priv *priv,
  4365. enum ieee80211_band band, u16 channel)
  4366. {
  4367. int i;
  4368. switch (band) {
  4369. case IEEE80211_BAND_5GHZ:
  4370. for (i = 14; i < priv->channel_count; i++) {
  4371. if (priv->channel_info[i].channel == channel)
  4372. return &priv->channel_info[i];
  4373. }
  4374. break;
  4375. case IEEE80211_BAND_2GHZ:
  4376. if (channel >= 1 && channel <= 14)
  4377. return &priv->channel_info[channel - 1];
  4378. break;
  4379. default:
  4380. BUG();
  4381. }
  4382. return NULL;
  4383. }
  4384. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  4385. ? # x " " : "")
  4386. /**
  4387. * iwl4965_init_channel_map - Set up driver's info for all possible channels
  4388. */
  4389. static int iwl4965_init_channel_map(struct iwl4965_priv *priv)
  4390. {
  4391. int eeprom_ch_count = 0;
  4392. const u8 *eeprom_ch_index = NULL;
  4393. const struct iwl4965_eeprom_channel *eeprom_ch_info = NULL;
  4394. int band, ch;
  4395. struct iwl4965_channel_info *ch_info;
  4396. if (priv->channel_count) {
  4397. IWL_DEBUG_INFO("Channel map already initialized.\n");
  4398. return 0;
  4399. }
  4400. if (priv->eeprom.version < 0x2f) {
  4401. IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
  4402. priv->eeprom.version);
  4403. return -EINVAL;
  4404. }
  4405. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  4406. priv->channel_count =
  4407. ARRAY_SIZE(iwl4965_eeprom_band_1) +
  4408. ARRAY_SIZE(iwl4965_eeprom_band_2) +
  4409. ARRAY_SIZE(iwl4965_eeprom_band_3) +
  4410. ARRAY_SIZE(iwl4965_eeprom_band_4) +
  4411. ARRAY_SIZE(iwl4965_eeprom_band_5);
  4412. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  4413. priv->channel_info = kzalloc(sizeof(struct iwl4965_channel_info) *
  4414. priv->channel_count, GFP_KERNEL);
  4415. if (!priv->channel_info) {
  4416. IWL_ERROR("Could not allocate channel_info\n");
  4417. priv->channel_count = 0;
  4418. return -ENOMEM;
  4419. }
  4420. ch_info = priv->channel_info;
  4421. /* Loop through the 5 EEPROM bands adding them in order to the
  4422. * channel map we maintain (that contains additional information than
  4423. * what just in the EEPROM) */
  4424. for (band = 1; band <= 5; band++) {
  4425. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4426. &eeprom_ch_info, &eeprom_ch_index);
  4427. /* Loop through each band adding each of the channels */
  4428. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4429. ch_info->channel = eeprom_ch_index[ch];
  4430. ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
  4431. IEEE80211_BAND_5GHZ;
  4432. /* permanently store EEPROM's channel regulatory flags
  4433. * and max power in channel info database. */
  4434. ch_info->eeprom = eeprom_ch_info[ch];
  4435. /* Copy the run-time flags so they are there even on
  4436. * invalid channels */
  4437. ch_info->flags = eeprom_ch_info[ch].flags;
  4438. if (!(is_channel_valid(ch_info))) {
  4439. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  4440. "No traffic\n",
  4441. ch_info->channel,
  4442. ch_info->flags,
  4443. is_channel_a_band(ch_info) ?
  4444. "5.2" : "2.4");
  4445. ch_info++;
  4446. continue;
  4447. }
  4448. /* Initialize regulatory-based run-time data */
  4449. ch_info->max_power_avg = ch_info->curr_txpow =
  4450. eeprom_ch_info[ch].max_power_avg;
  4451. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  4452. ch_info->min_power = 0;
  4453. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s%s(0x%02x"
  4454. " %ddBm): Ad-Hoc %ssupported\n",
  4455. ch_info->channel,
  4456. is_channel_a_band(ch_info) ?
  4457. "5.2" : "2.4",
  4458. CHECK_AND_PRINT(VALID),
  4459. CHECK_AND_PRINT(IBSS),
  4460. CHECK_AND_PRINT(ACTIVE),
  4461. CHECK_AND_PRINT(RADAR),
  4462. CHECK_AND_PRINT(WIDE),
  4463. CHECK_AND_PRINT(NARROW),
  4464. CHECK_AND_PRINT(DFS),
  4465. eeprom_ch_info[ch].flags,
  4466. eeprom_ch_info[ch].max_power_avg,
  4467. ((eeprom_ch_info[ch].
  4468. flags & EEPROM_CHANNEL_IBSS)
  4469. && !(eeprom_ch_info[ch].
  4470. flags & EEPROM_CHANNEL_RADAR))
  4471. ? "" : "not ");
  4472. /* Set the user_txpower_limit to the highest power
  4473. * supported by any channel */
  4474. if (eeprom_ch_info[ch].max_power_avg >
  4475. priv->user_txpower_limit)
  4476. priv->user_txpower_limit =
  4477. eeprom_ch_info[ch].max_power_avg;
  4478. ch_info++;
  4479. }
  4480. }
  4481. /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
  4482. for (band = 6; band <= 7; band++) {
  4483. enum ieee80211_band ieeeband;
  4484. u8 fat_extension_chan;
  4485. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4486. &eeprom_ch_info, &eeprom_ch_index);
  4487. /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
  4488. ieeeband = (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  4489. /* Loop through each band adding each of the channels */
  4490. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4491. if ((band == 6) &&
  4492. ((eeprom_ch_index[ch] == 5) ||
  4493. (eeprom_ch_index[ch] == 6) ||
  4494. (eeprom_ch_index[ch] == 7)))
  4495. fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
  4496. else
  4497. fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
  4498. /* Set up driver's info for lower half */
  4499. iwl4965_set_fat_chan_info(priv, ieeeband,
  4500. eeprom_ch_index[ch],
  4501. &(eeprom_ch_info[ch]),
  4502. fat_extension_chan);
  4503. /* Set up driver's info for upper half */
  4504. iwl4965_set_fat_chan_info(priv, ieeeband,
  4505. (eeprom_ch_index[ch] + 4),
  4506. &(eeprom_ch_info[ch]),
  4507. HT_IE_EXT_CHANNEL_BELOW);
  4508. }
  4509. }
  4510. return 0;
  4511. }
  4512. /*
  4513. * iwl4965_free_channel_map - undo allocations in iwl4965_init_channel_map
  4514. */
  4515. static void iwl4965_free_channel_map(struct iwl4965_priv *priv)
  4516. {
  4517. kfree(priv->channel_info);
  4518. priv->channel_count = 0;
  4519. }
  4520. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  4521. * sending probe req. This should be set long enough to hear probe responses
  4522. * from more than one AP. */
  4523. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  4524. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  4525. /* For faster active scanning, scan will move to the next channel if fewer than
  4526. * PLCP_QUIET_THRESH packets are heard on this channel within
  4527. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  4528. * time if it's a quiet channel (nothing responded to our probe, and there's
  4529. * no other traffic).
  4530. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  4531. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  4532. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  4533. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  4534. * Must be set longer than active dwell time.
  4535. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  4536. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  4537. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  4538. #define IWL_PASSIVE_DWELL_BASE (100)
  4539. #define IWL_CHANNEL_TUNE_TIME 5
  4540. static inline u16 iwl4965_get_active_dwell_time(struct iwl4965_priv *priv,
  4541. enum ieee80211_band band)
  4542. {
  4543. if (band == IEEE80211_BAND_5GHZ)
  4544. return IWL_ACTIVE_DWELL_TIME_52;
  4545. else
  4546. return IWL_ACTIVE_DWELL_TIME_24;
  4547. }
  4548. static u16 iwl4965_get_passive_dwell_time(struct iwl4965_priv *priv,
  4549. enum ieee80211_band band)
  4550. {
  4551. u16 active = iwl4965_get_active_dwell_time(priv, band);
  4552. u16 passive = (band != IEEE80211_BAND_5GHZ) ?
  4553. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  4554. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  4555. if (iwl4965_is_associated(priv)) {
  4556. /* If we're associated, we clamp the maximum passive
  4557. * dwell time to be 98% of the beacon interval (minus
  4558. * 2 * channel tune time) */
  4559. passive = priv->beacon_int;
  4560. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  4561. passive = IWL_PASSIVE_DWELL_BASE;
  4562. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4563. }
  4564. if (passive <= active)
  4565. passive = active + 1;
  4566. return passive;
  4567. }
  4568. static int iwl4965_get_channels_for_scan(struct iwl4965_priv *priv,
  4569. enum ieee80211_band band,
  4570. u8 is_active, u8 direct_mask,
  4571. struct iwl4965_scan_channel *scan_ch)
  4572. {
  4573. const struct ieee80211_channel *channels = NULL;
  4574. const struct ieee80211_supported_band *sband;
  4575. const struct iwl4965_channel_info *ch_info;
  4576. u16 passive_dwell = 0;
  4577. u16 active_dwell = 0;
  4578. int added, i;
  4579. sband = iwl4965_get_hw_mode(priv, band);
  4580. if (!sband)
  4581. return 0;
  4582. channels = sband->channels;
  4583. active_dwell = iwl4965_get_active_dwell_time(priv, band);
  4584. passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
  4585. for (i = 0, added = 0; i < sband->n_channels; i++) {
  4586. if (ieee80211_frequency_to_channel(channels[i].center_freq) ==
  4587. le16_to_cpu(priv->active_rxon.channel)) {
  4588. if (iwl4965_is_associated(priv)) {
  4589. IWL_DEBUG_SCAN
  4590. ("Skipping current channel %d\n",
  4591. le16_to_cpu(priv->active_rxon.channel));
  4592. continue;
  4593. }
  4594. } else if (priv->only_active_channel)
  4595. continue;
  4596. scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
  4597. ch_info = iwl4965_get_channel_info(priv, band,
  4598. scan_ch->channel);
  4599. if (!is_channel_valid(ch_info)) {
  4600. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4601. scan_ch->channel);
  4602. continue;
  4603. }
  4604. if (!is_active || is_channel_passive(ch_info) ||
  4605. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
  4606. scan_ch->type = 0; /* passive */
  4607. else
  4608. scan_ch->type = 1; /* active */
  4609. if (scan_ch->type & 1)
  4610. scan_ch->type |= (direct_mask << 1);
  4611. if (is_channel_narrow(ch_info))
  4612. scan_ch->type |= (1 << 7);
  4613. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4614. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4615. /* Set txpower levels to defaults */
  4616. scan_ch->tpc.dsp_atten = 110;
  4617. /* scan_pwr_info->tpc.dsp_atten; */
  4618. /*scan_pwr_info->tpc.tx_gain; */
  4619. if (band == IEEE80211_BAND_5GHZ)
  4620. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4621. else {
  4622. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4623. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4624. * power level:
  4625. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  4626. */
  4627. }
  4628. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4629. scan_ch->channel,
  4630. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4631. (scan_ch->type & 1) ?
  4632. active_dwell : passive_dwell);
  4633. scan_ch++;
  4634. added++;
  4635. }
  4636. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4637. return added;
  4638. }
  4639. static void iwl4965_init_hw_rates(struct iwl4965_priv *priv,
  4640. struct ieee80211_rate *rates)
  4641. {
  4642. int i;
  4643. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4644. rates[i].bitrate = iwl4965_rates[i].ieee * 5;
  4645. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  4646. rates[i].hw_value_short = i;
  4647. rates[i].flags = 0;
  4648. if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  4649. /*
  4650. * If CCK != 1M then set short preamble rate flag.
  4651. */
  4652. rates[i].flags |= (iwl4965_rates[i].plcp == 10) ?
  4653. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  4654. }
  4655. }
  4656. }
  4657. /**
  4658. * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4659. */
  4660. static int iwl4965_init_geos(struct iwl4965_priv *priv)
  4661. {
  4662. struct iwl4965_channel_info *ch;
  4663. struct ieee80211_supported_band *sband;
  4664. struct ieee80211_channel *channels;
  4665. struct ieee80211_channel *geo_ch;
  4666. struct ieee80211_rate *rates;
  4667. int i = 0;
  4668. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  4669. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  4670. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4671. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4672. return 0;
  4673. }
  4674. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4675. priv->channel_count, GFP_KERNEL);
  4676. if (!channels)
  4677. return -ENOMEM;
  4678. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
  4679. GFP_KERNEL);
  4680. if (!rates) {
  4681. kfree(channels);
  4682. return -ENOMEM;
  4683. }
  4684. /* 5.2GHz channels start after the 2.4GHz channels */
  4685. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4686. sband->channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
  4687. /* just OFDM */
  4688. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  4689. sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
  4690. iwl4965_init_ht_hw_capab(&sband->ht_info, IEEE80211_BAND_5GHZ);
  4691. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4692. sband->channels = channels;
  4693. /* OFDM & CCK */
  4694. sband->bitrates = rates;
  4695. sband->n_bitrates = IWL_RATE_COUNT;
  4696. iwl4965_init_ht_hw_capab(&sband->ht_info, IEEE80211_BAND_2GHZ);
  4697. priv->ieee_channels = channels;
  4698. priv->ieee_rates = rates;
  4699. iwl4965_init_hw_rates(priv, rates);
  4700. for (i = 0; i < priv->channel_count; i++) {
  4701. ch = &priv->channel_info[i];
  4702. /* FIXME: might be removed if scan is OK */
  4703. if (!is_channel_valid(ch))
  4704. continue;
  4705. if (is_channel_a_band(ch))
  4706. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4707. else
  4708. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4709. geo_ch = &sband->channels[sband->n_channels++];
  4710. geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
  4711. geo_ch->max_power = ch->max_power_avg;
  4712. geo_ch->max_antenna_gain = 0xff;
  4713. geo_ch->hw_value = ch->channel;
  4714. if (is_channel_valid(ch)) {
  4715. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  4716. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  4717. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  4718. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  4719. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4720. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  4721. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4722. priv->max_channel_txpower_limit =
  4723. ch->max_power_avg;
  4724. } else {
  4725. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  4726. }
  4727. /* Save flags for reg domain usage */
  4728. geo_ch->orig_flags = geo_ch->flags;
  4729. IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
  4730. ch->channel, geo_ch->center_freq,
  4731. is_channel_a_band(ch) ? "5.2" : "2.4",
  4732. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  4733. "restricted" : "valid",
  4734. geo_ch->flags);
  4735. }
  4736. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  4737. priv->cfg->sku & IWL_SKU_A) {
  4738. printk(KERN_INFO DRV_NAME
  4739. ": Incorrectly detected BG card as ABG. Please send "
  4740. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4741. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4742. priv->cfg->sku &= ~IWL_SKU_A;
  4743. }
  4744. printk(KERN_INFO DRV_NAME
  4745. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4746. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  4747. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  4748. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->bands[IEEE80211_BAND_2GHZ];
  4749. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->bands[IEEE80211_BAND_5GHZ];
  4750. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4751. return 0;
  4752. }
  4753. /*
  4754. * iwl4965_free_geos - undo allocations in iwl4965_init_geos
  4755. */
  4756. static void iwl4965_free_geos(struct iwl4965_priv *priv)
  4757. {
  4758. kfree(priv->ieee_channels);
  4759. kfree(priv->ieee_rates);
  4760. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4761. }
  4762. /******************************************************************************
  4763. *
  4764. * uCode download functions
  4765. *
  4766. ******************************************************************************/
  4767. static void iwl4965_dealloc_ucode_pci(struct iwl4965_priv *priv)
  4768. {
  4769. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  4770. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  4771. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4772. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  4773. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4774. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4775. }
  4776. /**
  4777. * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
  4778. * looking at all data.
  4779. */
  4780. static int iwl4965_verify_inst_full(struct iwl4965_priv *priv, __le32 *image,
  4781. u32 len)
  4782. {
  4783. u32 val;
  4784. u32 save_len = len;
  4785. int rc = 0;
  4786. u32 errcnt;
  4787. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4788. rc = iwl4965_grab_nic_access(priv);
  4789. if (rc)
  4790. return rc;
  4791. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  4792. errcnt = 0;
  4793. for (; len > 0; len -= sizeof(u32), image++) {
  4794. /* read data comes through single port, auto-incr addr */
  4795. /* NOTE: Use the debugless read so we don't flood kernel log
  4796. * if IWL_DL_IO is set */
  4797. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4798. if (val != le32_to_cpu(*image)) {
  4799. IWL_ERROR("uCode INST section is invalid at "
  4800. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4801. save_len - len, val, le32_to_cpu(*image));
  4802. rc = -EIO;
  4803. errcnt++;
  4804. if (errcnt >= 20)
  4805. break;
  4806. }
  4807. }
  4808. iwl4965_release_nic_access(priv);
  4809. if (!errcnt)
  4810. IWL_DEBUG_INFO
  4811. ("ucode image in INSTRUCTION memory is good\n");
  4812. return rc;
  4813. }
  4814. /**
  4815. * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
  4816. * using sample data 100 bytes apart. If these sample points are good,
  4817. * it's a pretty good bet that everything between them is good, too.
  4818. */
  4819. static int iwl4965_verify_inst_sparse(struct iwl4965_priv *priv, __le32 *image, u32 len)
  4820. {
  4821. u32 val;
  4822. int rc = 0;
  4823. u32 errcnt = 0;
  4824. u32 i;
  4825. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4826. rc = iwl4965_grab_nic_access(priv);
  4827. if (rc)
  4828. return rc;
  4829. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  4830. /* read data comes through single port, auto-incr addr */
  4831. /* NOTE: Use the debugless read so we don't flood kernel log
  4832. * if IWL_DL_IO is set */
  4833. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  4834. i + RTC_INST_LOWER_BOUND);
  4835. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4836. if (val != le32_to_cpu(*image)) {
  4837. #if 0 /* Enable this if you want to see details */
  4838. IWL_ERROR("uCode INST section is invalid at "
  4839. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4840. i, val, *image);
  4841. #endif
  4842. rc = -EIO;
  4843. errcnt++;
  4844. if (errcnt >= 3)
  4845. break;
  4846. }
  4847. }
  4848. iwl4965_release_nic_access(priv);
  4849. return rc;
  4850. }
  4851. /**
  4852. * iwl4965_verify_ucode - determine which instruction image is in SRAM,
  4853. * and verify its contents
  4854. */
  4855. static int iwl4965_verify_ucode(struct iwl4965_priv *priv)
  4856. {
  4857. __le32 *image;
  4858. u32 len;
  4859. int rc = 0;
  4860. /* Try bootstrap */
  4861. image = (__le32 *)priv->ucode_boot.v_addr;
  4862. len = priv->ucode_boot.len;
  4863. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4864. if (rc == 0) {
  4865. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  4866. return 0;
  4867. }
  4868. /* Try initialize */
  4869. image = (__le32 *)priv->ucode_init.v_addr;
  4870. len = priv->ucode_init.len;
  4871. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4872. if (rc == 0) {
  4873. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  4874. return 0;
  4875. }
  4876. /* Try runtime/protocol */
  4877. image = (__le32 *)priv->ucode_code.v_addr;
  4878. len = priv->ucode_code.len;
  4879. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4880. if (rc == 0) {
  4881. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  4882. return 0;
  4883. }
  4884. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  4885. /* Since nothing seems to match, show first several data entries in
  4886. * instruction SRAM, so maybe visual inspection will give a clue.
  4887. * Selection of bootstrap image (vs. other images) is arbitrary. */
  4888. image = (__le32 *)priv->ucode_boot.v_addr;
  4889. len = priv->ucode_boot.len;
  4890. rc = iwl4965_verify_inst_full(priv, image, len);
  4891. return rc;
  4892. }
  4893. /* check contents of special bootstrap uCode SRAM */
  4894. static int iwl4965_verify_bsm(struct iwl4965_priv *priv)
  4895. {
  4896. __le32 *image = priv->ucode_boot.v_addr;
  4897. u32 len = priv->ucode_boot.len;
  4898. u32 reg;
  4899. u32 val;
  4900. IWL_DEBUG_INFO("Begin verify bsm\n");
  4901. /* verify BSM SRAM contents */
  4902. val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
  4903. for (reg = BSM_SRAM_LOWER_BOUND;
  4904. reg < BSM_SRAM_LOWER_BOUND + len;
  4905. reg += sizeof(u32), image ++) {
  4906. val = iwl4965_read_prph(priv, reg);
  4907. if (val != le32_to_cpu(*image)) {
  4908. IWL_ERROR("BSM uCode verification failed at "
  4909. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  4910. BSM_SRAM_LOWER_BOUND,
  4911. reg - BSM_SRAM_LOWER_BOUND, len,
  4912. val, le32_to_cpu(*image));
  4913. return -EIO;
  4914. }
  4915. }
  4916. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  4917. return 0;
  4918. }
  4919. /**
  4920. * iwl4965_load_bsm - Load bootstrap instructions
  4921. *
  4922. * BSM operation:
  4923. *
  4924. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  4925. * in special SRAM that does not power down during RFKILL. When powering back
  4926. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  4927. * the bootstrap program into the on-board processor, and starts it.
  4928. *
  4929. * The bootstrap program loads (via DMA) instructions and data for a new
  4930. * program from host DRAM locations indicated by the host driver in the
  4931. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  4932. * automatically.
  4933. *
  4934. * When initializing the NIC, the host driver points the BSM to the
  4935. * "initialize" uCode image. This uCode sets up some internal data, then
  4936. * notifies host via "initialize alive" that it is complete.
  4937. *
  4938. * The host then replaces the BSM_DRAM_* pointer values to point to the
  4939. * normal runtime uCode instructions and a backup uCode data cache buffer
  4940. * (filled initially with starting data values for the on-board processor),
  4941. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  4942. * which begins normal operation.
  4943. *
  4944. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  4945. * the backup data cache in DRAM before SRAM is powered down.
  4946. *
  4947. * When powering back up, the BSM loads the bootstrap program. This reloads
  4948. * the runtime uCode instructions and the backup data cache into SRAM,
  4949. * and re-launches the runtime uCode from where it left off.
  4950. */
  4951. static int iwl4965_load_bsm(struct iwl4965_priv *priv)
  4952. {
  4953. __le32 *image = priv->ucode_boot.v_addr;
  4954. u32 len = priv->ucode_boot.len;
  4955. dma_addr_t pinst;
  4956. dma_addr_t pdata;
  4957. u32 inst_len;
  4958. u32 data_len;
  4959. int rc;
  4960. int i;
  4961. u32 done;
  4962. u32 reg_offset;
  4963. IWL_DEBUG_INFO("Begin load bsm\n");
  4964. /* make sure bootstrap program is no larger than BSM's SRAM size */
  4965. if (len > IWL_MAX_BSM_SIZE)
  4966. return -EINVAL;
  4967. /* Tell bootstrap uCode where to find the "Initialize" uCode
  4968. * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
  4969. * NOTE: iwl4965_initialize_alive_start() will replace these values,
  4970. * after the "initialize" uCode has run, to point to
  4971. * runtime/protocol instructions and backup data cache. */
  4972. pinst = priv->ucode_init.p_addr >> 4;
  4973. pdata = priv->ucode_init_data.p_addr >> 4;
  4974. inst_len = priv->ucode_init.len;
  4975. data_len = priv->ucode_init_data.len;
  4976. rc = iwl4965_grab_nic_access(priv);
  4977. if (rc)
  4978. return rc;
  4979. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  4980. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  4981. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  4982. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  4983. /* Fill BSM memory with bootstrap instructions */
  4984. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  4985. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  4986. reg_offset += sizeof(u32), image++)
  4987. _iwl4965_write_prph(priv, reg_offset,
  4988. le32_to_cpu(*image));
  4989. rc = iwl4965_verify_bsm(priv);
  4990. if (rc) {
  4991. iwl4965_release_nic_access(priv);
  4992. return rc;
  4993. }
  4994. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  4995. iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
  4996. iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
  4997. RTC_INST_LOWER_BOUND);
  4998. iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  4999. /* Load bootstrap code into instruction SRAM now,
  5000. * to prepare to load "initialize" uCode */
  5001. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  5002. BSM_WR_CTRL_REG_BIT_START);
  5003. /* Wait for load of bootstrap uCode to finish */
  5004. for (i = 0; i < 100; i++) {
  5005. done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
  5006. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  5007. break;
  5008. udelay(10);
  5009. }
  5010. if (i < 100)
  5011. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  5012. else {
  5013. IWL_ERROR("BSM write did not complete!\n");
  5014. return -EIO;
  5015. }
  5016. /* Enable future boot loads whenever power management unit triggers it
  5017. * (e.g. when powering back up after power-save shutdown) */
  5018. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  5019. BSM_WR_CTRL_REG_BIT_START_EN);
  5020. iwl4965_release_nic_access(priv);
  5021. return 0;
  5022. }
  5023. static void iwl4965_nic_start(struct iwl4965_priv *priv)
  5024. {
  5025. /* Remove all resets to allow NIC to operate */
  5026. iwl4965_write32(priv, CSR_RESET, 0);
  5027. }
  5028. /**
  5029. * iwl4965_read_ucode - Read uCode images from disk file.
  5030. *
  5031. * Copy into buffers for card to fetch via bus-mastering
  5032. */
  5033. static int iwl4965_read_ucode(struct iwl4965_priv *priv)
  5034. {
  5035. struct iwl4965_ucode *ucode;
  5036. int ret;
  5037. const struct firmware *ucode_raw;
  5038. const char *name = priv->cfg->fw_name;
  5039. u8 *src;
  5040. size_t len;
  5041. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  5042. /* Ask kernel firmware_class module to get the boot firmware off disk.
  5043. * request_firmware() is synchronous, file is in memory on return. */
  5044. ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  5045. if (ret < 0) {
  5046. IWL_ERROR("%s firmware file req failed: Reason %d\n",
  5047. name, ret);
  5048. goto error;
  5049. }
  5050. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  5051. name, ucode_raw->size);
  5052. /* Make sure that we got at least our header! */
  5053. if (ucode_raw->size < sizeof(*ucode)) {
  5054. IWL_ERROR("File size way too small!\n");
  5055. ret = -EINVAL;
  5056. goto err_release;
  5057. }
  5058. /* Data from ucode file: header followed by uCode images */
  5059. ucode = (void *)ucode_raw->data;
  5060. ver = le32_to_cpu(ucode->ver);
  5061. inst_size = le32_to_cpu(ucode->inst_size);
  5062. data_size = le32_to_cpu(ucode->data_size);
  5063. init_size = le32_to_cpu(ucode->init_size);
  5064. init_data_size = le32_to_cpu(ucode->init_data_size);
  5065. boot_size = le32_to_cpu(ucode->boot_size);
  5066. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  5067. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  5068. inst_size);
  5069. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  5070. data_size);
  5071. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  5072. init_size);
  5073. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  5074. init_data_size);
  5075. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  5076. boot_size);
  5077. /* Verify size of file vs. image size info in file's header */
  5078. if (ucode_raw->size < sizeof(*ucode) +
  5079. inst_size + data_size + init_size +
  5080. init_data_size + boot_size) {
  5081. IWL_DEBUG_INFO("uCode file size %d too small\n",
  5082. (int)ucode_raw->size);
  5083. ret = -EINVAL;
  5084. goto err_release;
  5085. }
  5086. /* Verify that uCode images will fit in card's SRAM */
  5087. if (inst_size > IWL_MAX_INST_SIZE) {
  5088. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  5089. inst_size);
  5090. ret = -EINVAL;
  5091. goto err_release;
  5092. }
  5093. if (data_size > IWL_MAX_DATA_SIZE) {
  5094. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  5095. data_size);
  5096. ret = -EINVAL;
  5097. goto err_release;
  5098. }
  5099. if (init_size > IWL_MAX_INST_SIZE) {
  5100. IWL_DEBUG_INFO
  5101. ("uCode init instr len %d too large to fit in\n",
  5102. init_size);
  5103. ret = -EINVAL;
  5104. goto err_release;
  5105. }
  5106. if (init_data_size > IWL_MAX_DATA_SIZE) {
  5107. IWL_DEBUG_INFO
  5108. ("uCode init data len %d too large to fit in\n",
  5109. init_data_size);
  5110. ret = -EINVAL;
  5111. goto err_release;
  5112. }
  5113. if (boot_size > IWL_MAX_BSM_SIZE) {
  5114. IWL_DEBUG_INFO
  5115. ("uCode boot instr len %d too large to fit in\n",
  5116. boot_size);
  5117. ret = -EINVAL;
  5118. goto err_release;
  5119. }
  5120. /* Allocate ucode buffers for card's bus-master loading ... */
  5121. /* Runtime instructions and 2 copies of data:
  5122. * 1) unmodified from disk
  5123. * 2) backup cache for save/restore during power-downs */
  5124. priv->ucode_code.len = inst_size;
  5125. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  5126. priv->ucode_data.len = data_size;
  5127. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  5128. priv->ucode_data_backup.len = data_size;
  5129. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  5130. /* Initialization instructions and data */
  5131. if (init_size && init_data_size) {
  5132. priv->ucode_init.len = init_size;
  5133. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  5134. priv->ucode_init_data.len = init_data_size;
  5135. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  5136. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  5137. goto err_pci_alloc;
  5138. }
  5139. /* Bootstrap (instructions only, no data) */
  5140. if (boot_size) {
  5141. priv->ucode_boot.len = boot_size;
  5142. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  5143. if (!priv->ucode_boot.v_addr)
  5144. goto err_pci_alloc;
  5145. }
  5146. /* Copy images into buffers for card's bus-master reads ... */
  5147. /* Runtime instructions (first block of data in file) */
  5148. src = &ucode->data[0];
  5149. len = priv->ucode_code.len;
  5150. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  5151. memcpy(priv->ucode_code.v_addr, src, len);
  5152. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  5153. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  5154. /* Runtime data (2nd block)
  5155. * NOTE: Copy into backup buffer will be done in iwl4965_up() */
  5156. src = &ucode->data[inst_size];
  5157. len = priv->ucode_data.len;
  5158. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  5159. memcpy(priv->ucode_data.v_addr, src, len);
  5160. memcpy(priv->ucode_data_backup.v_addr, src, len);
  5161. /* Initialization instructions (3rd block) */
  5162. if (init_size) {
  5163. src = &ucode->data[inst_size + data_size];
  5164. len = priv->ucode_init.len;
  5165. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  5166. len);
  5167. memcpy(priv->ucode_init.v_addr, src, len);
  5168. }
  5169. /* Initialization data (4th block) */
  5170. if (init_data_size) {
  5171. src = &ucode->data[inst_size + data_size + init_size];
  5172. len = priv->ucode_init_data.len;
  5173. IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
  5174. len);
  5175. memcpy(priv->ucode_init_data.v_addr, src, len);
  5176. }
  5177. /* Bootstrap instructions (5th block) */
  5178. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  5179. len = priv->ucode_boot.len;
  5180. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
  5181. memcpy(priv->ucode_boot.v_addr, src, len);
  5182. /* We have our copies now, allow OS release its copies */
  5183. release_firmware(ucode_raw);
  5184. return 0;
  5185. err_pci_alloc:
  5186. IWL_ERROR("failed to allocate pci memory\n");
  5187. ret = -ENOMEM;
  5188. iwl4965_dealloc_ucode_pci(priv);
  5189. err_release:
  5190. release_firmware(ucode_raw);
  5191. error:
  5192. return ret;
  5193. }
  5194. /**
  5195. * iwl4965_set_ucode_ptrs - Set uCode address location
  5196. *
  5197. * Tell initialization uCode where to find runtime uCode.
  5198. *
  5199. * BSM registers initially contain pointers to initialization uCode.
  5200. * We need to replace them to load runtime uCode inst and data,
  5201. * and to save runtime data when powering down.
  5202. */
  5203. static int iwl4965_set_ucode_ptrs(struct iwl4965_priv *priv)
  5204. {
  5205. dma_addr_t pinst;
  5206. dma_addr_t pdata;
  5207. int rc = 0;
  5208. unsigned long flags;
  5209. /* bits 35:4 for 4965 */
  5210. pinst = priv->ucode_code.p_addr >> 4;
  5211. pdata = priv->ucode_data_backup.p_addr >> 4;
  5212. spin_lock_irqsave(&priv->lock, flags);
  5213. rc = iwl4965_grab_nic_access(priv);
  5214. if (rc) {
  5215. spin_unlock_irqrestore(&priv->lock, flags);
  5216. return rc;
  5217. }
  5218. /* Tell bootstrap uCode where to find image to load */
  5219. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5220. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5221. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  5222. priv->ucode_data.len);
  5223. /* Inst bytecount must be last to set up, bit 31 signals uCode
  5224. * that all new ptr/size info is in place */
  5225. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  5226. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  5227. iwl4965_release_nic_access(priv);
  5228. spin_unlock_irqrestore(&priv->lock, flags);
  5229. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  5230. return rc;
  5231. }
  5232. /**
  5233. * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
  5234. *
  5235. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  5236. *
  5237. * The 4965 "initialize" ALIVE reply contains calibration data for:
  5238. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  5239. * (3945 does not contain this data).
  5240. *
  5241. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  5242. */
  5243. static void iwl4965_init_alive_start(struct iwl4965_priv *priv)
  5244. {
  5245. /* Check alive response for "valid" sign from uCode */
  5246. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  5247. /* We had an error bringing up the hardware, so take it
  5248. * all the way back down so we can try again */
  5249. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  5250. goto restart;
  5251. }
  5252. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  5253. * This is a paranoid check, because we would not have gotten the
  5254. * "initialize" alive if code weren't properly loaded. */
  5255. if (iwl4965_verify_ucode(priv)) {
  5256. /* Runtime instruction load was bad;
  5257. * take it all the way back down so we can try again */
  5258. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  5259. goto restart;
  5260. }
  5261. /* Calculate temperature */
  5262. priv->temperature = iwl4965_get_temperature(priv);
  5263. /* Send pointers to protocol/runtime uCode image ... init code will
  5264. * load and launch runtime uCode, which will send us another "Alive"
  5265. * notification. */
  5266. IWL_DEBUG_INFO("Initialization Alive received.\n");
  5267. if (iwl4965_set_ucode_ptrs(priv)) {
  5268. /* Runtime instruction load won't happen;
  5269. * take it all the way back down so we can try again */
  5270. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  5271. goto restart;
  5272. }
  5273. return;
  5274. restart:
  5275. queue_work(priv->workqueue, &priv->restart);
  5276. }
  5277. /**
  5278. * iwl4965_alive_start - called after REPLY_ALIVE notification received
  5279. * from protocol/runtime uCode (initialization uCode's
  5280. * Alive gets handled by iwl4965_init_alive_start()).
  5281. */
  5282. static void iwl4965_alive_start(struct iwl4965_priv *priv)
  5283. {
  5284. int rc = 0;
  5285. IWL_DEBUG_INFO("Runtime Alive received.\n");
  5286. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  5287. /* We had an error bringing up the hardware, so take it
  5288. * all the way back down so we can try again */
  5289. IWL_DEBUG_INFO("Alive failed.\n");
  5290. goto restart;
  5291. }
  5292. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  5293. * This is a paranoid check, because we would not have gotten the
  5294. * "runtime" alive if code weren't properly loaded. */
  5295. if (iwl4965_verify_ucode(priv)) {
  5296. /* Runtime instruction load was bad;
  5297. * take it all the way back down so we can try again */
  5298. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  5299. goto restart;
  5300. }
  5301. iwl4965_clear_stations_table(priv);
  5302. rc = iwl4965_alive_notify(priv);
  5303. if (rc) {
  5304. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  5305. rc);
  5306. goto restart;
  5307. }
  5308. /* After the ALIVE response, we can send host commands to 4965 uCode */
  5309. set_bit(STATUS_ALIVE, &priv->status);
  5310. /* Clear out the uCode error bit if it is set */
  5311. clear_bit(STATUS_FW_ERROR, &priv->status);
  5312. if (iwl4965_is_rfkill(priv))
  5313. return;
  5314. ieee80211_start_queues(priv->hw);
  5315. priv->active_rate = priv->rates_mask;
  5316. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  5317. iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  5318. if (iwl4965_is_associated(priv)) {
  5319. struct iwl4965_rxon_cmd *active_rxon =
  5320. (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
  5321. memcpy(&priv->staging_rxon, &priv->active_rxon,
  5322. sizeof(priv->staging_rxon));
  5323. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5324. } else {
  5325. /* Initialize our rx_config data */
  5326. iwl4965_connection_init_rx_config(priv);
  5327. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  5328. }
  5329. /* Configure Bluetooth device coexistence support */
  5330. iwl4965_send_bt_config(priv);
  5331. /* Configure the adapter for unassociated operation */
  5332. iwl4965_commit_rxon(priv);
  5333. /* At this point, the NIC is initialized and operational */
  5334. priv->notif_missed_beacons = 0;
  5335. set_bit(STATUS_READY, &priv->status);
  5336. iwl4965_rf_kill_ct_config(priv);
  5337. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  5338. wake_up_interruptible(&priv->wait_command_queue);
  5339. if (priv->error_recovering)
  5340. iwl4965_error_recovery(priv);
  5341. return;
  5342. restart:
  5343. queue_work(priv->workqueue, &priv->restart);
  5344. }
  5345. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv);
  5346. static void __iwl4965_down(struct iwl4965_priv *priv)
  5347. {
  5348. unsigned long flags;
  5349. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  5350. struct ieee80211_conf *conf = NULL;
  5351. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  5352. conf = ieee80211_get_hw_conf(priv->hw);
  5353. if (!exit_pending)
  5354. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5355. iwl4965_clear_stations_table(priv);
  5356. /* Unblock any waiting calls */
  5357. wake_up_interruptible_all(&priv->wait_command_queue);
  5358. /* Wipe out the EXIT_PENDING status bit if we are not actually
  5359. * exiting the module */
  5360. if (!exit_pending)
  5361. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  5362. /* stop and reset the on-board processor */
  5363. iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  5364. /* tell the device to stop sending interrupts */
  5365. iwl4965_disable_interrupts(priv);
  5366. if (priv->mac80211_registered)
  5367. ieee80211_stop_queues(priv->hw);
  5368. /* If we have not previously called iwl4965_init() then
  5369. * clear all bits but the RF Kill and SUSPEND bits and return */
  5370. if (!iwl4965_is_init(priv)) {
  5371. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5372. STATUS_RF_KILL_HW |
  5373. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5374. STATUS_RF_KILL_SW |
  5375. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  5376. STATUS_GEO_CONFIGURED |
  5377. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5378. STATUS_IN_SUSPEND;
  5379. goto exit;
  5380. }
  5381. /* ...otherwise clear out all the status bits but the RF Kill and
  5382. * SUSPEND bits and continue taking the NIC down. */
  5383. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5384. STATUS_RF_KILL_HW |
  5385. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5386. STATUS_RF_KILL_SW |
  5387. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  5388. STATUS_GEO_CONFIGURED |
  5389. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5390. STATUS_IN_SUSPEND |
  5391. test_bit(STATUS_FW_ERROR, &priv->status) <<
  5392. STATUS_FW_ERROR;
  5393. spin_lock_irqsave(&priv->lock, flags);
  5394. iwl4965_clear_bit(priv, CSR_GP_CNTRL,
  5395. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  5396. spin_unlock_irqrestore(&priv->lock, flags);
  5397. iwl4965_hw_txq_ctx_stop(priv);
  5398. iwl4965_hw_rxq_stop(priv);
  5399. spin_lock_irqsave(&priv->lock, flags);
  5400. if (!iwl4965_grab_nic_access(priv)) {
  5401. iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
  5402. APMG_CLK_VAL_DMA_CLK_RQT);
  5403. iwl4965_release_nic_access(priv);
  5404. }
  5405. spin_unlock_irqrestore(&priv->lock, flags);
  5406. udelay(5);
  5407. iwl4965_hw_nic_stop_master(priv);
  5408. iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  5409. iwl4965_hw_nic_reset(priv);
  5410. exit:
  5411. memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
  5412. if (priv->ibss_beacon)
  5413. dev_kfree_skb(priv->ibss_beacon);
  5414. priv->ibss_beacon = NULL;
  5415. /* clear out any free frames */
  5416. iwl4965_clear_free_frames(priv);
  5417. }
  5418. static void iwl4965_down(struct iwl4965_priv *priv)
  5419. {
  5420. mutex_lock(&priv->mutex);
  5421. __iwl4965_down(priv);
  5422. mutex_unlock(&priv->mutex);
  5423. iwl4965_cancel_deferred_work(priv);
  5424. }
  5425. #define MAX_HW_RESTARTS 5
  5426. static int __iwl4965_up(struct iwl4965_priv *priv)
  5427. {
  5428. int rc, i;
  5429. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5430. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  5431. return -EIO;
  5432. }
  5433. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  5434. IWL_WARNING("Radio disabled by SW RF kill (module "
  5435. "parameter)\n");
  5436. return -ENODEV;
  5437. }
  5438. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  5439. IWL_ERROR("ucode not available for device bringup\n");
  5440. return -EIO;
  5441. }
  5442. /* If platform's RF_KILL switch is NOT set to KILL */
  5443. if (iwl4965_read32(priv, CSR_GP_CNTRL) &
  5444. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  5445. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  5446. else {
  5447. set_bit(STATUS_RF_KILL_HW, &priv->status);
  5448. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  5449. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  5450. return -ENODEV;
  5451. }
  5452. }
  5453. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5454. rc = iwl4965_hw_nic_init(priv);
  5455. if (rc) {
  5456. IWL_ERROR("Unable to int nic\n");
  5457. return rc;
  5458. }
  5459. /* make sure rfkill handshake bits are cleared */
  5460. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5461. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  5462. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  5463. /* clear (again), then enable host interrupts */
  5464. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5465. iwl4965_enable_interrupts(priv);
  5466. /* really make sure rfkill handshake bits are cleared */
  5467. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5468. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5469. /* Copy original ucode data image from disk into backup cache.
  5470. * This will be used to initialize the on-board processor's
  5471. * data SRAM for a clean start when the runtime program first loads. */
  5472. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  5473. priv->ucode_data.len);
  5474. /* We return success when we resume from suspend and rf_kill is on. */
  5475. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  5476. return 0;
  5477. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  5478. iwl4965_clear_stations_table(priv);
  5479. /* load bootstrap state machine,
  5480. * load bootstrap program into processor's memory,
  5481. * prepare to load the "initialize" uCode */
  5482. rc = iwl4965_load_bsm(priv);
  5483. if (rc) {
  5484. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  5485. continue;
  5486. }
  5487. /* start card; "initialize" will load runtime ucode */
  5488. iwl4965_nic_start(priv);
  5489. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  5490. return 0;
  5491. }
  5492. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5493. __iwl4965_down(priv);
  5494. /* tried to restart and config the device for as long as our
  5495. * patience could withstand */
  5496. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  5497. return -EIO;
  5498. }
  5499. /*****************************************************************************
  5500. *
  5501. * Workqueue callbacks
  5502. *
  5503. *****************************************************************************/
  5504. static void iwl4965_bg_init_alive_start(struct work_struct *data)
  5505. {
  5506. struct iwl4965_priv *priv =
  5507. container_of(data, struct iwl4965_priv, init_alive_start.work);
  5508. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5509. return;
  5510. mutex_lock(&priv->mutex);
  5511. iwl4965_init_alive_start(priv);
  5512. mutex_unlock(&priv->mutex);
  5513. }
  5514. static void iwl4965_bg_alive_start(struct work_struct *data)
  5515. {
  5516. struct iwl4965_priv *priv =
  5517. container_of(data, struct iwl4965_priv, alive_start.work);
  5518. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5519. return;
  5520. mutex_lock(&priv->mutex);
  5521. iwl4965_alive_start(priv);
  5522. mutex_unlock(&priv->mutex);
  5523. }
  5524. static void iwl4965_bg_rf_kill(struct work_struct *work)
  5525. {
  5526. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, rf_kill);
  5527. wake_up_interruptible(&priv->wait_command_queue);
  5528. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5529. return;
  5530. mutex_lock(&priv->mutex);
  5531. if (!iwl4965_is_rfkill(priv)) {
  5532. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  5533. "HW and/or SW RF Kill no longer active, restarting "
  5534. "device\n");
  5535. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5536. queue_work(priv->workqueue, &priv->restart);
  5537. } else {
  5538. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  5539. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  5540. "disabled by SW switch\n");
  5541. else
  5542. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  5543. "Kill switch must be turned off for "
  5544. "wireless networking to work.\n");
  5545. }
  5546. mutex_unlock(&priv->mutex);
  5547. }
  5548. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  5549. static void iwl4965_bg_scan_check(struct work_struct *data)
  5550. {
  5551. struct iwl4965_priv *priv =
  5552. container_of(data, struct iwl4965_priv, scan_check.work);
  5553. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5554. return;
  5555. mutex_lock(&priv->mutex);
  5556. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5557. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5558. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5559. "Scan completion watchdog resetting adapter (%dms)\n",
  5560. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5561. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5562. iwl4965_send_scan_abort(priv);
  5563. }
  5564. mutex_unlock(&priv->mutex);
  5565. }
  5566. static void iwl4965_bg_request_scan(struct work_struct *data)
  5567. {
  5568. struct iwl4965_priv *priv =
  5569. container_of(data, struct iwl4965_priv, request_scan);
  5570. struct iwl4965_host_cmd cmd = {
  5571. .id = REPLY_SCAN_CMD,
  5572. .len = sizeof(struct iwl4965_scan_cmd),
  5573. .meta.flags = CMD_SIZE_HUGE,
  5574. };
  5575. int rc = 0;
  5576. struct iwl4965_scan_cmd *scan;
  5577. struct ieee80211_conf *conf = NULL;
  5578. u16 cmd_len;
  5579. enum ieee80211_band band;
  5580. u8 direct_mask;
  5581. conf = ieee80211_get_hw_conf(priv->hw);
  5582. mutex_lock(&priv->mutex);
  5583. if (!iwl4965_is_ready(priv)) {
  5584. IWL_WARNING("request scan called when driver not ready.\n");
  5585. goto done;
  5586. }
  5587. /* Make sure the scan wasn't cancelled before this queued work
  5588. * was given the chance to run... */
  5589. if (!test_bit(STATUS_SCANNING, &priv->status))
  5590. goto done;
  5591. /* This should never be called or scheduled if there is currently
  5592. * a scan active in the hardware. */
  5593. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5594. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5595. "Ignoring second request.\n");
  5596. rc = -EIO;
  5597. goto done;
  5598. }
  5599. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5600. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5601. goto done;
  5602. }
  5603. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5604. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5605. goto done;
  5606. }
  5607. if (iwl4965_is_rfkill(priv)) {
  5608. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5609. goto done;
  5610. }
  5611. if (!test_bit(STATUS_READY, &priv->status)) {
  5612. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5613. goto done;
  5614. }
  5615. if (!priv->scan_bands) {
  5616. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5617. goto done;
  5618. }
  5619. if (!priv->scan) {
  5620. priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
  5621. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5622. if (!priv->scan) {
  5623. rc = -ENOMEM;
  5624. goto done;
  5625. }
  5626. }
  5627. scan = priv->scan;
  5628. memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5629. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5630. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5631. if (iwl4965_is_associated(priv)) {
  5632. u16 interval = 0;
  5633. u32 extra;
  5634. u32 suspend_time = 100;
  5635. u32 scan_suspend_time = 100;
  5636. unsigned long flags;
  5637. IWL_DEBUG_INFO("Scanning while associated...\n");
  5638. spin_lock_irqsave(&priv->lock, flags);
  5639. interval = priv->beacon_int;
  5640. spin_unlock_irqrestore(&priv->lock, flags);
  5641. scan->suspend_time = 0;
  5642. scan->max_out_time = cpu_to_le32(200 * 1024);
  5643. if (!interval)
  5644. interval = suspend_time;
  5645. extra = (suspend_time / interval) << 22;
  5646. scan_suspend_time = (extra |
  5647. ((suspend_time % interval) * 1024));
  5648. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5649. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5650. scan_suspend_time, interval);
  5651. }
  5652. /* We should add the ability for user to lock to PASSIVE ONLY */
  5653. if (priv->one_direct_scan) {
  5654. IWL_DEBUG_SCAN
  5655. ("Kicking off one direct scan for '%s'\n",
  5656. iwl4965_escape_essid(priv->direct_ssid,
  5657. priv->direct_ssid_len));
  5658. scan->direct_scan[0].id = WLAN_EID_SSID;
  5659. scan->direct_scan[0].len = priv->direct_ssid_len;
  5660. memcpy(scan->direct_scan[0].ssid,
  5661. priv->direct_ssid, priv->direct_ssid_len);
  5662. direct_mask = 1;
  5663. } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
  5664. scan->direct_scan[0].id = WLAN_EID_SSID;
  5665. scan->direct_scan[0].len = priv->essid_len;
  5666. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5667. direct_mask = 1;
  5668. } else
  5669. direct_mask = 0;
  5670. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5671. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5672. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5673. switch (priv->scan_bands) {
  5674. case 2:
  5675. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5676. scan->tx_cmd.rate_n_flags =
  5677. iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  5678. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  5679. scan->good_CRC_th = 0;
  5680. band = IEEE80211_BAND_2GHZ;
  5681. break;
  5682. case 1:
  5683. scan->tx_cmd.rate_n_flags =
  5684. iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  5685. RATE_MCS_ANT_B_MSK);
  5686. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5687. band = IEEE80211_BAND_5GHZ;
  5688. break;
  5689. default:
  5690. IWL_WARNING("Invalid scan band count\n");
  5691. goto done;
  5692. }
  5693. /* We don't build a direct scan probe request; the uCode will do
  5694. * that based on the direct_mask added to each channel entry */
  5695. cmd_len = iwl4965_fill_probe_req(priv, band,
  5696. (struct ieee80211_mgmt *)scan->data,
  5697. IWL_MAX_SCAN_SIZE - sizeof(*scan), 0);
  5698. scan->tx_cmd.len = cpu_to_le16(cmd_len);
  5699. /* select Rx chains */
  5700. /* Force use of chains B and C (0x6) for scan Rx.
  5701. * Avoid A (0x1) because of its off-channel reception on A-band.
  5702. * MIMO is not used here, but value is required to make uCode happy. */
  5703. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  5704. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  5705. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  5706. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  5707. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5708. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5709. if (direct_mask)
  5710. IWL_DEBUG_SCAN
  5711. ("Initiating direct scan for %s.\n",
  5712. iwl4965_escape_essid(priv->essid, priv->essid_len));
  5713. else
  5714. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5715. scan->channel_count =
  5716. iwl4965_get_channels_for_scan(
  5717. priv, band, 1, /* active */
  5718. direct_mask,
  5719. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5720. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5721. scan->channel_count * sizeof(struct iwl4965_scan_channel);
  5722. cmd.data = scan;
  5723. scan->len = cpu_to_le16(cmd.len);
  5724. set_bit(STATUS_SCAN_HW, &priv->status);
  5725. rc = iwl4965_send_cmd_sync(priv, &cmd);
  5726. if (rc)
  5727. goto done;
  5728. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5729. IWL_SCAN_CHECK_WATCHDOG);
  5730. mutex_unlock(&priv->mutex);
  5731. return;
  5732. done:
  5733. /* inform mac80211 scan aborted */
  5734. queue_work(priv->workqueue, &priv->scan_completed);
  5735. mutex_unlock(&priv->mutex);
  5736. }
  5737. static void iwl4965_bg_up(struct work_struct *data)
  5738. {
  5739. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, up);
  5740. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5741. return;
  5742. mutex_lock(&priv->mutex);
  5743. __iwl4965_up(priv);
  5744. mutex_unlock(&priv->mutex);
  5745. }
  5746. static void iwl4965_bg_restart(struct work_struct *data)
  5747. {
  5748. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, restart);
  5749. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5750. return;
  5751. iwl4965_down(priv);
  5752. queue_work(priv->workqueue, &priv->up);
  5753. }
  5754. static void iwl4965_bg_rx_replenish(struct work_struct *data)
  5755. {
  5756. struct iwl4965_priv *priv =
  5757. container_of(data, struct iwl4965_priv, rx_replenish);
  5758. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5759. return;
  5760. mutex_lock(&priv->mutex);
  5761. iwl4965_rx_replenish(priv);
  5762. mutex_unlock(&priv->mutex);
  5763. }
  5764. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  5765. static void iwl4965_bg_post_associate(struct work_struct *data)
  5766. {
  5767. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv,
  5768. post_associate.work);
  5769. int rc = 0;
  5770. struct ieee80211_conf *conf = NULL;
  5771. DECLARE_MAC_BUF(mac);
  5772. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5773. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  5774. return;
  5775. }
  5776. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  5777. priv->assoc_id,
  5778. print_mac(mac, priv->active_rxon.bssid_addr));
  5779. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5780. return;
  5781. mutex_lock(&priv->mutex);
  5782. if (!priv->vif || !priv->is_open) {
  5783. mutex_unlock(&priv->mutex);
  5784. return;
  5785. }
  5786. iwl4965_scan_cancel_timeout(priv, 200);
  5787. conf = ieee80211_get_hw_conf(priv->hw);
  5788. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5789. iwl4965_commit_rxon(priv);
  5790. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  5791. iwl4965_setup_rxon_timing(priv);
  5792. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5793. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5794. if (rc)
  5795. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5796. "Attempting to continue.\n");
  5797. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5798. #ifdef CONFIG_IWL4965_HT
  5799. if (priv->current_ht_config.is_ht)
  5800. iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
  5801. #endif /* CONFIG_IWL4965_HT*/
  5802. iwl4965_set_rxon_chain(priv);
  5803. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5804. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  5805. priv->assoc_id, priv->beacon_int);
  5806. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5807. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5808. else
  5809. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5810. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5811. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5812. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  5813. else
  5814. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5815. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5816. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5817. }
  5818. iwl4965_commit_rxon(priv);
  5819. switch (priv->iw_mode) {
  5820. case IEEE80211_IF_TYPE_STA:
  5821. iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
  5822. break;
  5823. case IEEE80211_IF_TYPE_IBSS:
  5824. /* clear out the station table */
  5825. iwl4965_clear_stations_table(priv);
  5826. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  5827. iwl4965_rxon_add_station(priv, priv->bssid, 0);
  5828. iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
  5829. iwl4965_send_beacon_cmd(priv);
  5830. break;
  5831. default:
  5832. IWL_ERROR("%s Should not be called in %d mode\n",
  5833. __FUNCTION__, priv->iw_mode);
  5834. break;
  5835. }
  5836. iwl4965_sequence_reset(priv);
  5837. #ifdef CONFIG_IWL4965_SENSITIVITY
  5838. /* Enable Rx differential gain and sensitivity calibrations */
  5839. iwl4965_chain_noise_reset(priv);
  5840. priv->start_calib = 1;
  5841. #endif /* CONFIG_IWL4965_SENSITIVITY */
  5842. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5843. priv->assoc_station_added = 1;
  5844. iwl4965_activate_qos(priv, 0);
  5845. /* we have just associated, don't start scan too early */
  5846. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  5847. mutex_unlock(&priv->mutex);
  5848. }
  5849. static void iwl4965_bg_abort_scan(struct work_struct *work)
  5850. {
  5851. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, abort_scan);
  5852. if (!iwl4965_is_ready(priv))
  5853. return;
  5854. mutex_lock(&priv->mutex);
  5855. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  5856. iwl4965_send_scan_abort(priv);
  5857. mutex_unlock(&priv->mutex);
  5858. }
  5859. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
  5860. static void iwl4965_bg_scan_completed(struct work_struct *work)
  5861. {
  5862. struct iwl4965_priv *priv =
  5863. container_of(work, struct iwl4965_priv, scan_completed);
  5864. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  5865. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5866. return;
  5867. if (test_bit(STATUS_CONF_PENDING, &priv->status))
  5868. iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
  5869. ieee80211_scan_completed(priv->hw);
  5870. /* Since setting the TXPOWER may have been deferred while
  5871. * performing the scan, fire one off */
  5872. mutex_lock(&priv->mutex);
  5873. iwl4965_hw_reg_send_txpower(priv);
  5874. mutex_unlock(&priv->mutex);
  5875. }
  5876. /*****************************************************************************
  5877. *
  5878. * mac80211 entry point functions
  5879. *
  5880. *****************************************************************************/
  5881. #define UCODE_READY_TIMEOUT (2 * HZ)
  5882. static int iwl4965_mac_start(struct ieee80211_hw *hw)
  5883. {
  5884. struct iwl4965_priv *priv = hw->priv;
  5885. int ret;
  5886. IWL_DEBUG_MAC80211("enter\n");
  5887. if (pci_enable_device(priv->pci_dev)) {
  5888. IWL_ERROR("Fail to pci_enable_device\n");
  5889. return -ENODEV;
  5890. }
  5891. pci_restore_state(priv->pci_dev);
  5892. pci_enable_msi(priv->pci_dev);
  5893. ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
  5894. DRV_NAME, priv);
  5895. if (ret) {
  5896. IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
  5897. goto out_disable_msi;
  5898. }
  5899. /* we should be verifying the device is ready to be opened */
  5900. mutex_lock(&priv->mutex);
  5901. memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
  5902. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  5903. * ucode filename and max sizes are card-specific. */
  5904. if (!priv->ucode_code.len) {
  5905. ret = iwl4965_read_ucode(priv);
  5906. if (ret) {
  5907. IWL_ERROR("Could not read microcode: %d\n", ret);
  5908. mutex_unlock(&priv->mutex);
  5909. goto out_release_irq;
  5910. }
  5911. }
  5912. ret = __iwl4965_up(priv);
  5913. mutex_unlock(&priv->mutex);
  5914. if (ret)
  5915. goto out_release_irq;
  5916. IWL_DEBUG_INFO("Start UP work done.\n");
  5917. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  5918. return 0;
  5919. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  5920. * mac80211 will not be run successfully. */
  5921. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  5922. test_bit(STATUS_READY, &priv->status),
  5923. UCODE_READY_TIMEOUT);
  5924. if (!ret) {
  5925. if (!test_bit(STATUS_READY, &priv->status)) {
  5926. IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
  5927. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  5928. ret = -ETIMEDOUT;
  5929. goto out_release_irq;
  5930. }
  5931. }
  5932. priv->is_open = 1;
  5933. IWL_DEBUG_MAC80211("leave\n");
  5934. return 0;
  5935. out_release_irq:
  5936. free_irq(priv->pci_dev->irq, priv);
  5937. out_disable_msi:
  5938. pci_disable_msi(priv->pci_dev);
  5939. pci_disable_device(priv->pci_dev);
  5940. priv->is_open = 0;
  5941. IWL_DEBUG_MAC80211("leave - failed\n");
  5942. return ret;
  5943. }
  5944. static void iwl4965_mac_stop(struct ieee80211_hw *hw)
  5945. {
  5946. struct iwl4965_priv *priv = hw->priv;
  5947. IWL_DEBUG_MAC80211("enter\n");
  5948. if (!priv->is_open) {
  5949. IWL_DEBUG_MAC80211("leave - skip\n");
  5950. return;
  5951. }
  5952. priv->is_open = 0;
  5953. if (iwl4965_is_ready_rf(priv)) {
  5954. /* stop mac, cancel any scan request and clear
  5955. * RXON_FILTER_ASSOC_MSK BIT
  5956. */
  5957. mutex_lock(&priv->mutex);
  5958. iwl4965_scan_cancel_timeout(priv, 100);
  5959. cancel_delayed_work(&priv->post_associate);
  5960. mutex_unlock(&priv->mutex);
  5961. }
  5962. iwl4965_down(priv);
  5963. flush_workqueue(priv->workqueue);
  5964. free_irq(priv->pci_dev->irq, priv);
  5965. pci_disable_msi(priv->pci_dev);
  5966. pci_save_state(priv->pci_dev);
  5967. pci_disable_device(priv->pci_dev);
  5968. IWL_DEBUG_MAC80211("leave\n");
  5969. }
  5970. static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  5971. struct ieee80211_tx_control *ctl)
  5972. {
  5973. struct iwl4965_priv *priv = hw->priv;
  5974. IWL_DEBUG_MAC80211("enter\n");
  5975. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  5976. IWL_DEBUG_MAC80211("leave - monitor\n");
  5977. return -1;
  5978. }
  5979. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  5980. ctl->tx_rate->bitrate);
  5981. if (iwl4965_tx_skb(priv, skb, ctl))
  5982. dev_kfree_skb_any(skb);
  5983. IWL_DEBUG_MAC80211("leave\n");
  5984. return 0;
  5985. }
  5986. static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
  5987. struct ieee80211_if_init_conf *conf)
  5988. {
  5989. struct iwl4965_priv *priv = hw->priv;
  5990. unsigned long flags;
  5991. DECLARE_MAC_BUF(mac);
  5992. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  5993. if (priv->vif) {
  5994. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  5995. return -EOPNOTSUPP;
  5996. }
  5997. spin_lock_irqsave(&priv->lock, flags);
  5998. priv->vif = conf->vif;
  5999. spin_unlock_irqrestore(&priv->lock, flags);
  6000. mutex_lock(&priv->mutex);
  6001. if (conf->mac_addr) {
  6002. IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
  6003. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  6004. }
  6005. if (iwl4965_is_ready(priv))
  6006. iwl4965_set_mode(priv, conf->type);
  6007. mutex_unlock(&priv->mutex);
  6008. IWL_DEBUG_MAC80211("leave\n");
  6009. return 0;
  6010. }
  6011. /**
  6012. * iwl4965_mac_config - mac80211 config callback
  6013. *
  6014. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  6015. * be set inappropriately and the driver currently sets the hardware up to
  6016. * use it whenever needed.
  6017. */
  6018. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  6019. {
  6020. struct iwl4965_priv *priv = hw->priv;
  6021. const struct iwl4965_channel_info *ch_info;
  6022. unsigned long flags;
  6023. int ret = 0;
  6024. mutex_lock(&priv->mutex);
  6025. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
  6026. priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
  6027. if (!iwl4965_is_ready(priv)) {
  6028. IWL_DEBUG_MAC80211("leave - not ready\n");
  6029. ret = -EIO;
  6030. goto out;
  6031. }
  6032. if (unlikely(!iwl4965_param_disable_hw_scan &&
  6033. test_bit(STATUS_SCANNING, &priv->status))) {
  6034. IWL_DEBUG_MAC80211("leave - scanning\n");
  6035. set_bit(STATUS_CONF_PENDING, &priv->status);
  6036. mutex_unlock(&priv->mutex);
  6037. return 0;
  6038. }
  6039. spin_lock_irqsave(&priv->lock, flags);
  6040. ch_info = iwl4965_get_channel_info(priv, conf->channel->band,
  6041. ieee80211_frequency_to_channel(conf->channel->center_freq));
  6042. if (!is_channel_valid(ch_info)) {
  6043. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  6044. spin_unlock_irqrestore(&priv->lock, flags);
  6045. ret = -EINVAL;
  6046. goto out;
  6047. }
  6048. #ifdef CONFIG_IWL4965_HT
  6049. /* if we are switching from ht to 2.4 clear flags
  6050. * from any ht related info since 2.4 does not
  6051. * support ht */
  6052. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value)
  6053. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6054. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  6055. #endif
  6056. )
  6057. priv->staging_rxon.flags = 0;
  6058. #endif /* CONFIG_IWL4965_HT */
  6059. iwl4965_set_rxon_channel(priv, conf->channel->band,
  6060. ieee80211_frequency_to_channel(conf->channel->center_freq));
  6061. iwl4965_set_flags_for_phymode(priv, conf->channel->band);
  6062. /* The list of supported rates and rate mask can be different
  6063. * for each band; since the band may have changed, reset
  6064. * the rate mask to what mac80211 lists */
  6065. iwl4965_set_rate(priv);
  6066. spin_unlock_irqrestore(&priv->lock, flags);
  6067. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6068. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  6069. iwl4965_hw_channel_switch(priv, conf->channel);
  6070. goto out;
  6071. }
  6072. #endif
  6073. iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
  6074. if (!conf->radio_enabled) {
  6075. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  6076. goto out;
  6077. }
  6078. if (iwl4965_is_rfkill(priv)) {
  6079. IWL_DEBUG_MAC80211("leave - RF kill\n");
  6080. ret = -EIO;
  6081. goto out;
  6082. }
  6083. iwl4965_set_rate(priv);
  6084. if (memcmp(&priv->active_rxon,
  6085. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  6086. iwl4965_commit_rxon(priv);
  6087. else
  6088. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  6089. IWL_DEBUG_MAC80211("leave\n");
  6090. out:
  6091. clear_bit(STATUS_CONF_PENDING, &priv->status);
  6092. mutex_unlock(&priv->mutex);
  6093. return ret;
  6094. }
  6095. static void iwl4965_config_ap(struct iwl4965_priv *priv)
  6096. {
  6097. int rc = 0;
  6098. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6099. return;
  6100. /* The following should be done only at AP bring up */
  6101. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  6102. /* RXON - unassoc (to set timing command) */
  6103. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6104. iwl4965_commit_rxon(priv);
  6105. /* RXON Timing */
  6106. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  6107. iwl4965_setup_rxon_timing(priv);
  6108. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  6109. sizeof(priv->rxon_timing), &priv->rxon_timing);
  6110. if (rc)
  6111. IWL_WARNING("REPLY_RXON_TIMING failed - "
  6112. "Attempting to continue.\n");
  6113. iwl4965_set_rxon_chain(priv);
  6114. /* FIXME: what should be the assoc_id for AP? */
  6115. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  6116. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6117. priv->staging_rxon.flags |=
  6118. RXON_FLG_SHORT_PREAMBLE_MSK;
  6119. else
  6120. priv->staging_rxon.flags &=
  6121. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6122. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6123. if (priv->assoc_capability &
  6124. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6125. priv->staging_rxon.flags |=
  6126. RXON_FLG_SHORT_SLOT_MSK;
  6127. else
  6128. priv->staging_rxon.flags &=
  6129. ~RXON_FLG_SHORT_SLOT_MSK;
  6130. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6131. priv->staging_rxon.flags &=
  6132. ~RXON_FLG_SHORT_SLOT_MSK;
  6133. }
  6134. /* restore RXON assoc */
  6135. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  6136. iwl4965_commit_rxon(priv);
  6137. iwl4965_activate_qos(priv, 1);
  6138. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  6139. }
  6140. iwl4965_send_beacon_cmd(priv);
  6141. /* FIXME - we need to add code here to detect a totally new
  6142. * configuration, reset the AP, unassoc, rxon timing, assoc,
  6143. * clear sta table, add BCAST sta... */
  6144. }
  6145. static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
  6146. struct ieee80211_vif *vif,
  6147. struct ieee80211_if_conf *conf)
  6148. {
  6149. struct iwl4965_priv *priv = hw->priv;
  6150. DECLARE_MAC_BUF(mac);
  6151. unsigned long flags;
  6152. int rc;
  6153. if (conf == NULL)
  6154. return -EIO;
  6155. if (priv->vif != vif) {
  6156. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  6157. mutex_unlock(&priv->mutex);
  6158. return 0;
  6159. }
  6160. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  6161. (!conf->beacon || !conf->ssid_len)) {
  6162. IWL_DEBUG_MAC80211
  6163. ("Leaving in AP mode because HostAPD is not ready.\n");
  6164. return 0;
  6165. }
  6166. if (!iwl4965_is_alive(priv))
  6167. return -EAGAIN;
  6168. mutex_lock(&priv->mutex);
  6169. if (conf->bssid)
  6170. IWL_DEBUG_MAC80211("bssid: %s\n",
  6171. print_mac(mac, conf->bssid));
  6172. /*
  6173. * very dubious code was here; the probe filtering flag is never set:
  6174. *
  6175. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  6176. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  6177. */
  6178. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  6179. if (!conf->bssid) {
  6180. conf->bssid = priv->mac_addr;
  6181. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  6182. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  6183. print_mac(mac, conf->bssid));
  6184. }
  6185. if (priv->ibss_beacon)
  6186. dev_kfree_skb(priv->ibss_beacon);
  6187. priv->ibss_beacon = conf->beacon;
  6188. }
  6189. if (iwl4965_is_rfkill(priv))
  6190. goto done;
  6191. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  6192. !is_multicast_ether_addr(conf->bssid)) {
  6193. /* If there is currently a HW scan going on in the background
  6194. * then we need to cancel it else the RXON below will fail. */
  6195. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  6196. IWL_WARNING("Aborted scan still in progress "
  6197. "after 100ms\n");
  6198. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  6199. mutex_unlock(&priv->mutex);
  6200. return -EAGAIN;
  6201. }
  6202. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  6203. /* TODO: Audit driver for usage of these members and see
  6204. * if mac80211 deprecates them (priv->bssid looks like it
  6205. * shouldn't be there, but I haven't scanned the IBSS code
  6206. * to verify) - jpk */
  6207. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  6208. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6209. iwl4965_config_ap(priv);
  6210. else {
  6211. rc = iwl4965_commit_rxon(priv);
  6212. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  6213. iwl4965_rxon_add_station(
  6214. priv, priv->active_rxon.bssid_addr, 1);
  6215. }
  6216. } else {
  6217. iwl4965_scan_cancel_timeout(priv, 100);
  6218. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6219. iwl4965_commit_rxon(priv);
  6220. }
  6221. done:
  6222. spin_lock_irqsave(&priv->lock, flags);
  6223. if (!conf->ssid_len)
  6224. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6225. else
  6226. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  6227. priv->essid_len = conf->ssid_len;
  6228. spin_unlock_irqrestore(&priv->lock, flags);
  6229. IWL_DEBUG_MAC80211("leave\n");
  6230. mutex_unlock(&priv->mutex);
  6231. return 0;
  6232. }
  6233. static void iwl4965_configure_filter(struct ieee80211_hw *hw,
  6234. unsigned int changed_flags,
  6235. unsigned int *total_flags,
  6236. int mc_count, struct dev_addr_list *mc_list)
  6237. {
  6238. /*
  6239. * XXX: dummy
  6240. * see also iwl4965_connection_init_rx_config
  6241. */
  6242. *total_flags = 0;
  6243. }
  6244. static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
  6245. struct ieee80211_if_init_conf *conf)
  6246. {
  6247. struct iwl4965_priv *priv = hw->priv;
  6248. IWL_DEBUG_MAC80211("enter\n");
  6249. mutex_lock(&priv->mutex);
  6250. if (iwl4965_is_ready_rf(priv)) {
  6251. iwl4965_scan_cancel_timeout(priv, 100);
  6252. cancel_delayed_work(&priv->post_associate);
  6253. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6254. iwl4965_commit_rxon(priv);
  6255. }
  6256. if (priv->vif == conf->vif) {
  6257. priv->vif = NULL;
  6258. memset(priv->bssid, 0, ETH_ALEN);
  6259. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6260. priv->essid_len = 0;
  6261. }
  6262. mutex_unlock(&priv->mutex);
  6263. IWL_DEBUG_MAC80211("leave\n");
  6264. }
  6265. static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
  6266. struct ieee80211_vif *vif,
  6267. struct ieee80211_bss_conf *bss_conf,
  6268. u32 changes)
  6269. {
  6270. struct iwl4965_priv *priv = hw->priv;
  6271. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  6272. if (bss_conf->use_short_preamble)
  6273. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  6274. else
  6275. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6276. }
  6277. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  6278. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  6279. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  6280. else
  6281. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  6282. }
  6283. if (changes & BSS_CHANGED_ASSOC) {
  6284. /*
  6285. * TODO:
  6286. * do stuff instead of sniffing assoc resp
  6287. */
  6288. }
  6289. if (iwl4965_is_associated(priv))
  6290. iwl4965_send_rxon_assoc(priv);
  6291. }
  6292. static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  6293. {
  6294. int rc = 0;
  6295. unsigned long flags;
  6296. struct iwl4965_priv *priv = hw->priv;
  6297. IWL_DEBUG_MAC80211("enter\n");
  6298. mutex_lock(&priv->mutex);
  6299. spin_lock_irqsave(&priv->lock, flags);
  6300. if (!iwl4965_is_ready_rf(priv)) {
  6301. rc = -EIO;
  6302. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  6303. goto out_unlock;
  6304. }
  6305. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  6306. rc = -EIO;
  6307. IWL_ERROR("ERROR: APs don't scan\n");
  6308. goto out_unlock;
  6309. }
  6310. /* we don't schedule scan within next_scan_jiffies period */
  6311. if (priv->next_scan_jiffies &&
  6312. time_after(priv->next_scan_jiffies, jiffies)) {
  6313. rc = -EAGAIN;
  6314. goto out_unlock;
  6315. }
  6316. /* if we just finished scan ask for delay */
  6317. if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
  6318. IWL_DELAY_NEXT_SCAN, jiffies)) {
  6319. rc = -EAGAIN;
  6320. goto out_unlock;
  6321. }
  6322. if (len) {
  6323. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  6324. iwl4965_escape_essid(ssid, len), (int)len);
  6325. priv->one_direct_scan = 1;
  6326. priv->direct_ssid_len = (u8)
  6327. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  6328. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  6329. } else
  6330. priv->one_direct_scan = 0;
  6331. rc = iwl4965_scan_initiate(priv);
  6332. IWL_DEBUG_MAC80211("leave\n");
  6333. out_unlock:
  6334. spin_unlock_irqrestore(&priv->lock, flags);
  6335. mutex_unlock(&priv->mutex);
  6336. return rc;
  6337. }
  6338. static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  6339. const u8 *local_addr, const u8 *addr,
  6340. struct ieee80211_key_conf *key)
  6341. {
  6342. struct iwl4965_priv *priv = hw->priv;
  6343. DECLARE_MAC_BUF(mac);
  6344. int rc = 0;
  6345. u8 sta_id;
  6346. IWL_DEBUG_MAC80211("enter\n");
  6347. if (!iwl4965_param_hwcrypto) {
  6348. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  6349. return -EOPNOTSUPP;
  6350. }
  6351. if (is_zero_ether_addr(addr))
  6352. /* only support pairwise keys */
  6353. return -EOPNOTSUPP;
  6354. sta_id = iwl4965_hw_find_station(priv, addr);
  6355. if (sta_id == IWL_INVALID_STATION) {
  6356. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  6357. print_mac(mac, addr));
  6358. return -EINVAL;
  6359. }
  6360. mutex_lock(&priv->mutex);
  6361. iwl4965_scan_cancel_timeout(priv, 100);
  6362. switch (cmd) {
  6363. case SET_KEY:
  6364. rc = iwl4965_update_sta_key_info(priv, key, sta_id);
  6365. if (!rc) {
  6366. iwl4965_set_rxon_hwcrypto(priv, 1);
  6367. iwl4965_commit_rxon(priv);
  6368. key->hw_key_idx = sta_id;
  6369. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  6370. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  6371. }
  6372. break;
  6373. case DISABLE_KEY:
  6374. rc = iwl4965_clear_sta_key_info(priv, sta_id);
  6375. if (!rc) {
  6376. iwl4965_set_rxon_hwcrypto(priv, 0);
  6377. iwl4965_commit_rxon(priv);
  6378. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  6379. }
  6380. break;
  6381. default:
  6382. rc = -EINVAL;
  6383. }
  6384. IWL_DEBUG_MAC80211("leave\n");
  6385. mutex_unlock(&priv->mutex);
  6386. return rc;
  6387. }
  6388. static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  6389. const struct ieee80211_tx_queue_params *params)
  6390. {
  6391. struct iwl4965_priv *priv = hw->priv;
  6392. unsigned long flags;
  6393. int q;
  6394. IWL_DEBUG_MAC80211("enter\n");
  6395. if (!iwl4965_is_ready_rf(priv)) {
  6396. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6397. return -EIO;
  6398. }
  6399. if (queue >= AC_NUM) {
  6400. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  6401. return 0;
  6402. }
  6403. if (!priv->qos_data.qos_enable) {
  6404. priv->qos_data.qos_active = 0;
  6405. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  6406. return 0;
  6407. }
  6408. q = AC_NUM - 1 - queue;
  6409. spin_lock_irqsave(&priv->lock, flags);
  6410. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  6411. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  6412. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  6413. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  6414. cpu_to_le16((params->txop * 32));
  6415. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  6416. priv->qos_data.qos_active = 1;
  6417. spin_unlock_irqrestore(&priv->lock, flags);
  6418. mutex_lock(&priv->mutex);
  6419. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6420. iwl4965_activate_qos(priv, 1);
  6421. else if (priv->assoc_id && iwl4965_is_associated(priv))
  6422. iwl4965_activate_qos(priv, 0);
  6423. mutex_unlock(&priv->mutex);
  6424. IWL_DEBUG_MAC80211("leave\n");
  6425. return 0;
  6426. }
  6427. static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
  6428. struct ieee80211_tx_queue_stats *stats)
  6429. {
  6430. struct iwl4965_priv *priv = hw->priv;
  6431. int i, avail;
  6432. struct iwl4965_tx_queue *txq;
  6433. struct iwl4965_queue *q;
  6434. unsigned long flags;
  6435. IWL_DEBUG_MAC80211("enter\n");
  6436. if (!iwl4965_is_ready_rf(priv)) {
  6437. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6438. return -EIO;
  6439. }
  6440. spin_lock_irqsave(&priv->lock, flags);
  6441. for (i = 0; i < AC_NUM; i++) {
  6442. txq = &priv->txq[i];
  6443. q = &txq->q;
  6444. avail = iwl4965_queue_space(q);
  6445. stats->data[i].len = q->n_window - avail;
  6446. stats->data[i].limit = q->n_window - q->high_mark;
  6447. stats->data[i].count = q->n_window;
  6448. }
  6449. spin_unlock_irqrestore(&priv->lock, flags);
  6450. IWL_DEBUG_MAC80211("leave\n");
  6451. return 0;
  6452. }
  6453. static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
  6454. struct ieee80211_low_level_stats *stats)
  6455. {
  6456. IWL_DEBUG_MAC80211("enter\n");
  6457. IWL_DEBUG_MAC80211("leave\n");
  6458. return 0;
  6459. }
  6460. static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
  6461. {
  6462. IWL_DEBUG_MAC80211("enter\n");
  6463. IWL_DEBUG_MAC80211("leave\n");
  6464. return 0;
  6465. }
  6466. static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
  6467. {
  6468. struct iwl4965_priv *priv = hw->priv;
  6469. unsigned long flags;
  6470. mutex_lock(&priv->mutex);
  6471. IWL_DEBUG_MAC80211("enter\n");
  6472. priv->lq_mngr.lq_ready = 0;
  6473. #ifdef CONFIG_IWL4965_HT
  6474. spin_lock_irqsave(&priv->lock, flags);
  6475. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
  6476. spin_unlock_irqrestore(&priv->lock, flags);
  6477. #endif /* CONFIG_IWL4965_HT */
  6478. iwl4965_reset_qos(priv);
  6479. cancel_delayed_work(&priv->post_associate);
  6480. spin_lock_irqsave(&priv->lock, flags);
  6481. priv->assoc_id = 0;
  6482. priv->assoc_capability = 0;
  6483. priv->call_post_assoc_from_beacon = 0;
  6484. priv->assoc_station_added = 0;
  6485. /* new association get rid of ibss beacon skb */
  6486. if (priv->ibss_beacon)
  6487. dev_kfree_skb(priv->ibss_beacon);
  6488. priv->ibss_beacon = NULL;
  6489. priv->beacon_int = priv->hw->conf.beacon_int;
  6490. priv->timestamp1 = 0;
  6491. priv->timestamp0 = 0;
  6492. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  6493. priv->beacon_int = 0;
  6494. spin_unlock_irqrestore(&priv->lock, flags);
  6495. if (!iwl4965_is_ready_rf(priv)) {
  6496. IWL_DEBUG_MAC80211("leave - not ready\n");
  6497. mutex_unlock(&priv->mutex);
  6498. return;
  6499. }
  6500. /* we are restarting association process
  6501. * clear RXON_FILTER_ASSOC_MSK bit
  6502. */
  6503. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  6504. iwl4965_scan_cancel_timeout(priv, 100);
  6505. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6506. iwl4965_commit_rxon(priv);
  6507. }
  6508. /* Per mac80211.h: This is only used in IBSS mode... */
  6509. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6510. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6511. mutex_unlock(&priv->mutex);
  6512. return;
  6513. }
  6514. priv->only_active_channel = 0;
  6515. iwl4965_set_rate(priv);
  6516. mutex_unlock(&priv->mutex);
  6517. IWL_DEBUG_MAC80211("leave\n");
  6518. }
  6519. static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6520. struct ieee80211_tx_control *control)
  6521. {
  6522. struct iwl4965_priv *priv = hw->priv;
  6523. unsigned long flags;
  6524. mutex_lock(&priv->mutex);
  6525. IWL_DEBUG_MAC80211("enter\n");
  6526. if (!iwl4965_is_ready_rf(priv)) {
  6527. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6528. mutex_unlock(&priv->mutex);
  6529. return -EIO;
  6530. }
  6531. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6532. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6533. mutex_unlock(&priv->mutex);
  6534. return -EIO;
  6535. }
  6536. spin_lock_irqsave(&priv->lock, flags);
  6537. if (priv->ibss_beacon)
  6538. dev_kfree_skb(priv->ibss_beacon);
  6539. priv->ibss_beacon = skb;
  6540. priv->assoc_id = 0;
  6541. IWL_DEBUG_MAC80211("leave\n");
  6542. spin_unlock_irqrestore(&priv->lock, flags);
  6543. iwl4965_reset_qos(priv);
  6544. queue_work(priv->workqueue, &priv->post_associate.work);
  6545. mutex_unlock(&priv->mutex);
  6546. return 0;
  6547. }
  6548. #ifdef CONFIG_IWL4965_HT
  6549. static void iwl4965_ht_info_fill(struct ieee80211_conf *conf,
  6550. struct iwl4965_priv *priv)
  6551. {
  6552. struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
  6553. struct ieee80211_ht_info *ht_conf = &conf->ht_conf;
  6554. struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf;
  6555. IWL_DEBUG_MAC80211("enter: \n");
  6556. if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) {
  6557. iwl_conf->is_ht = 0;
  6558. return;
  6559. }
  6560. iwl_conf->is_ht = 1;
  6561. priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6562. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
  6563. iwl_conf->sgf |= 0x1;
  6564. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
  6565. iwl_conf->sgf |= 0x2;
  6566. iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
  6567. iwl_conf->max_amsdu_size =
  6568. !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
  6569. iwl_conf->supported_chan_width =
  6570. !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
  6571. iwl_conf->extension_chan_offset =
  6572. ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
  6573. /* If no above or below channel supplied disable FAT channel */
  6574. if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE &&
  6575. iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW)
  6576. iwl_conf->supported_chan_width = 0;
  6577. iwl_conf->tx_mimo_ps_mode =
  6578. (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6579. memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
  6580. iwl_conf->control_channel = ht_bss_conf->primary_channel;
  6581. iwl_conf->tx_chan_width =
  6582. !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
  6583. iwl_conf->ht_protection =
  6584. ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
  6585. iwl_conf->non_GF_STA_present =
  6586. !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
  6587. IWL_DEBUG_MAC80211("control channel %d\n",
  6588. iwl_conf->control_channel);
  6589. IWL_DEBUG_MAC80211("leave\n");
  6590. }
  6591. static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
  6592. struct ieee80211_conf *conf)
  6593. {
  6594. struct iwl4965_priv *priv = hw->priv;
  6595. IWL_DEBUG_MAC80211("enter: \n");
  6596. iwl4965_ht_info_fill(conf, priv);
  6597. iwl4965_set_rxon_chain(priv);
  6598. if (priv && priv->assoc_id &&
  6599. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  6600. unsigned long flags;
  6601. spin_lock_irqsave(&priv->lock, flags);
  6602. if (priv->beacon_int)
  6603. queue_work(priv->workqueue, &priv->post_associate.work);
  6604. else
  6605. priv->call_post_assoc_from_beacon = 1;
  6606. spin_unlock_irqrestore(&priv->lock, flags);
  6607. }
  6608. IWL_DEBUG_MAC80211("leave:\n");
  6609. return 0;
  6610. }
  6611. #endif /*CONFIG_IWL4965_HT*/
  6612. /*****************************************************************************
  6613. *
  6614. * sysfs attributes
  6615. *
  6616. *****************************************************************************/
  6617. #ifdef CONFIG_IWL4965_DEBUG
  6618. /*
  6619. * The following adds a new attribute to the sysfs representation
  6620. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6621. * used for controlling the debug level.
  6622. *
  6623. * See the level definitions in iwl for details.
  6624. */
  6625. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6626. {
  6627. return sprintf(buf, "0x%08X\n", iwl4965_debug_level);
  6628. }
  6629. static ssize_t store_debug_level(struct device_driver *d,
  6630. const char *buf, size_t count)
  6631. {
  6632. char *p = (char *)buf;
  6633. u32 val;
  6634. val = simple_strtoul(p, &p, 0);
  6635. if (p == buf)
  6636. printk(KERN_INFO DRV_NAME
  6637. ": %s is not in hex or decimal form.\n", buf);
  6638. else
  6639. iwl4965_debug_level = val;
  6640. return strnlen(buf, count);
  6641. }
  6642. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6643. show_debug_level, store_debug_level);
  6644. #endif /* CONFIG_IWL4965_DEBUG */
  6645. static ssize_t show_rf_kill(struct device *d,
  6646. struct device_attribute *attr, char *buf)
  6647. {
  6648. /*
  6649. * 0 - RF kill not enabled
  6650. * 1 - SW based RF kill active (sysfs)
  6651. * 2 - HW based RF kill active
  6652. * 3 - Both HW and SW based RF kill active
  6653. */
  6654. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6655. int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
  6656. (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
  6657. return sprintf(buf, "%i\n", val);
  6658. }
  6659. static ssize_t store_rf_kill(struct device *d,
  6660. struct device_attribute *attr,
  6661. const char *buf, size_t count)
  6662. {
  6663. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6664. mutex_lock(&priv->mutex);
  6665. iwl4965_radio_kill_sw(priv, buf[0] == '1');
  6666. mutex_unlock(&priv->mutex);
  6667. return count;
  6668. }
  6669. static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
  6670. static ssize_t show_temperature(struct device *d,
  6671. struct device_attribute *attr, char *buf)
  6672. {
  6673. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6674. if (!iwl4965_is_alive(priv))
  6675. return -EAGAIN;
  6676. return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
  6677. }
  6678. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6679. static ssize_t show_rs_window(struct device *d,
  6680. struct device_attribute *attr,
  6681. char *buf)
  6682. {
  6683. struct iwl4965_priv *priv = d->driver_data;
  6684. return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6685. }
  6686. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6687. static ssize_t show_tx_power(struct device *d,
  6688. struct device_attribute *attr, char *buf)
  6689. {
  6690. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6691. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6692. }
  6693. static ssize_t store_tx_power(struct device *d,
  6694. struct device_attribute *attr,
  6695. const char *buf, size_t count)
  6696. {
  6697. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6698. char *p = (char *)buf;
  6699. u32 val;
  6700. val = simple_strtoul(p, &p, 10);
  6701. if (p == buf)
  6702. printk(KERN_INFO DRV_NAME
  6703. ": %s is not in decimal form.\n", buf);
  6704. else
  6705. iwl4965_hw_reg_set_txpower(priv, val);
  6706. return count;
  6707. }
  6708. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6709. static ssize_t show_flags(struct device *d,
  6710. struct device_attribute *attr, char *buf)
  6711. {
  6712. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6713. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  6714. }
  6715. static ssize_t store_flags(struct device *d,
  6716. struct device_attribute *attr,
  6717. const char *buf, size_t count)
  6718. {
  6719. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6720. u32 flags = simple_strtoul(buf, NULL, 0);
  6721. mutex_lock(&priv->mutex);
  6722. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  6723. /* Cancel any currently running scans... */
  6724. if (iwl4965_scan_cancel_timeout(priv, 100))
  6725. IWL_WARNING("Could not cancel scan.\n");
  6726. else {
  6727. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  6728. flags);
  6729. priv->staging_rxon.flags = cpu_to_le32(flags);
  6730. iwl4965_commit_rxon(priv);
  6731. }
  6732. }
  6733. mutex_unlock(&priv->mutex);
  6734. return count;
  6735. }
  6736. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  6737. static ssize_t show_filter_flags(struct device *d,
  6738. struct device_attribute *attr, char *buf)
  6739. {
  6740. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6741. return sprintf(buf, "0x%04X\n",
  6742. le32_to_cpu(priv->active_rxon.filter_flags));
  6743. }
  6744. static ssize_t store_filter_flags(struct device *d,
  6745. struct device_attribute *attr,
  6746. const char *buf, size_t count)
  6747. {
  6748. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6749. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  6750. mutex_lock(&priv->mutex);
  6751. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  6752. /* Cancel any currently running scans... */
  6753. if (iwl4965_scan_cancel_timeout(priv, 100))
  6754. IWL_WARNING("Could not cancel scan.\n");
  6755. else {
  6756. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  6757. "0x%04X\n", filter_flags);
  6758. priv->staging_rxon.filter_flags =
  6759. cpu_to_le32(filter_flags);
  6760. iwl4965_commit_rxon(priv);
  6761. }
  6762. }
  6763. mutex_unlock(&priv->mutex);
  6764. return count;
  6765. }
  6766. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  6767. store_filter_flags);
  6768. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  6769. static ssize_t show_measurement(struct device *d,
  6770. struct device_attribute *attr, char *buf)
  6771. {
  6772. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6773. struct iwl4965_spectrum_notification measure_report;
  6774. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  6775. u8 *data = (u8 *) & measure_report;
  6776. unsigned long flags;
  6777. spin_lock_irqsave(&priv->lock, flags);
  6778. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  6779. spin_unlock_irqrestore(&priv->lock, flags);
  6780. return 0;
  6781. }
  6782. memcpy(&measure_report, &priv->measure_report, size);
  6783. priv->measurement_status = 0;
  6784. spin_unlock_irqrestore(&priv->lock, flags);
  6785. while (size && (PAGE_SIZE - len)) {
  6786. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6787. PAGE_SIZE - len, 1);
  6788. len = strlen(buf);
  6789. if (PAGE_SIZE - len)
  6790. buf[len++] = '\n';
  6791. ofs += 16;
  6792. size -= min(size, 16U);
  6793. }
  6794. return len;
  6795. }
  6796. static ssize_t store_measurement(struct device *d,
  6797. struct device_attribute *attr,
  6798. const char *buf, size_t count)
  6799. {
  6800. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6801. struct ieee80211_measurement_params params = {
  6802. .channel = le16_to_cpu(priv->active_rxon.channel),
  6803. .start_time = cpu_to_le64(priv->last_tsf),
  6804. .duration = cpu_to_le16(1),
  6805. };
  6806. u8 type = IWL_MEASURE_BASIC;
  6807. u8 buffer[32];
  6808. u8 channel;
  6809. if (count) {
  6810. char *p = buffer;
  6811. strncpy(buffer, buf, min(sizeof(buffer), count));
  6812. channel = simple_strtoul(p, NULL, 0);
  6813. if (channel)
  6814. params.channel = channel;
  6815. p = buffer;
  6816. while (*p && *p != ' ')
  6817. p++;
  6818. if (*p)
  6819. type = simple_strtoul(p + 1, NULL, 0);
  6820. }
  6821. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  6822. "channel %d (for '%s')\n", type, params.channel, buf);
  6823. iwl4965_get_measurement(priv, &params, type);
  6824. return count;
  6825. }
  6826. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  6827. show_measurement, store_measurement);
  6828. #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
  6829. static ssize_t store_retry_rate(struct device *d,
  6830. struct device_attribute *attr,
  6831. const char *buf, size_t count)
  6832. {
  6833. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6834. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  6835. if (priv->retry_rate <= 0)
  6836. priv->retry_rate = 1;
  6837. return count;
  6838. }
  6839. static ssize_t show_retry_rate(struct device *d,
  6840. struct device_attribute *attr, char *buf)
  6841. {
  6842. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6843. return sprintf(buf, "%d", priv->retry_rate);
  6844. }
  6845. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  6846. store_retry_rate);
  6847. static ssize_t store_power_level(struct device *d,
  6848. struct device_attribute *attr,
  6849. const char *buf, size_t count)
  6850. {
  6851. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6852. int rc;
  6853. int mode;
  6854. mode = simple_strtoul(buf, NULL, 0);
  6855. mutex_lock(&priv->mutex);
  6856. if (!iwl4965_is_ready(priv)) {
  6857. rc = -EAGAIN;
  6858. goto out;
  6859. }
  6860. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  6861. mode = IWL_POWER_AC;
  6862. else
  6863. mode |= IWL_POWER_ENABLED;
  6864. if (mode != priv->power_mode) {
  6865. rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  6866. if (rc) {
  6867. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  6868. goto out;
  6869. }
  6870. priv->power_mode = mode;
  6871. }
  6872. rc = count;
  6873. out:
  6874. mutex_unlock(&priv->mutex);
  6875. return rc;
  6876. }
  6877. #define MAX_WX_STRING 80
  6878. /* Values are in microsecond */
  6879. static const s32 timeout_duration[] = {
  6880. 350000,
  6881. 250000,
  6882. 75000,
  6883. 37000,
  6884. 25000,
  6885. };
  6886. static const s32 period_duration[] = {
  6887. 400000,
  6888. 700000,
  6889. 1000000,
  6890. 1000000,
  6891. 1000000
  6892. };
  6893. static ssize_t show_power_level(struct device *d,
  6894. struct device_attribute *attr, char *buf)
  6895. {
  6896. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6897. int level = IWL_POWER_LEVEL(priv->power_mode);
  6898. char *p = buf;
  6899. p += sprintf(p, "%d ", level);
  6900. switch (level) {
  6901. case IWL_POWER_MODE_CAM:
  6902. case IWL_POWER_AC:
  6903. p += sprintf(p, "(AC)");
  6904. break;
  6905. case IWL_POWER_BATTERY:
  6906. p += sprintf(p, "(BATTERY)");
  6907. break;
  6908. default:
  6909. p += sprintf(p,
  6910. "(Timeout %dms, Period %dms)",
  6911. timeout_duration[level - 1] / 1000,
  6912. period_duration[level - 1] / 1000);
  6913. }
  6914. if (!(priv->power_mode & IWL_POWER_ENABLED))
  6915. p += sprintf(p, " OFF\n");
  6916. else
  6917. p += sprintf(p, " \n");
  6918. return (p - buf + 1);
  6919. }
  6920. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  6921. store_power_level);
  6922. static ssize_t show_channels(struct device *d,
  6923. struct device_attribute *attr, char *buf)
  6924. {
  6925. /* all this shit doesn't belong into sysfs anyway */
  6926. return 0;
  6927. }
  6928. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  6929. static ssize_t show_statistics(struct device *d,
  6930. struct device_attribute *attr, char *buf)
  6931. {
  6932. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6933. u32 size = sizeof(struct iwl4965_notif_statistics);
  6934. u32 len = 0, ofs = 0;
  6935. u8 *data = (u8 *) & priv->statistics;
  6936. int rc = 0;
  6937. if (!iwl4965_is_alive(priv))
  6938. return -EAGAIN;
  6939. mutex_lock(&priv->mutex);
  6940. rc = iwl4965_send_statistics_request(priv);
  6941. mutex_unlock(&priv->mutex);
  6942. if (rc) {
  6943. len = sprintf(buf,
  6944. "Error sending statistics request: 0x%08X\n", rc);
  6945. return len;
  6946. }
  6947. while (size && (PAGE_SIZE - len)) {
  6948. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6949. PAGE_SIZE - len, 1);
  6950. len = strlen(buf);
  6951. if (PAGE_SIZE - len)
  6952. buf[len++] = '\n';
  6953. ofs += 16;
  6954. size -= min(size, 16U);
  6955. }
  6956. return len;
  6957. }
  6958. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  6959. static ssize_t show_antenna(struct device *d,
  6960. struct device_attribute *attr, char *buf)
  6961. {
  6962. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6963. if (!iwl4965_is_alive(priv))
  6964. return -EAGAIN;
  6965. return sprintf(buf, "%d\n", priv->antenna);
  6966. }
  6967. static ssize_t store_antenna(struct device *d,
  6968. struct device_attribute *attr,
  6969. const char *buf, size_t count)
  6970. {
  6971. int ant;
  6972. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6973. if (count == 0)
  6974. return 0;
  6975. if (sscanf(buf, "%1i", &ant) != 1) {
  6976. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  6977. return count;
  6978. }
  6979. if ((ant >= 0) && (ant <= 2)) {
  6980. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  6981. priv->antenna = (enum iwl4965_antenna)ant;
  6982. } else
  6983. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  6984. return count;
  6985. }
  6986. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  6987. static ssize_t show_status(struct device *d,
  6988. struct device_attribute *attr, char *buf)
  6989. {
  6990. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6991. if (!iwl4965_is_alive(priv))
  6992. return -EAGAIN;
  6993. return sprintf(buf, "0x%08x\n", (int)priv->status);
  6994. }
  6995. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  6996. static ssize_t dump_error_log(struct device *d,
  6997. struct device_attribute *attr,
  6998. const char *buf, size_t count)
  6999. {
  7000. char *p = (char *)buf;
  7001. if (p[0] == '1')
  7002. iwl4965_dump_nic_error_log((struct iwl4965_priv *)d->driver_data);
  7003. return strnlen(buf, count);
  7004. }
  7005. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  7006. static ssize_t dump_event_log(struct device *d,
  7007. struct device_attribute *attr,
  7008. const char *buf, size_t count)
  7009. {
  7010. char *p = (char *)buf;
  7011. if (p[0] == '1')
  7012. iwl4965_dump_nic_event_log((struct iwl4965_priv *)d->driver_data);
  7013. return strnlen(buf, count);
  7014. }
  7015. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  7016. /*****************************************************************************
  7017. *
  7018. * driver setup and teardown
  7019. *
  7020. *****************************************************************************/
  7021. static void iwl4965_setup_deferred_work(struct iwl4965_priv *priv)
  7022. {
  7023. priv->workqueue = create_workqueue(DRV_NAME);
  7024. init_waitqueue_head(&priv->wait_command_queue);
  7025. INIT_WORK(&priv->up, iwl4965_bg_up);
  7026. INIT_WORK(&priv->restart, iwl4965_bg_restart);
  7027. INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
  7028. INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
  7029. INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
  7030. INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
  7031. INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
  7032. INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
  7033. INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
  7034. INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
  7035. INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
  7036. INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
  7037. iwl4965_hw_setup_deferred_work(priv);
  7038. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  7039. iwl4965_irq_tasklet, (unsigned long)priv);
  7040. }
  7041. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv)
  7042. {
  7043. iwl4965_hw_cancel_deferred_work(priv);
  7044. cancel_delayed_work_sync(&priv->init_alive_start);
  7045. cancel_delayed_work(&priv->scan_check);
  7046. cancel_delayed_work(&priv->alive_start);
  7047. cancel_delayed_work(&priv->post_associate);
  7048. cancel_work_sync(&priv->beacon_update);
  7049. }
  7050. static struct attribute *iwl4965_sysfs_entries[] = {
  7051. &dev_attr_antenna.attr,
  7052. &dev_attr_channels.attr,
  7053. &dev_attr_dump_errors.attr,
  7054. &dev_attr_dump_events.attr,
  7055. &dev_attr_flags.attr,
  7056. &dev_attr_filter_flags.attr,
  7057. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  7058. &dev_attr_measurement.attr,
  7059. #endif
  7060. &dev_attr_power_level.attr,
  7061. &dev_attr_retry_rate.attr,
  7062. &dev_attr_rf_kill.attr,
  7063. &dev_attr_rs_window.attr,
  7064. &dev_attr_statistics.attr,
  7065. &dev_attr_status.attr,
  7066. &dev_attr_temperature.attr,
  7067. &dev_attr_tx_power.attr,
  7068. NULL
  7069. };
  7070. static struct attribute_group iwl4965_attribute_group = {
  7071. .name = NULL, /* put in device directory */
  7072. .attrs = iwl4965_sysfs_entries,
  7073. };
  7074. static struct ieee80211_ops iwl4965_hw_ops = {
  7075. .tx = iwl4965_mac_tx,
  7076. .start = iwl4965_mac_start,
  7077. .stop = iwl4965_mac_stop,
  7078. .add_interface = iwl4965_mac_add_interface,
  7079. .remove_interface = iwl4965_mac_remove_interface,
  7080. .config = iwl4965_mac_config,
  7081. .config_interface = iwl4965_mac_config_interface,
  7082. .configure_filter = iwl4965_configure_filter,
  7083. .set_key = iwl4965_mac_set_key,
  7084. .get_stats = iwl4965_mac_get_stats,
  7085. .get_tx_stats = iwl4965_mac_get_tx_stats,
  7086. .conf_tx = iwl4965_mac_conf_tx,
  7087. .get_tsf = iwl4965_mac_get_tsf,
  7088. .reset_tsf = iwl4965_mac_reset_tsf,
  7089. .beacon_update = iwl4965_mac_beacon_update,
  7090. .bss_info_changed = iwl4965_bss_info_changed,
  7091. #ifdef CONFIG_IWL4965_HT
  7092. .conf_ht = iwl4965_mac_conf_ht,
  7093. .ampdu_action = iwl4965_mac_ampdu_action,
  7094. #endif /* CONFIG_IWL4965_HT */
  7095. .hw_scan = iwl4965_mac_hw_scan
  7096. };
  7097. static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  7098. {
  7099. int err = 0;
  7100. struct iwl4965_priv *priv;
  7101. struct ieee80211_hw *hw;
  7102. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  7103. int i;
  7104. DECLARE_MAC_BUF(mac);
  7105. /* Disabling hardware scan means that mac80211 will perform scans
  7106. * "the hard way", rather than using device's scan. */
  7107. if (iwl4965_param_disable_hw_scan) {
  7108. IWL_DEBUG_INFO("Disabling hw_scan\n");
  7109. iwl4965_hw_ops.hw_scan = NULL;
  7110. }
  7111. if ((iwl4965_param_queues_num > IWL_MAX_NUM_QUEUES) ||
  7112. (iwl4965_param_queues_num < IWL_MIN_NUM_QUEUES)) {
  7113. IWL_ERROR("invalid queues_num, should be between %d and %d\n",
  7114. IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
  7115. err = -EINVAL;
  7116. goto out;
  7117. }
  7118. /* mac80211 allocates memory for this device instance, including
  7119. * space for this driver's private structure */
  7120. hw = ieee80211_alloc_hw(sizeof(struct iwl4965_priv), &iwl4965_hw_ops);
  7121. if (hw == NULL) {
  7122. IWL_ERROR("Can not allocate network device\n");
  7123. err = -ENOMEM;
  7124. goto out;
  7125. }
  7126. SET_IEEE80211_DEV(hw, &pdev->dev);
  7127. hw->rate_control_algorithm = "iwl-4965-rs";
  7128. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  7129. priv = hw->priv;
  7130. priv->hw = hw;
  7131. priv->cfg = cfg;
  7132. priv->pci_dev = pdev;
  7133. priv->antenna = (enum iwl4965_antenna)iwl4965_param_antenna;
  7134. #ifdef CONFIG_IWL4965_DEBUG
  7135. iwl4965_debug_level = iwl4965_param_debug;
  7136. atomic_set(&priv->restrict_refcnt, 0);
  7137. #endif
  7138. priv->retry_rate = 1;
  7139. priv->ibss_beacon = NULL;
  7140. /* Tell mac80211 and its clients (e.g. Wireless Extensions)
  7141. * the range of signal quality values that we'll provide.
  7142. * Negative values for level/noise indicate that we'll provide dBm.
  7143. * For WE, at least, non-0 values here *enable* display of values
  7144. * in app (iwconfig). */
  7145. hw->max_rssi = -20; /* signal level, negative indicates dBm */
  7146. hw->max_noise = -20; /* noise level, negative indicates dBm */
  7147. hw->max_signal = 100; /* link quality indication (%) */
  7148. /* Tell mac80211 our Tx characteristics */
  7149. hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
  7150. /* Default value; 4 EDCA QOS priorities */
  7151. hw->queues = 4;
  7152. #ifdef CONFIG_IWL4965_HT
  7153. /* Enhanced value; more queues, to support 11n aggregation */
  7154. hw->queues = 16;
  7155. #endif /* CONFIG_IWL4965_HT */
  7156. spin_lock_init(&priv->lock);
  7157. spin_lock_init(&priv->power_data.lock);
  7158. spin_lock_init(&priv->sta_lock);
  7159. spin_lock_init(&priv->hcmd_lock);
  7160. spin_lock_init(&priv->lq_mngr.lock);
  7161. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
  7162. INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
  7163. INIT_LIST_HEAD(&priv->free_frames);
  7164. mutex_init(&priv->mutex);
  7165. if (pci_enable_device(pdev)) {
  7166. err = -ENODEV;
  7167. goto out_ieee80211_free_hw;
  7168. }
  7169. pci_set_master(pdev);
  7170. /* Clear the driver's (not device's) station table */
  7171. iwl4965_clear_stations_table(priv);
  7172. priv->data_retry_limit = -1;
  7173. priv->ieee_channels = NULL;
  7174. priv->ieee_rates = NULL;
  7175. priv->band = IEEE80211_BAND_2GHZ;
  7176. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  7177. if (!err)
  7178. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  7179. if (err) {
  7180. printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
  7181. goto out_pci_disable_device;
  7182. }
  7183. pci_set_drvdata(pdev, priv);
  7184. err = pci_request_regions(pdev, DRV_NAME);
  7185. if (err)
  7186. goto out_pci_disable_device;
  7187. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  7188. * PCI Tx retries from interfering with C3 CPU state */
  7189. pci_write_config_byte(pdev, 0x41, 0x00);
  7190. priv->hw_base = pci_iomap(pdev, 0, 0);
  7191. if (!priv->hw_base) {
  7192. err = -ENODEV;
  7193. goto out_pci_release_regions;
  7194. }
  7195. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  7196. (unsigned long long) pci_resource_len(pdev, 0));
  7197. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  7198. /* Initialize module parameter values here */
  7199. /* Disable radio (SW RF KILL) via parameter when loading driver */
  7200. if (iwl4965_param_disable) {
  7201. set_bit(STATUS_RF_KILL_SW, &priv->status);
  7202. IWL_DEBUG_INFO("Radio disabled.\n");
  7203. }
  7204. priv->iw_mode = IEEE80211_IF_TYPE_STA;
  7205. priv->ps_mode = 0;
  7206. priv->use_ant_b_for_management_frame = 1; /* start with ant B */
  7207. priv->valid_antenna = 0x7; /* assume all 3 connected */
  7208. priv->ps_mode = IWL_MIMO_PS_NONE;
  7209. /* Choose which receivers/antennas to use */
  7210. iwl4965_set_rxon_chain(priv);
  7211. printk(KERN_INFO DRV_NAME
  7212. ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
  7213. /* Device-specific setup */
  7214. if (iwl4965_hw_set_hw_setting(priv)) {
  7215. IWL_ERROR("failed to set hw settings\n");
  7216. goto out_iounmap;
  7217. }
  7218. if (iwl4965_param_qos_enable)
  7219. priv->qos_data.qos_enable = 1;
  7220. iwl4965_reset_qos(priv);
  7221. priv->qos_data.qos_active = 0;
  7222. priv->qos_data.qos_cap.val = 0;
  7223. iwl4965_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
  7224. iwl4965_setup_deferred_work(priv);
  7225. iwl4965_setup_rx_handlers(priv);
  7226. priv->rates_mask = IWL_RATES_MASK;
  7227. /* If power management is turned on, default to AC mode */
  7228. priv->power_mode = IWL_POWER_AC;
  7229. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  7230. iwl4965_disable_interrupts(priv);
  7231. err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7232. if (err) {
  7233. IWL_ERROR("failed to create sysfs device attributes\n");
  7234. goto out_release_irq;
  7235. }
  7236. /* nic init */
  7237. iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  7238. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  7239. iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  7240. err = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
  7241. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  7242. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  7243. if (err < 0) {
  7244. IWL_DEBUG_INFO("Failed to init the card\n");
  7245. goto out_remove_sysfs;
  7246. }
  7247. /* Read the EEPROM */
  7248. err = iwl4965_eeprom_init(priv);
  7249. if (err) {
  7250. IWL_ERROR("Unable to init EEPROM\n");
  7251. goto out_remove_sysfs;
  7252. }
  7253. /* MAC Address location in EEPROM same for 3945/4965 */
  7254. get_eeprom_mac(priv, priv->mac_addr);
  7255. IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
  7256. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  7257. err = iwl4965_init_channel_map(priv);
  7258. if (err) {
  7259. IWL_ERROR("initializing regulatory failed: %d\n", err);
  7260. goto out_remove_sysfs;
  7261. }
  7262. err = iwl4965_init_geos(priv);
  7263. if (err) {
  7264. IWL_ERROR("initializing geos failed: %d\n", err);
  7265. goto out_free_channel_map;
  7266. }
  7267. iwl4965_rate_control_register(priv->hw);
  7268. err = ieee80211_register_hw(priv->hw);
  7269. if (err) {
  7270. IWL_ERROR("Failed to register network device (error %d)\n", err);
  7271. goto out_free_geos;
  7272. }
  7273. priv->hw->conf.beacon_int = 100;
  7274. priv->mac80211_registered = 1;
  7275. pci_save_state(pdev);
  7276. pci_disable_device(pdev);
  7277. return 0;
  7278. out_free_geos:
  7279. iwl4965_free_geos(priv);
  7280. out_free_channel_map:
  7281. iwl4965_free_channel_map(priv);
  7282. out_remove_sysfs:
  7283. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7284. out_release_irq:
  7285. destroy_workqueue(priv->workqueue);
  7286. priv->workqueue = NULL;
  7287. iwl4965_unset_hw_setting(priv);
  7288. out_iounmap:
  7289. pci_iounmap(pdev, priv->hw_base);
  7290. out_pci_release_regions:
  7291. pci_release_regions(pdev);
  7292. out_pci_disable_device:
  7293. pci_disable_device(pdev);
  7294. pci_set_drvdata(pdev, NULL);
  7295. out_ieee80211_free_hw:
  7296. ieee80211_free_hw(priv->hw);
  7297. out:
  7298. return err;
  7299. }
  7300. static void iwl4965_pci_remove(struct pci_dev *pdev)
  7301. {
  7302. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7303. struct list_head *p, *q;
  7304. int i;
  7305. if (!priv)
  7306. return;
  7307. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  7308. set_bit(STATUS_EXIT_PENDING, &priv->status);
  7309. iwl4965_down(priv);
  7310. /* Free MAC hash list for ADHOC */
  7311. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  7312. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  7313. list_del(p);
  7314. kfree(list_entry(p, struct iwl4965_ibss_seq, list));
  7315. }
  7316. }
  7317. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7318. iwl4965_dealloc_ucode_pci(priv);
  7319. if (priv->rxq.bd)
  7320. iwl4965_rx_queue_free(priv, &priv->rxq);
  7321. iwl4965_hw_txq_ctx_free(priv);
  7322. iwl4965_unset_hw_setting(priv);
  7323. iwl4965_clear_stations_table(priv);
  7324. if (priv->mac80211_registered) {
  7325. ieee80211_unregister_hw(priv->hw);
  7326. iwl4965_rate_control_unregister(priv->hw);
  7327. }
  7328. /*netif_stop_queue(dev); */
  7329. flush_workqueue(priv->workqueue);
  7330. /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
  7331. * priv->workqueue... so we can't take down the workqueue
  7332. * until now... */
  7333. destroy_workqueue(priv->workqueue);
  7334. priv->workqueue = NULL;
  7335. pci_iounmap(pdev, priv->hw_base);
  7336. pci_release_regions(pdev);
  7337. pci_disable_device(pdev);
  7338. pci_set_drvdata(pdev, NULL);
  7339. iwl4965_free_channel_map(priv);
  7340. iwl4965_free_geos(priv);
  7341. if (priv->ibss_beacon)
  7342. dev_kfree_skb(priv->ibss_beacon);
  7343. ieee80211_free_hw(priv->hw);
  7344. }
  7345. #ifdef CONFIG_PM
  7346. static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  7347. {
  7348. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7349. if (priv->is_open) {
  7350. set_bit(STATUS_IN_SUSPEND, &priv->status);
  7351. iwl4965_mac_stop(priv->hw);
  7352. priv->is_open = 1;
  7353. }
  7354. pci_set_power_state(pdev, PCI_D3hot);
  7355. return 0;
  7356. }
  7357. static int iwl4965_pci_resume(struct pci_dev *pdev)
  7358. {
  7359. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7360. pci_set_power_state(pdev, PCI_D0);
  7361. if (priv->is_open)
  7362. iwl4965_mac_start(priv->hw);
  7363. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  7364. return 0;
  7365. }
  7366. #endif /* CONFIG_PM */
  7367. /*****************************************************************************
  7368. *
  7369. * driver and module entry point
  7370. *
  7371. *****************************************************************************/
  7372. static struct pci_driver iwl4965_driver = {
  7373. .name = DRV_NAME,
  7374. .id_table = iwl4965_hw_card_ids,
  7375. .probe = iwl4965_pci_probe,
  7376. .remove = __devexit_p(iwl4965_pci_remove),
  7377. #ifdef CONFIG_PM
  7378. .suspend = iwl4965_pci_suspend,
  7379. .resume = iwl4965_pci_resume,
  7380. #endif
  7381. };
  7382. static int __init iwl4965_init(void)
  7383. {
  7384. int ret;
  7385. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  7386. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  7387. ret = pci_register_driver(&iwl4965_driver);
  7388. if (ret) {
  7389. IWL_ERROR("Unable to initialize PCI module\n");
  7390. return ret;
  7391. }
  7392. #ifdef CONFIG_IWL4965_DEBUG
  7393. ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7394. if (ret) {
  7395. IWL_ERROR("Unable to create driver sysfs file\n");
  7396. pci_unregister_driver(&iwl4965_driver);
  7397. return ret;
  7398. }
  7399. #endif
  7400. return ret;
  7401. }
  7402. static void __exit iwl4965_exit(void)
  7403. {
  7404. #ifdef CONFIG_IWL4965_DEBUG
  7405. driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7406. #endif
  7407. pci_unregister_driver(&iwl4965_driver);
  7408. }
  7409. module_param_named(antenna, iwl4965_param_antenna, int, 0444);
  7410. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  7411. module_param_named(disable, iwl4965_param_disable, int, 0444);
  7412. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  7413. module_param_named(hwcrypto, iwl4965_param_hwcrypto, int, 0444);
  7414. MODULE_PARM_DESC(hwcrypto,
  7415. "using hardware crypto engine (default 0 [software])\n");
  7416. module_param_named(debug, iwl4965_param_debug, int, 0444);
  7417. MODULE_PARM_DESC(debug, "debug output mask");
  7418. module_param_named(disable_hw_scan, iwl4965_param_disable_hw_scan, int, 0444);
  7419. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  7420. module_param_named(queues_num, iwl4965_param_queues_num, int, 0444);
  7421. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  7422. /* QoS */
  7423. module_param_named(qos_enable, iwl4965_param_qos_enable, int, 0444);
  7424. MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
  7425. module_param_named(amsdu_size_8K, iwl4965_param_amsdu_size_8K, int, 0444);
  7426. MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
  7427. module_exit(iwl4965_exit);
  7428. module_init(iwl4965_init);