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@@ -776,7 +776,7 @@ static void hpt366_dma_lost_irq(ide_drive_t *drive)
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pci_read_config_byte(dev, 0x52, &mcr3);
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pci_read_config_byte(dev, 0x5a, &scr1);
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printk("%s: (%s) mcr1=0x%02x, mcr3=0x%02x, scr1=0x%02x\n",
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- drive->name, __FUNCTION__, mcr1, mcr3, scr1);
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+ drive->name, __func__, mcr1, mcr3, scr1);
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if (scr1 & 0x10)
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pci_write_config_byte(dev, 0x5a, scr1 & ~0x10);
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ide_dma_lost_irq(drive);
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@@ -808,7 +808,7 @@ static void hpt370_irq_timeout(ide_drive_t *drive)
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hpt370_clear_engine(drive);
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}
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-static void hpt370_ide_dma_start(ide_drive_t *drive)
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+static void hpt370_dma_start(ide_drive_t *drive)
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{
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#ifdef HPT_RESET_STATE_ENGINE
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hpt370_clear_engine(drive);
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@@ -816,7 +816,7 @@ static void hpt370_ide_dma_start(ide_drive_t *drive)
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ide_dma_start(drive);
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}
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-static int hpt370_ide_dma_end(ide_drive_t *drive)
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+static int hpt370_dma_end(ide_drive_t *drive)
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{
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ide_hwif_t *hwif = HWIF(drive);
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u8 dma_stat = inb(hwif->dma_status);
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@@ -838,7 +838,7 @@ static void hpt370_dma_timeout(ide_drive_t *drive)
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}
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/* returns 1 if DMA IRQ issued, 0 otherwise */
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-static int hpt374_ide_dma_test_irq(ide_drive_t *drive)
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+static int hpt374_dma_test_irq(ide_drive_t *drive)
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{
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ide_hwif_t *hwif = HWIF(drive);
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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@@ -858,11 +858,11 @@ static int hpt374_ide_dma_test_irq(ide_drive_t *drive)
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if (!drive->waiting_for_dma)
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printk(KERN_WARNING "%s: (%s) called while not waiting\n",
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- drive->name, __FUNCTION__);
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+ drive->name, __func__);
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return 0;
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}
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-static int hpt374_ide_dma_end(ide_drive_t *drive)
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+static int hpt374_dma_end(ide_drive_t *drive)
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{
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ide_hwif_t *hwif = HWIF(drive);
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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@@ -1271,17 +1271,6 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
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/* Cache the channel's MISC. control registers' offset */
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hwif->select_data = hwif->channel ? 0x54 : 0x50;
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- hwif->set_pio_mode = &hpt3xx_set_pio_mode;
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- hwif->set_dma_mode = &hpt3xx_set_mode;
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-
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- hwif->quirkproc = &hpt3xx_quirkproc;
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- hwif->maskproc = &hpt3xx_maskproc;
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-
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- hwif->udma_filter = &hpt3xx_udma_filter;
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- hwif->mdma_filter = &hpt3xx_mdma_filter;
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-
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- hwif->cable_detect = hpt3xx_cable_detect;
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-
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/*
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* HPT3xxN chips have some complications:
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*
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@@ -1323,29 +1312,19 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
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if (new_mcr != old_mcr)
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pci_write_config_byte(dev, hwif->select_data + 1, new_mcr);
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-
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- if (hwif->dma_base == 0)
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- return;
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-
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- if (chip_type >= HPT374) {
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- hwif->ide_dma_test_irq = &hpt374_ide_dma_test_irq;
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- hwif->ide_dma_end = &hpt374_ide_dma_end;
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- } else if (chip_type >= HPT370) {
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- hwif->dma_start = &hpt370_ide_dma_start;
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- hwif->ide_dma_end = &hpt370_ide_dma_end;
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- hwif->dma_timeout = &hpt370_dma_timeout;
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- } else
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- hwif->dma_lost_irq = &hpt366_dma_lost_irq;
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}
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-static void __devinit init_dma_hpt366(ide_hwif_t *hwif, unsigned long dmabase)
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+static int __devinit init_dma_hpt366(ide_hwif_t *hwif,
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+ const struct ide_port_info *d)
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{
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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- u8 masterdma = 0, slavedma = 0;
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- u8 dma_new = 0, dma_old = 0;
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- unsigned long flags;
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+ unsigned long flags, base = ide_pci_dma_base(hwif, d);
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+ u8 dma_old, dma_new, masterdma = 0, slavedma = 0;
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- dma_old = inb(dmabase + 2);
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+ if (base == 0 || ide_pci_set_master(dev, d->name) < 0)
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+ return -1;
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+
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+ dma_old = inb(base + 2);
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local_irq_save(flags);
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@@ -1356,11 +1335,21 @@ static void __devinit init_dma_hpt366(ide_hwif_t *hwif, unsigned long dmabase)
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if (masterdma & 0x30) dma_new |= 0x20;
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if ( slavedma & 0x30) dma_new |= 0x40;
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if (dma_new != dma_old)
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- outb(dma_new, dmabase + 2);
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+ outb(dma_new, base + 2);
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local_irq_restore(flags);
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- ide_setup_dma(hwif, dmabase);
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+ printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n",
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+ hwif->name, base, base + 7);
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+
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+ hwif->extra_base = base + (hwif->channel ? 8 : 16);
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+
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+ if (ide_allocate_dma_engine(hwif))
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+ return -1;
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+
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+ ide_setup_dma(hwif, base);
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+
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+ return 0;
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}
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static void __devinit hpt374_init(struct pci_dev *dev, struct pci_dev *dev2)
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@@ -1416,6 +1405,49 @@ static int __devinit hpt36x_init(struct pci_dev *dev, struct pci_dev *dev2)
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IDE_HFLAG_ABUSE_SET_DMA_MODE | \
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IDE_HFLAG_OFF_BOARD)
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+static const struct ide_port_ops hpt3xx_port_ops = {
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+ .set_pio_mode = hpt3xx_set_pio_mode,
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+ .set_dma_mode = hpt3xx_set_mode,
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+ .quirkproc = hpt3xx_quirkproc,
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+ .maskproc = hpt3xx_maskproc,
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+ .mdma_filter = hpt3xx_mdma_filter,
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+ .udma_filter = hpt3xx_udma_filter,
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+ .cable_detect = hpt3xx_cable_detect,
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+};
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+
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+static const struct ide_dma_ops hpt37x_dma_ops = {
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+ .dma_host_set = ide_dma_host_set,
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+ .dma_setup = ide_dma_setup,
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+ .dma_exec_cmd = ide_dma_exec_cmd,
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+ .dma_start = ide_dma_start,
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+ .dma_end = hpt374_dma_end,
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+ .dma_test_irq = hpt374_dma_test_irq,
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+ .dma_lost_irq = ide_dma_lost_irq,
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+ .dma_timeout = ide_dma_timeout,
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+};
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+
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+static const struct ide_dma_ops hpt370_dma_ops = {
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+ .dma_host_set = ide_dma_host_set,
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+ .dma_setup = ide_dma_setup,
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+ .dma_exec_cmd = ide_dma_exec_cmd,
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+ .dma_start = hpt370_dma_start,
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+ .dma_end = hpt370_dma_end,
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+ .dma_test_irq = ide_dma_test_irq,
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+ .dma_lost_irq = ide_dma_lost_irq,
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+ .dma_timeout = hpt370_dma_timeout,
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+};
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+
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+static const struct ide_dma_ops hpt36x_dma_ops = {
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+ .dma_host_set = ide_dma_host_set,
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+ .dma_setup = ide_dma_setup,
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+ .dma_exec_cmd = ide_dma_exec_cmd,
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+ .dma_start = ide_dma_start,
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+ .dma_end = __ide_dma_end,
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+ .dma_test_irq = ide_dma_test_irq,
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+ .dma_lost_irq = hpt366_dma_lost_irq,
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+ .dma_timeout = ide_dma_timeout,
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+};
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+
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static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
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{ /* 0 */
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.name = "HPT36x",
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@@ -1429,7 +1461,8 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
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* Bit 4 is for the primary channel, bit 5 for the secondary.
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*/
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.enablebits = {{0x50,0x10,0x10}, {0x54,0x04,0x04}},
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- .extra = 240,
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+ .port_ops = &hpt3xx_port_ops,
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+ .dma_ops = &hpt36x_dma_ops,
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.host_flags = IDE_HFLAGS_HPT3XX | IDE_HFLAG_SINGLE,
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.pio_mask = ATA_PIO4,
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.mwdma_mask = ATA_MWDMA2,
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@@ -1439,7 +1472,8 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
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.init_hwif = init_hwif_hpt366,
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.init_dma = init_dma_hpt366,
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.enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
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- .extra = 240,
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+ .port_ops = &hpt3xx_port_ops,
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+ .dma_ops = &hpt37x_dma_ops,
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.host_flags = IDE_HFLAGS_HPT3XX,
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.pio_mask = ATA_PIO4,
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.mwdma_mask = ATA_MWDMA2,
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@@ -1449,7 +1483,8 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
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.init_hwif = init_hwif_hpt366,
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.init_dma = init_dma_hpt366,
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.enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
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- .extra = 240,
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+ .port_ops = &hpt3xx_port_ops,
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+ .dma_ops = &hpt37x_dma_ops,
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.host_flags = IDE_HFLAGS_HPT3XX,
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.pio_mask = ATA_PIO4,
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.mwdma_mask = ATA_MWDMA2,
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@@ -1459,7 +1494,8 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
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.init_hwif = init_hwif_hpt366,
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.init_dma = init_dma_hpt366,
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.enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
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- .extra = 240,
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+ .port_ops = &hpt3xx_port_ops,
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+ .dma_ops = &hpt37x_dma_ops,
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.host_flags = IDE_HFLAGS_HPT3XX,
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.pio_mask = ATA_PIO4,
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.mwdma_mask = ATA_MWDMA2,
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@@ -1470,7 +1506,8 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
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.init_dma = init_dma_hpt366,
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.enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
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.udma_mask = ATA_UDMA5,
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- .extra = 240,
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+ .port_ops = &hpt3xx_port_ops,
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+ .dma_ops = &hpt37x_dma_ops,
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.host_flags = IDE_HFLAGS_HPT3XX,
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.pio_mask = ATA_PIO4,
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.mwdma_mask = ATA_MWDMA2,
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@@ -1480,7 +1517,8 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
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.init_hwif = init_hwif_hpt366,
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.init_dma = init_dma_hpt366,
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.enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
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- .extra = 240,
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+ .port_ops = &hpt3xx_port_ops,
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+ .dma_ops = &hpt37x_dma_ops,
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.host_flags = IDE_HFLAGS_HPT3XX,
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.pio_mask = ATA_PIO4,
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.mwdma_mask = ATA_MWDMA2,
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@@ -1543,6 +1581,10 @@ static int __devinit hpt366_init_one(struct pci_dev *dev, const struct pci_devic
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d.name = info->chip_name;
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d.udma_mask = info->udma_mask;
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+ /* fixup ->dma_ops for HPT370/HPT370A */
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+ if (info == &hpt370 || info == &hpt370a)
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+ d.dma_ops = &hpt370_dma_ops;
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+
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pci_set_drvdata(dev, (void *)info);
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if (info == &hpt36x || info == &hpt374)
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