cmd640.c 24 KB

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  1. /*
  2. * Copyright (C) 1995-1996 Linus Torvalds & authors (see below)
  3. */
  4. /*
  5. * Original authors: abramov@cecmow.enet.dec.com (Igor Abramov)
  6. * mlord@pobox.com (Mark Lord)
  7. *
  8. * See linux/MAINTAINERS for address of current maintainer.
  9. *
  10. * This file provides support for the advanced features and bugs
  11. * of IDE interfaces using the CMD Technologies 0640 IDE interface chip.
  12. *
  13. * These chips are basically fucked by design, and getting this driver
  14. * to work on every motherboard design that uses this screwed chip seems
  15. * bloody well impossible. However, we're still trying.
  16. *
  17. * Version 0.97 worked for everybody.
  18. *
  19. * User feedback is essential. Many thanks to the beta test team:
  20. *
  21. * A.Hartgers@stud.tue.nl, JZDQC@CUNYVM.CUNY.edu, abramov@cecmow.enet.dec.com,
  22. * bardj@utopia.ppp.sn.no, bart@gaga.tue.nl, bbol001@cs.auckland.ac.nz,
  23. * chrisc@dbass.demon.co.uk, dalecki@namu26.Num.Math.Uni-Goettingen.de,
  24. * derekn@vw.ece.cmu.edu, florian@btp2x3.phy.uni-bayreuth.de,
  25. * flynn@dei.unipd.it, gadio@netvision.net.il, godzilla@futuris.net,
  26. * j@pobox.com, jkemp1@mises.uni-paderborn.de, jtoppe@hiwaay.net,
  27. * kerouac@ssnet.com, meskes@informatik.rwth-aachen.de, hzoli@cs.elte.hu,
  28. * peter@udgaard.isgtec.com, phil@tazenda.demon.co.uk, roadcapw@cfw.com,
  29. * s0033las@sun10.vsz.bme.hu, schaffer@tam.cornell.edu, sjd@slip.net,
  30. * steve@ei.org, ulrpeg@bigcomm.gun.de, ism@tardis.ed.ac.uk, mack@cray.com
  31. * liug@mama.indstate.edu, and others.
  32. *
  33. * Version 0.01 Initial version, hacked out of ide.c,
  34. * and #include'd rather than compiled separately.
  35. * This will get cleaned up in a subsequent release.
  36. *
  37. * Version 0.02 Fixes for vlb initialization code, enable prefetch
  38. * for versions 'B' and 'C' of chip by default,
  39. * some code cleanup.
  40. *
  41. * Version 0.03 Added reset of secondary interface,
  42. * and black list for devices which are not compatible
  43. * with prefetch mode. Separate function for setting
  44. * prefetch is added, possibly it will be called some
  45. * day from ioctl processing code.
  46. *
  47. * Version 0.04 Now configs/compiles separate from ide.c
  48. *
  49. * Version 0.05 Major rewrite of interface timing code.
  50. * Added new function cmd640_set_mode to set PIO mode
  51. * from ioctl call. New drives added to black list.
  52. *
  53. * Version 0.06 More code cleanup. Prefetch is enabled only for
  54. * detected hard drives, not included in prefetch
  55. * black list.
  56. *
  57. * Version 0.07 Changed to more conservative drive tuning policy.
  58. * Unknown drives, which report PIO < 4 are set to
  59. * (reported_PIO - 1) if it is supported, or to PIO0.
  60. * List of known drives extended by info provided by
  61. * CMD at their ftp site.
  62. *
  63. * Version 0.08 Added autotune/noautotune support.
  64. *
  65. * Version 0.09 Try to be smarter about 2nd port enabling.
  66. * Version 0.10 Be nice and don't reset 2nd port.
  67. * Version 0.11 Try to handle more weird situations.
  68. *
  69. * Version 0.12 Lots of bug fixes from Laszlo Peter
  70. * irq unmasking disabled for reliability.
  71. * try to be even smarter about the second port.
  72. * tidy up source code formatting.
  73. * Version 0.13 permit irq unmasking again.
  74. * Version 0.90 massive code cleanup, some bugs fixed.
  75. * defaults all drives to PIO mode0, prefetch off.
  76. * autotune is OFF by default, with compile time flag.
  77. * prefetch can be turned OFF/ON using "hdparm -p8/-p9"
  78. * (requires hdparm-3.1 or newer)
  79. * Version 0.91 first release to linux-kernel list.
  80. * Version 0.92 move initial reg dump to separate callable function
  81. * change "readahead" to "prefetch" to avoid confusion
  82. * Version 0.95 respect original BIOS timings unless autotuning.
  83. * tons of code cleanup and rearrangement.
  84. * added CONFIG_BLK_DEV_CMD640_ENHANCED option
  85. * prevent use of unmask when prefetch is on
  86. * Version 0.96 prevent use of io_32bit when prefetch is off
  87. * Version 0.97 fix VLB secondary interface for sjd@slip.net
  88. * other minor tune-ups: 0.96 was very good.
  89. * Version 0.98 ignore PCI version when disabled by BIOS
  90. * Version 0.99 display setup/active/recovery clocks with PIO mode
  91. * Version 1.00 Mmm.. cannot depend on PCMD_ENA in all systems
  92. * Version 1.01 slow/fast devsel can be selected with "hdparm -p6/-p7"
  93. * ("fast" is necessary for 32bit I/O in some systems)
  94. * Version 1.02 fix bug that resulted in slow "setup times"
  95. * (patch courtesy of Zoltan Hidvegi)
  96. */
  97. #define CMD640_PREFETCH_MASKS 1
  98. /*#define CMD640_DUMP_REGS */
  99. #include <linux/types.h>
  100. #include <linux/kernel.h>
  101. #include <linux/delay.h>
  102. #include <linux/hdreg.h>
  103. #include <linux/ide.h>
  104. #include <linux/init.h>
  105. #include <asm/io.h>
  106. #define DRV_NAME "cmd640"
  107. /*
  108. * This flag is set in ide.c by the parameter: ide0=cmd640_vlb
  109. */
  110. int cmd640_vlb;
  111. /*
  112. * CMD640 specific registers definition.
  113. */
  114. #define VID 0x00
  115. #define DID 0x02
  116. #define PCMD 0x04
  117. #define PCMD_ENA 0x01
  118. #define PSTTS 0x06
  119. #define REVID 0x08
  120. #define PROGIF 0x09
  121. #define SUBCL 0x0a
  122. #define BASCL 0x0b
  123. #define BaseA0 0x10
  124. #define BaseA1 0x14
  125. #define BaseA2 0x18
  126. #define BaseA3 0x1c
  127. #define INTLINE 0x3c
  128. #define INPINE 0x3d
  129. #define CFR 0x50
  130. #define CFR_DEVREV 0x03
  131. #define CFR_IDE01INTR 0x04
  132. #define CFR_DEVID 0x18
  133. #define CFR_AT_VESA_078h 0x20
  134. #define CFR_DSA1 0x40
  135. #define CFR_DSA0 0x80
  136. #define CNTRL 0x51
  137. #define CNTRL_DIS_RA0 0x40
  138. #define CNTRL_DIS_RA1 0x80
  139. #define CNTRL_ENA_2ND 0x08
  140. #define CMDTIM 0x52
  141. #define ARTTIM0 0x53
  142. #define DRWTIM0 0x54
  143. #define ARTTIM1 0x55
  144. #define DRWTIM1 0x56
  145. #define ARTTIM23 0x57
  146. #define ARTTIM23_DIS_RA2 0x04
  147. #define ARTTIM23_DIS_RA3 0x08
  148. #define DRWTIM23 0x58
  149. #define BRST 0x59
  150. /*
  151. * Registers and masks for easy access by drive index:
  152. */
  153. static u8 prefetch_regs[4] = {CNTRL, CNTRL, ARTTIM23, ARTTIM23};
  154. static u8 prefetch_masks[4] = {CNTRL_DIS_RA0, CNTRL_DIS_RA1, ARTTIM23_DIS_RA2, ARTTIM23_DIS_RA3};
  155. #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
  156. static u8 arttim_regs[4] = {ARTTIM0, ARTTIM1, ARTTIM23, ARTTIM23};
  157. static u8 drwtim_regs[4] = {DRWTIM0, DRWTIM1, DRWTIM23, DRWTIM23};
  158. /*
  159. * Current cmd640 timing values for each drive.
  160. * The defaults for each are the slowest possible timings.
  161. */
  162. static u8 setup_counts[4] = {4, 4, 4, 4}; /* Address setup count (in clocks) */
  163. static u8 active_counts[4] = {16, 16, 16, 16}; /* Active count (encoded) */
  164. static u8 recovery_counts[4] = {16, 16, 16, 16}; /* Recovery count (encoded) */
  165. #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
  166. static DEFINE_SPINLOCK(cmd640_lock);
  167. /*
  168. * These are initialized to point at the devices we control
  169. */
  170. static ide_hwif_t *cmd_hwif0, *cmd_hwif1;
  171. /*
  172. * Interface to access cmd640x registers
  173. */
  174. static unsigned int cmd640_key;
  175. static void (*__put_cmd640_reg)(u16 reg, u8 val);
  176. static u8 (*__get_cmd640_reg)(u16 reg);
  177. /*
  178. * This is read from the CFR reg, and is used in several places.
  179. */
  180. static unsigned int cmd640_chip_version;
  181. /*
  182. * The CMD640x chip does not support DWORD config write cycles, but some
  183. * of the BIOSes use them to implement the config services.
  184. * Therefore, we must use direct IO instead.
  185. */
  186. /* PCI method 1 access */
  187. static void put_cmd640_reg_pci1(u16 reg, u8 val)
  188. {
  189. outl_p((reg & 0xfc) | cmd640_key, 0xcf8);
  190. outb_p(val, (reg & 3) | 0xcfc);
  191. }
  192. static u8 get_cmd640_reg_pci1(u16 reg)
  193. {
  194. outl_p((reg & 0xfc) | cmd640_key, 0xcf8);
  195. return inb_p((reg & 3) | 0xcfc);
  196. }
  197. /* PCI method 2 access (from CMD datasheet) */
  198. static void put_cmd640_reg_pci2(u16 reg, u8 val)
  199. {
  200. outb_p(0x10, 0xcf8);
  201. outb_p(val, cmd640_key + reg);
  202. outb_p(0, 0xcf8);
  203. }
  204. static u8 get_cmd640_reg_pci2(u16 reg)
  205. {
  206. u8 b;
  207. outb_p(0x10, 0xcf8);
  208. b = inb_p(cmd640_key + reg);
  209. outb_p(0, 0xcf8);
  210. return b;
  211. }
  212. /* VLB access */
  213. static void put_cmd640_reg_vlb(u16 reg, u8 val)
  214. {
  215. outb_p(reg, cmd640_key);
  216. outb_p(val, cmd640_key + 4);
  217. }
  218. static u8 get_cmd640_reg_vlb(u16 reg)
  219. {
  220. outb_p(reg, cmd640_key);
  221. return inb_p(cmd640_key + 4);
  222. }
  223. static u8 get_cmd640_reg(u16 reg)
  224. {
  225. unsigned long flags;
  226. u8 b;
  227. spin_lock_irqsave(&cmd640_lock, flags);
  228. b = __get_cmd640_reg(reg);
  229. spin_unlock_irqrestore(&cmd640_lock, flags);
  230. return b;
  231. }
  232. static void put_cmd640_reg(u16 reg, u8 val)
  233. {
  234. unsigned long flags;
  235. spin_lock_irqsave(&cmd640_lock, flags);
  236. __put_cmd640_reg(reg, val);
  237. spin_unlock_irqrestore(&cmd640_lock, flags);
  238. }
  239. static int __init match_pci_cmd640_device(void)
  240. {
  241. const u8 ven_dev[4] = {0x95, 0x10, 0x40, 0x06};
  242. unsigned int i;
  243. for (i = 0; i < 4; i++) {
  244. if (get_cmd640_reg(i) != ven_dev[i])
  245. return 0;
  246. }
  247. #ifdef STUPIDLY_TRUST_BROKEN_PCMD_ENA_BIT
  248. if ((get_cmd640_reg(PCMD) & PCMD_ENA) == 0) {
  249. printk("ide: cmd640 on PCI disabled by BIOS\n");
  250. return 0;
  251. }
  252. #endif /* STUPIDLY_TRUST_BROKEN_PCMD_ENA_BIT */
  253. return 1; /* success */
  254. }
  255. /*
  256. * Probe for CMD640x -- pci method 1
  257. */
  258. static int __init probe_for_cmd640_pci1(void)
  259. {
  260. __get_cmd640_reg = get_cmd640_reg_pci1;
  261. __put_cmd640_reg = put_cmd640_reg_pci1;
  262. for (cmd640_key = 0x80000000;
  263. cmd640_key <= 0x8000f800;
  264. cmd640_key += 0x800) {
  265. if (match_pci_cmd640_device())
  266. return 1; /* success */
  267. }
  268. return 0;
  269. }
  270. /*
  271. * Probe for CMD640x -- pci method 2
  272. */
  273. static int __init probe_for_cmd640_pci2(void)
  274. {
  275. __get_cmd640_reg = get_cmd640_reg_pci2;
  276. __put_cmd640_reg = put_cmd640_reg_pci2;
  277. for (cmd640_key = 0xc000; cmd640_key <= 0xcf00; cmd640_key += 0x100) {
  278. if (match_pci_cmd640_device())
  279. return 1; /* success */
  280. }
  281. return 0;
  282. }
  283. /*
  284. * Probe for CMD640x -- vlb
  285. */
  286. static int __init probe_for_cmd640_vlb(void)
  287. {
  288. u8 b;
  289. __get_cmd640_reg = get_cmd640_reg_vlb;
  290. __put_cmd640_reg = put_cmd640_reg_vlb;
  291. cmd640_key = 0x178;
  292. b = get_cmd640_reg(CFR);
  293. if (b == 0xff || b == 0x00 || (b & CFR_AT_VESA_078h)) {
  294. cmd640_key = 0x78;
  295. b = get_cmd640_reg(CFR);
  296. if (b == 0xff || b == 0x00 || !(b & CFR_AT_VESA_078h))
  297. return 0;
  298. }
  299. return 1; /* success */
  300. }
  301. /*
  302. * Returns 1 if an IDE interface/drive exists at 0x170,
  303. * Returns 0 otherwise.
  304. */
  305. static int __init secondary_port_responding(void)
  306. {
  307. unsigned long flags;
  308. spin_lock_irqsave(&cmd640_lock, flags);
  309. outb_p(0x0a, 0x170 + IDE_SELECT_OFFSET); /* select drive0 */
  310. udelay(100);
  311. if ((inb_p(0x170 + IDE_SELECT_OFFSET) & 0x1f) != 0x0a) {
  312. outb_p(0x1a, 0x170 + IDE_SELECT_OFFSET); /* select drive1 */
  313. udelay(100);
  314. if ((inb_p(0x170 + IDE_SELECT_OFFSET) & 0x1f) != 0x1a) {
  315. spin_unlock_irqrestore(&cmd640_lock, flags);
  316. return 0; /* nothing responded */
  317. }
  318. }
  319. spin_unlock_irqrestore(&cmd640_lock, flags);
  320. return 1; /* success */
  321. }
  322. #ifdef CMD640_DUMP_REGS
  323. /*
  324. * Dump out all cmd640 registers. May be called from ide.c
  325. */
  326. static void cmd640_dump_regs(void)
  327. {
  328. unsigned int reg = cmd640_vlb ? 0x50 : 0x00;
  329. /* Dump current state of chip registers */
  330. printk("ide: cmd640 internal register dump:");
  331. for (; reg <= 0x59; reg++) {
  332. if (!(reg & 0x0f))
  333. printk("\n%04x:", reg);
  334. printk(" %02x", get_cmd640_reg(reg));
  335. }
  336. printk("\n");
  337. }
  338. #endif
  339. /*
  340. * Check whether prefetch is on for a drive,
  341. * and initialize the unmask flags for safe operation.
  342. */
  343. static void __init check_prefetch(ide_drive_t *drive, unsigned int index)
  344. {
  345. u8 b = get_cmd640_reg(prefetch_regs[index]);
  346. if (b & prefetch_masks[index]) { /* is prefetch off? */
  347. drive->no_unmask = 0;
  348. drive->no_io_32bit = 1;
  349. drive->io_32bit = 0;
  350. } else {
  351. #if CMD640_PREFETCH_MASKS
  352. drive->no_unmask = 1;
  353. drive->unmask = 0;
  354. #endif
  355. drive->no_io_32bit = 0;
  356. }
  357. }
  358. #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
  359. /*
  360. * Sets prefetch mode for a drive.
  361. */
  362. static void set_prefetch_mode(ide_drive_t *drive, unsigned int index, int mode)
  363. {
  364. unsigned long flags;
  365. int reg = prefetch_regs[index];
  366. u8 b;
  367. spin_lock_irqsave(&cmd640_lock, flags);
  368. b = __get_cmd640_reg(reg);
  369. if (mode) { /* want prefetch on? */
  370. #if CMD640_PREFETCH_MASKS
  371. drive->no_unmask = 1;
  372. drive->unmask = 0;
  373. #endif
  374. drive->no_io_32bit = 0;
  375. b &= ~prefetch_masks[index]; /* enable prefetch */
  376. } else {
  377. drive->no_unmask = 0;
  378. drive->no_io_32bit = 1;
  379. drive->io_32bit = 0;
  380. b |= prefetch_masks[index]; /* disable prefetch */
  381. }
  382. __put_cmd640_reg(reg, b);
  383. spin_unlock_irqrestore(&cmd640_lock, flags);
  384. }
  385. /*
  386. * Dump out current drive clocks settings
  387. */
  388. static void display_clocks(unsigned int index)
  389. {
  390. u8 active_count, recovery_count;
  391. active_count = active_counts[index];
  392. if (active_count == 1)
  393. ++active_count;
  394. recovery_count = recovery_counts[index];
  395. if (active_count > 3 && recovery_count == 1)
  396. ++recovery_count;
  397. if (cmd640_chip_version > 1)
  398. recovery_count += 1; /* cmd640b uses (count + 1)*/
  399. printk(", clocks=%d/%d/%d\n", setup_counts[index], active_count, recovery_count);
  400. }
  401. /*
  402. * Pack active and recovery counts into single byte representation
  403. * used by controller
  404. */
  405. static inline u8 pack_nibbles(u8 upper, u8 lower)
  406. {
  407. return ((upper & 0x0f) << 4) | (lower & 0x0f);
  408. }
  409. /*
  410. * This routine retrieves the initial drive timings from the chipset.
  411. */
  412. static void __init retrieve_drive_counts(unsigned int index)
  413. {
  414. u8 b;
  415. /*
  416. * Get the internal setup timing, and convert to clock count
  417. */
  418. b = get_cmd640_reg(arttim_regs[index]) & ~0x3f;
  419. switch (b) {
  420. case 0x00: b = 4; break;
  421. case 0x80: b = 3; break;
  422. case 0x40: b = 2; break;
  423. default: b = 5; break;
  424. }
  425. setup_counts[index] = b;
  426. /*
  427. * Get the active/recovery counts
  428. */
  429. b = get_cmd640_reg(drwtim_regs[index]);
  430. active_counts[index] = (b >> 4) ? (b >> 4) : 0x10;
  431. recovery_counts[index] = (b & 0x0f) ? (b & 0x0f) : 0x10;
  432. }
  433. /*
  434. * This routine writes the prepared setup/active/recovery counts
  435. * for a drive into the cmd640 chipset registers to active them.
  436. */
  437. static void program_drive_counts(ide_drive_t *drive, unsigned int index)
  438. {
  439. unsigned long flags;
  440. u8 setup_count = setup_counts[index];
  441. u8 active_count = active_counts[index];
  442. u8 recovery_count = recovery_counts[index];
  443. /*
  444. * Set up address setup count and drive read/write timing registers.
  445. * Primary interface has individual count/timing registers for
  446. * each drive. Secondary interface has one common set of registers,
  447. * so we merge the timings, using the slowest value for each timing.
  448. */
  449. if (index > 1) {
  450. ide_hwif_t *hwif = drive->hwif;
  451. ide_drive_t *peer = &hwif->drives[!drive->select.b.unit];
  452. unsigned int mate = index ^ 1;
  453. if (peer->present) {
  454. if (setup_count < setup_counts[mate])
  455. setup_count = setup_counts[mate];
  456. if (active_count < active_counts[mate])
  457. active_count = active_counts[mate];
  458. if (recovery_count < recovery_counts[mate])
  459. recovery_count = recovery_counts[mate];
  460. }
  461. }
  462. /*
  463. * Convert setup_count to internal chipset representation
  464. */
  465. switch (setup_count) {
  466. case 4: setup_count = 0x00; break;
  467. case 3: setup_count = 0x80; break;
  468. case 1:
  469. case 2: setup_count = 0x40; break;
  470. default: setup_count = 0xc0; /* case 5 */
  471. }
  472. /*
  473. * Now that everything is ready, program the new timings
  474. */
  475. spin_lock_irqsave(&cmd640_lock, flags);
  476. /*
  477. * Program the address_setup clocks into ARTTIM reg,
  478. * and then the active/recovery counts into the DRWTIM reg
  479. * (this converts counts of 16 into counts of zero -- okay).
  480. */
  481. setup_count |= __get_cmd640_reg(arttim_regs[index]) & 0x3f;
  482. __put_cmd640_reg(arttim_regs[index], setup_count);
  483. __put_cmd640_reg(drwtim_regs[index], pack_nibbles(active_count, recovery_count));
  484. spin_unlock_irqrestore(&cmd640_lock, flags);
  485. }
  486. /*
  487. * Set a specific pio_mode for a drive
  488. */
  489. static void cmd640_set_mode(ide_drive_t *drive, unsigned int index,
  490. u8 pio_mode, unsigned int cycle_time)
  491. {
  492. int setup_time, active_time, recovery_time, clock_time;
  493. u8 setup_count, active_count, recovery_count, recovery_count2, cycle_count;
  494. int bus_speed = system_bus_clock();
  495. if (pio_mode > 5)
  496. pio_mode = 5;
  497. setup_time = ide_pio_timings[pio_mode].setup_time;
  498. active_time = ide_pio_timings[pio_mode].active_time;
  499. recovery_time = cycle_time - (setup_time + active_time);
  500. clock_time = 1000 / bus_speed;
  501. cycle_count = DIV_ROUND_UP(cycle_time, clock_time);
  502. setup_count = DIV_ROUND_UP(setup_time, clock_time);
  503. active_count = DIV_ROUND_UP(active_time, clock_time);
  504. if (active_count < 2)
  505. active_count = 2; /* minimum allowed by cmd640 */
  506. recovery_count = DIV_ROUND_UP(recovery_time, clock_time);
  507. recovery_count2 = cycle_count - (setup_count + active_count);
  508. if (recovery_count2 > recovery_count)
  509. recovery_count = recovery_count2;
  510. if (recovery_count < 2)
  511. recovery_count = 2; /* minimum allowed by cmd640 */
  512. if (recovery_count > 17) {
  513. active_count += recovery_count - 17;
  514. recovery_count = 17;
  515. }
  516. if (active_count > 16)
  517. active_count = 16; /* maximum allowed by cmd640 */
  518. if (cmd640_chip_version > 1)
  519. recovery_count -= 1; /* cmd640b uses (count + 1)*/
  520. if (recovery_count > 16)
  521. recovery_count = 16; /* maximum allowed by cmd640 */
  522. setup_counts[index] = setup_count;
  523. active_counts[index] = active_count;
  524. recovery_counts[index] = recovery_count;
  525. /*
  526. * In a perfect world, we might set the drive pio mode here
  527. * (using WIN_SETFEATURE) before continuing.
  528. *
  529. * But we do not, because:
  530. * 1) this is the wrong place to do it (proper is do_special() in ide.c)
  531. * 2) in practice this is rarely, if ever, necessary
  532. */
  533. program_drive_counts(drive, index);
  534. }
  535. static void cmd640_set_pio_mode(ide_drive_t *drive, const u8 pio)
  536. {
  537. unsigned int index = 0, cycle_time;
  538. u8 b;
  539. switch (pio) {
  540. case 6: /* set fast-devsel off */
  541. case 7: /* set fast-devsel on */
  542. b = get_cmd640_reg(CNTRL) & ~0x27;
  543. if (pio & 1)
  544. b |= 0x27;
  545. put_cmd640_reg(CNTRL, b);
  546. printk("%s: %sabled cmd640 fast host timing (devsel)\n",
  547. drive->name, (pio & 1) ? "en" : "dis");
  548. return;
  549. case 8: /* set prefetch off */
  550. case 9: /* set prefetch on */
  551. set_prefetch_mode(drive, index, pio & 1);
  552. printk("%s: %sabled cmd640 prefetch\n",
  553. drive->name, (pio & 1) ? "en" : "dis");
  554. return;
  555. }
  556. cycle_time = ide_pio_cycle_time(drive, pio);
  557. cmd640_set_mode(drive, index, pio, cycle_time);
  558. printk("%s: selected cmd640 PIO mode%d (%dns)",
  559. drive->name, pio, cycle_time);
  560. display_clocks(index);
  561. }
  562. static const struct ide_port_ops cmd640_port_ops = {
  563. .set_pio_mode = cmd640_set_pio_mode,
  564. };
  565. #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
  566. static int pci_conf1(void)
  567. {
  568. unsigned long flags;
  569. u32 tmp;
  570. spin_lock_irqsave(&cmd640_lock, flags);
  571. outb(0x01, 0xCFB);
  572. tmp = inl(0xCF8);
  573. outl(0x80000000, 0xCF8);
  574. if (inl(0xCF8) == 0x80000000) {
  575. outl(tmp, 0xCF8);
  576. spin_unlock_irqrestore(&cmd640_lock, flags);
  577. return 1;
  578. }
  579. outl(tmp, 0xCF8);
  580. spin_unlock_irqrestore(&cmd640_lock, flags);
  581. return 0;
  582. }
  583. static int pci_conf2(void)
  584. {
  585. unsigned long flags;
  586. spin_lock_irqsave(&cmd640_lock, flags);
  587. outb(0x00, 0xCFB);
  588. outb(0x00, 0xCF8);
  589. outb(0x00, 0xCFA);
  590. if (inb(0xCF8) == 0x00 && inb(0xCF8) == 0x00) {
  591. spin_unlock_irqrestore(&cmd640_lock, flags);
  592. return 1;
  593. }
  594. spin_unlock_irqrestore(&cmd640_lock, flags);
  595. return 0;
  596. }
  597. static const struct ide_port_info cmd640_port_info __initdata = {
  598. .chipset = ide_cmd640,
  599. .host_flags = IDE_HFLAG_SERIALIZE |
  600. IDE_HFLAG_NO_DMA |
  601. IDE_HFLAG_NO_AUTOTUNE |
  602. IDE_HFLAG_ABUSE_PREFETCH |
  603. IDE_HFLAG_ABUSE_FAST_DEVSEL,
  604. #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
  605. .port_ops = &cmd640_port_ops,
  606. .pio_mask = ATA_PIO5,
  607. #endif
  608. };
  609. static int cmd640x_init_one(unsigned long base, unsigned long ctl)
  610. {
  611. if (!request_region(base, 8, DRV_NAME)) {
  612. printk(KERN_ERR "%s: I/O resource 0x%lX-0x%lX not free.\n",
  613. DRV_NAME, base, base + 7);
  614. return -EBUSY;
  615. }
  616. if (!request_region(ctl, 1, DRV_NAME)) {
  617. printk(KERN_ERR "%s: I/O resource 0x%lX not free.\n",
  618. DRV_NAME, ctl);
  619. release_region(base, 8);
  620. return -EBUSY;
  621. }
  622. return 0;
  623. }
  624. /*
  625. * Probe for a cmd640 chipset, and initialize it if found.
  626. */
  627. static int __init cmd640x_init(void)
  628. {
  629. #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
  630. int second_port_toggled = 0;
  631. #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
  632. int second_port_cmd640 = 0, rc;
  633. const char *bus_type, *port2;
  634. unsigned int index;
  635. u8 b, cfr;
  636. u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
  637. hw_regs_t hw[2];
  638. if (cmd640_vlb && probe_for_cmd640_vlb()) {
  639. bus_type = "VLB";
  640. } else {
  641. cmd640_vlb = 0;
  642. /* Find out what kind of PCI probing is supported otherwise
  643. Justin Gibbs will sulk.. */
  644. if (pci_conf1() && probe_for_cmd640_pci1())
  645. bus_type = "PCI (type1)";
  646. else if (pci_conf2() && probe_for_cmd640_pci2())
  647. bus_type = "PCI (type2)";
  648. else
  649. return 0;
  650. }
  651. /*
  652. * Undocumented magic (there is no 0x5b reg in specs)
  653. */
  654. put_cmd640_reg(0x5b, 0xbd);
  655. if (get_cmd640_reg(0x5b) != 0xbd) {
  656. printk(KERN_ERR "ide: cmd640 init failed: wrong value in reg 0x5b\n");
  657. return 0;
  658. }
  659. put_cmd640_reg(0x5b, 0);
  660. #ifdef CMD640_DUMP_REGS
  661. cmd640_dump_regs();
  662. #endif
  663. /*
  664. * Documented magic begins here
  665. */
  666. cfr = get_cmd640_reg(CFR);
  667. cmd640_chip_version = cfr & CFR_DEVREV;
  668. if (cmd640_chip_version == 0) {
  669. printk("ide: bad cmd640 revision: %d\n", cmd640_chip_version);
  670. return 0;
  671. }
  672. rc = cmd640x_init_one(0x1f0, 0x3f6);
  673. if (rc)
  674. return rc;
  675. rc = cmd640x_init_one(0x170, 0x376);
  676. if (rc) {
  677. release_region(0x3f6, 1);
  678. release_region(0x1f0, 8);
  679. return rc;
  680. }
  681. memset(&hw, 0, sizeof(hw));
  682. ide_std_init_ports(&hw[0], 0x1f0, 0x3f6);
  683. hw[0].irq = 14;
  684. ide_std_init_ports(&hw[1], 0x170, 0x376);
  685. hw[1].irq = 15;
  686. printk(KERN_INFO "cmd640: buggy cmd640%c interface on %s, config=0x%02x"
  687. "\n", 'a' + cmd640_chip_version - 1, bus_type, cfr);
  688. cmd_hwif0 = ide_find_port();
  689. /*
  690. * Initialize data for primary port
  691. */
  692. if (cmd_hwif0) {
  693. ide_init_port_hw(cmd_hwif0, &hw[0]);
  694. idx[0] = cmd_hwif0->index;
  695. }
  696. /*
  697. * Ensure compatibility by always using the slowest timings
  698. * for access to the drive's command register block,
  699. * and reset the prefetch burstsize to default (512 bytes).
  700. *
  701. * Maybe we need a way to NOT do these on *some* systems?
  702. */
  703. put_cmd640_reg(CMDTIM, 0);
  704. put_cmd640_reg(BRST, 0x40);
  705. cmd_hwif1 = ide_find_port();
  706. /*
  707. * Try to enable the secondary interface, if not already enabled
  708. */
  709. if (cmd_hwif1 &&
  710. cmd_hwif1->drives[0].noprobe && cmd_hwif1->drives[1].noprobe) {
  711. port2 = "not probed";
  712. } else {
  713. b = get_cmd640_reg(CNTRL);
  714. if (secondary_port_responding()) {
  715. if ((b & CNTRL_ENA_2ND)) {
  716. second_port_cmd640 = 1;
  717. port2 = "okay";
  718. } else if (cmd640_vlb) {
  719. second_port_cmd640 = 1;
  720. port2 = "alive";
  721. } else
  722. port2 = "not cmd640";
  723. } else {
  724. put_cmd640_reg(CNTRL, b ^ CNTRL_ENA_2ND); /* toggle the bit */
  725. if (secondary_port_responding()) {
  726. second_port_cmd640 = 1;
  727. #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
  728. second_port_toggled = 1;
  729. #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
  730. port2 = "enabled";
  731. } else {
  732. put_cmd640_reg(CNTRL, b); /* restore original setting */
  733. port2 = "not responding";
  734. }
  735. }
  736. }
  737. /*
  738. * Initialize data for secondary cmd640 port, if enabled
  739. */
  740. if (second_port_cmd640 && cmd_hwif1) {
  741. ide_init_port_hw(cmd_hwif1, &hw[1]);
  742. idx[1] = cmd_hwif1->index;
  743. }
  744. printk(KERN_INFO "cmd640: %sserialized, secondary interface %s\n",
  745. second_port_cmd640 ? "" : "not ", port2);
  746. /*
  747. * Establish initial timings/prefetch for all drives.
  748. * Do not unnecessarily disturb any prior BIOS setup of these.
  749. */
  750. for (index = 0; index < (2 + (second_port_cmd640 << 1)); index++) {
  751. ide_drive_t *drive;
  752. if (index > 1) {
  753. if (cmd_hwif1 == NULL)
  754. continue;
  755. drive = &cmd_hwif1->drives[index & 1];
  756. } else {
  757. if (cmd_hwif0 == NULL)
  758. continue;
  759. drive = &cmd_hwif0->drives[index & 1];
  760. }
  761. #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
  762. if (drive->autotune || ((index > 1) && second_port_toggled)) {
  763. /*
  764. * Reset timing to the slowest speed and turn off
  765. * prefetch. This way, the drive identify code has
  766. * a better chance.
  767. */
  768. setup_counts [index] = 4; /* max possible */
  769. active_counts [index] = 16; /* max possible */
  770. recovery_counts [index] = 16; /* max possible */
  771. program_drive_counts(drive, index);
  772. set_prefetch_mode(drive, index, 0);
  773. printk("cmd640: drive%d timings/prefetch cleared\n", index);
  774. } else {
  775. /*
  776. * Record timings/prefetch without changing them.
  777. * This preserves any prior BIOS setup.
  778. */
  779. retrieve_drive_counts (index);
  780. check_prefetch(drive, index);
  781. printk("cmd640: drive%d timings/prefetch(%s) preserved",
  782. index, drive->no_io_32bit ? "off" : "on");
  783. display_clocks(index);
  784. }
  785. #else
  786. /*
  787. * Set the drive unmask flags to match the prefetch setting
  788. */
  789. check_prefetch(drive, index);
  790. printk("cmd640: drive%d timings/prefetch(%s) preserved\n",
  791. index, drive->no_io_32bit ? "off" : "on");
  792. #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
  793. }
  794. #ifdef CMD640_DUMP_REGS
  795. cmd640_dump_regs();
  796. #endif
  797. ide_device_add(idx, &cmd640_port_info);
  798. return 1;
  799. }
  800. module_param_named(probe_vlb, cmd640_vlb, bool, 0);
  801. MODULE_PARM_DESC(probe_vlb, "probe for VLB version of CMD640 chipset");
  802. module_init(cmd640x_init);
  803. MODULE_LICENSE("GPL");