ns9750dev.h 6.1 KB

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  1. /*
  2. * Copyright (C) 2004 by FS Forth-Systeme GmbH.
  3. * All rights reserved.
  4. * Markus Pietrek <mpietrek@fsforth.de>
  5. *
  6. * Configuation settings for the NetSilicon NS9750 DevBoard
  7. *
  8. * See file CREDITS for list of people who contributed to this
  9. * project.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of
  14. * the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24. * MA 02111-1307 USA
  25. */
  26. #ifndef __CONFIG_H
  27. #define __CONFIG_H
  28. /*
  29. * High Level Configuration Options
  30. * (easy to change)
  31. */
  32. #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
  33. #define CONFIG_NS9750 1 /* in an NetSilicon NS9750 SoC */
  34. #define CONFIG_NS9750DEV 1 /* on an NetSilicon NS9750 DevBoard */
  35. /* input clock of PLL */
  36. #define CONFIG_SYS_CLK_FREQ 324403200 /* Don't use PLL. SW11-4 off */
  37. #define CPU_CLK_FREQ (CONFIG_SYS_CLK_FREQ/2)
  38. #define AHB_CLK_FREQ (CONFIG_SYS_CLK_FREQ/4)
  39. #define BBUS_CLK_FREQ (CONFIG_SYS_CLK_FREQ/8)
  40. #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
  41. /*@TODO #define CONFIG_STATUS_LED*/
  42. #define CONFIG_USE_IRQ
  43. /*
  44. * Size of malloc() pool
  45. */
  46. #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
  47. #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial
  48. * data */
  49. /*
  50. * Hardware drivers
  51. */
  52. #define CONFIG_NS9750_UART 1 /* use on-chip UART */
  53. #define CONFIG_DRIVER_NS9750_ETHERNET 1 /* use on-chip ethernet */
  54. /*
  55. * select serial console configuration
  56. */
  57. #define CONFIG_CONS_INDEX 1 /* Port B */
  58. /* allow to overwrite serial and ethaddr */
  59. #define CONFIG_ENV_OVERWRITE
  60. #define CONFIG_BAUDRATE 38400
  61. /*
  62. * BOOTP options
  63. */
  64. #define CONFIG_BOOTP_BOOTFILESIZE
  65. #define CONFIG_BOOTP_BOOTPATH
  66. #define CONFIG_BOOTP_GATEWAY
  67. #define CONFIG_BOOTP_HOSTNAME
  68. /*
  69. * Command line configuration.
  70. */
  71. #define CONFIG_CMD_BDI
  72. #define CONFIG_CMD_CONSOLE
  73. #define CONFIG_CMD_LOADB
  74. #define CONFIG_CMD_LOADS
  75. #define CONFIG_CMD_MEMORY
  76. #define CONFIG_CMD_NET
  77. #define CONFIG_CMD_PING
  78. #define CONFIG_BOOTDELAY 3
  79. /*#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,9600" */
  80. #define CONFIG_ETHADDR 00:04:f3:ff:ff:fb /*@TODO unset */
  81. #define CONFIG_NETMASK 255.255.255.0
  82. #define CONFIG_IPADDR 192.168.42.30
  83. #define CONFIG_SERVERIP 192.168.42.1
  84. /*#define CONFIG_BOOTFILE "elinos-lart" */
  85. /*#define CONFIG_BOOTCOMMAND "tftp; bootm" */
  86. #if defined(CONFIG_CMD_KGDB)
  87. #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
  88. /* what's this ? it's not used anywhere */
  89. #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
  90. #endif
  91. /*
  92. * Miscellaneous configurable options
  93. */
  94. #define CONFIG_SYS_LONGHELP /* undef to save memory */
  95. #define CONFIG_SYS_PROMPT "NS9750DEV # " /* Monitor Command Prompt */
  96. #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
  97. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
  98. #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
  99. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
  100. #define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */
  101. #define CONFIG_SYS_MEMTEST_END 0x00780000 /* 7,5 MB in DRAM */ /* @TODO */
  102. #define CONFIG_SYS_LOAD_ADDR 0x00600000 /* default load address */ /* @TODO */
  103. #define CONFIG_SYS_HZ (CPU_CLK_FREQ/64)
  104. /* valid baudrates */
  105. #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
  106. #define NS9750_ETH_PHY_ADDRESS (0x0000)
  107. /*-----------------------------------------------------------------------
  108. * Stack sizes
  109. *
  110. * The stack sizes are set up in start.S using the settings below
  111. */
  112. #define CONFIG_STACKSIZE (128*1024) /* regular stack */
  113. #ifdef CONFIG_USE_IRQ
  114. #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
  115. #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
  116. #endif
  117. /*-----------------------------------------------------------------------
  118. * Physical Memory Map
  119. */
  120. /* TODO */
  121. #define CONFIG_NR_DRAM_BANKS 2 /* we have 1 bank of DRAM */
  122. #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
  123. #define PHYS_SDRAM_1_SIZE 0x00800000 /* 8 MB */
  124. #define PHYS_SDRAM_2 0x10000000 /* SDRAM Bank #1 */
  125. #define PHYS_SDRAM_2_SIZE 0x00800000 /* 8 MB */
  126. #define PHYS_FLASH_1 0x50000000 /* Flash Bank #1 */
  127. #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
  128. /*-----------------------------------------------------------------------
  129. * FLASH and environment organization
  130. */
  131. /* @TODO*/
  132. #define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */
  133. #if 0
  134. #define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */
  135. #endif
  136. #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
  137. #ifdef CONFIG_AMD_LV800
  138. #define PHYS_FLASH_SIZE 0x00100000 /* 1MB */
  139. #define CONFIG_SYS_MAX_FLASH_SECT (19) /* max number of sectors on one chip */
  140. #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x0F0000) /* addr of environment */
  141. #endif
  142. #ifdef CONFIG_AMD_LV400
  143. #define PHYS_FLASH_SIZE 0x00080000 /* 512KB */
  144. #define CONFIG_SYS_MAX_FLASH_SECT (11) /* max number of sectors on one chip */
  145. #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000) /* addr of environment */
  146. #endif
  147. /* timeout values are in ticks */
  148. #define CONFIG_SYS_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
  149. #define CONFIG_SYS_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Write */
  150. /* @TODO */
  151. /*#define CONFIG_ENV_IS_IN_FLASH 1*/
  152. #define CONFIG_ENV_IS_NOWHERE
  153. #define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */
  154. #ifdef CONFIG_STATUS_LED
  155. extern void __led_init(led_id_t mask, int state);
  156. extern void __led_toggle(led_id_t mask);
  157. extern void __led_set(led_id_t mask, int state);
  158. #endif /* CONFIG_STATUS_LED */
  159. #endif /* __CONFIG_H */