 Stefan Roese
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b4996d6b21
ppc4xx: PCIe: Change 16GB inbound memory to 4GB
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%!s(int64=16) %!d(string=hai) anos |
 Dirk Eibach
|
59d1bda7f9
ppc4xx: Make PCIE support selectable
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%!s(int64=16) %!d(string=hai) anos |
 Jean-Christophe PLAGNIOL-VILLARD
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6d0f6bcf33
rename CFG_ macros to CONFIG_SYS
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%!s(int64=16) %!d(string=hai) anos |
 Tirumala R Marri
|
5d4b3d2b31
ppc4xx: AMCC PPC460GT/EX PCI-E de-emphasis adjustment fix
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%!s(int64=16) %!d(string=hai) anos |
|
Stefan Roese
|
b578fb4714
ppc4xx: Fix include sequence in 4xx_pcie.c
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%!s(int64=17) %!d(string=hai) anos |
|
Stefan Roese
|
dd1c5523d6
ppc4xx: Fix 460EX/GT PCIe port initialization
|
%!s(int64=17) %!d(string=hai) anos |
 Wolfgang Denk
|
53677ef18e
Big white-space cleanup.
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%!s(int64=17) %!d(string=hai) anos |
|
Stefan Roese
|
8ac41e3e37
ppc4xx: Add basic support for AMCC 460EX/460GT (1/5)
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%!s(int64=17) %!d(string=hai) anos |
|
Stefan Roese
|
653811a3c2
ppc4xx: Correct 405EX PCIe UTL register mapping
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%!s(int64=17) %!d(string=hai) anos |
|
Stefan Roese
|
f31d38b9ee
ppc4xx: Enable 405EX PCIe UTL register configuration
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%!s(int64=17) %!d(string=hai) anos |
|
Stefan Roese
|
7d0a4066b5
ppc4xx: Fix 405EX PCIe UTLSET register setup
|
%!s(int64=17) %!d(string=hai) anos |
|
Stefan Roese
|
5cb4af4791
ppc4xx: Add PCIe endpoint support on Kilauea (405EX)
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%!s(int64=17) %!d(string=hai) anos |
|
Stefan Roese
|
d4cb2d1794
ppc4xx: Dynamic configuration of 4xx PCIe mode as root or endpoint mode
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%!s(int64=17) %!d(string=hai) anos |
|
Stefan Roese
|
19e93b1e16
ppc4xx: 4xx_pcie: Change PCIe status output to match common style
|
%!s(int64=17) %!d(string=hai) anos |
|
Stefan Roese
|
ff68f66bcb
ppc4xx: 4xx_pcie: Disable debug output as default
|
%!s(int64=17) %!d(string=hai) anos |
|
Stefan Roese
|
97923770cb
ppc4xx: 4xx_pcie: More general cleanup and 405EX PCIe support added
|
%!s(int64=17) %!d(string=hai) anos |
|
Stefan Roese
|
4dbee8a90d
ppc4xx: 4xx_pcie: Change CFG_PCIE_MEMSIZE to 128MB on Yucca & Katmai
|
%!s(int64=17) %!d(string=hai) anos |
|
Stefan Roese
|
6d95289281
ppc4xx: 4xx_pcie: Fix problem with SDRN access using port number as idx
|
%!s(int64=17) %!d(string=hai) anos |
|
Stefan Roese
|
94276eb0a7
ppc4xx: Add a comment for 405EX PCIe endpoint configuration
|
%!s(int64=17) %!d(string=hai) anos |
|
Stefan Roese
|
03d344bb6a
ppc4xx: Make 440SPe PCIe code more generic to use on different 4xx PPCs (3)
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%!s(int64=17) %!d(string=hai) anos |
|
Stefan Roese
|
026f711068
ppc4xx: Make 440SPe PCIe code more generic to use on different 4xx PPCs (2)
|
%!s(int64=17) %!d(string=hai) anos |
|
Stefan Roese
|
c7c6da2302
ppc4xx: Make 440SPe PCIe code more generic to use on different 4xx PPCs (1)
|
%!s(int64=17) %!d(string=hai) anos |
