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@@ -588,7 +588,7 @@ int ppc4xx_init_pcie_port(int port, int rootport)
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*/
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mdelay(100);
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- val = SDR_READ(SDRN_PESDR_RCSSTS(sdr_base(port)));
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+ val = SDR_READ(SDRN_PESDR_RCSSTS(port));
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if (val & (1 << 20)) {
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printf("PCIE%d: PGRST failed %08x\n", port, val);
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return -1;
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@@ -597,7 +597,7 @@ int ppc4xx_init_pcie_port(int port, int rootport)
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/*
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* Verify link is up
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*/
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- val = SDR_READ(SDRN_PESDR_LOOP(sdr_base(port)));
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+ val = SDR_READ(SDRN_PESDR_LOOP(port));
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if (!(val & 0x00001000)) {
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printf("PCIE%d: link is not up.\n", port);
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return -1;
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@@ -639,15 +639,15 @@ int ppc4xx_init_pcie_port(int port, int rootport)
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* Check for VC0 active and assert RDY.
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*/
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attempts = 10;
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- while(!(SDR_READ(SDRN_PESDR_RCSSTS(sdr_base(port))) & (1 << 16))) {
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+ while(!(SDR_READ(SDRN_PESDR_RCSSTS(port)) & (1 << 16))) {
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if (!(attempts--)) {
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printf("PCIE%d: VC0 not active\n", port);
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return -1;
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}
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mdelay(1000);
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}
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- SDR_WRITE(SDRN_PESDR_RCSSET(sdr_base(port)),
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- SDR_READ(SDRN_PESDR_RCSSET(sdr_base(port))) | 1 << 20);
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+ SDR_WRITE(SDRN_PESDR_RCSSET(port),
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+ SDR_READ(SDRN_PESDR_RCSSET(port)) | 1 << 20);
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mdelay(100);
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return 0;
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@@ -862,7 +862,7 @@ int ppc4xx_setup_pcie_endpoint(struct pci_controller *hose, int port)
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out_le16(mbase + 0x202,0xfeed); /* Setting device ID */
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attempts = 10;
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- while(!(SDR_READ(SDRN_PESDR_RCSSTS(sdr_base(port))) & (1 << 8))) {
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+ while(!(SDR_READ(SDRN_PESDR_RCSSTS(port)) & (1 << 8))) {
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if (!(attempts--)) {
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printf("PCIE%d: BME not active\n", port);
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return -1;
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