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@@ -30,7 +30,7 @@
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#define CONFIG_PLL_BYPASS 0
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/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
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/* Values can range from 0-63 (where 0 means 64) */
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-#define CONFIG_VCO_MULT 22
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+#define CONFIG_VCO_MULT 20
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/* CCLK_DIV controls the core clock divider */
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/* Values can be 1, 2, 4, or 8 ONLY */
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#define CONFIG_CCLK_DIV 1
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@@ -38,6 +38,9 @@
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/* Values can range from 1-15 */
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#define CONFIG_SCLK_DIV 5
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+/* Decrease core voltage */
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+#define CONFIG_VR_CTL_VAL (VLEV_110 | GAIN_20 | FREQ_1000)
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+
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/*
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* Memory Settings
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@@ -98,6 +101,8 @@
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*/
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_UART_CONSOLE 0
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+#define CONFIG_BOOTCOMMAND "run flashboot"
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+#define FLASHBOOT_ENV_SETTINGS "flashboot=bootm 0x20040000\0"
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/*
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