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+/*
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+ * Copyright (C) 2011 Infineon Technologies
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+ *
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+ * Authors:
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+ * Peter Huewe <huewe.external@infineon.com>
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+ *
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+ * Description:
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+ * Device driver for TCG/TCPA TPM (trusted platform module).
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+ * Specifications at www.trustedcomputinggroup.org
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+ *
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+ * This device driver implements the TPM interface as defined in
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+ * the TCG TPM Interface Spec version 1.2, revision 1.0 and the
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+ * Infineon I2C Protocol Stack Specification v0.20.
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+ *
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+ * It is based on the Linux kernel driver tpm.c from Leendert van
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+ * Dorn, Dave Safford, Reiner Sailer, and Kyleen Hall.
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+ *
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+ * Version: 2.1.1
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+ *
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+ * See file CREDITS for list of people who contributed to this
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+ * project.
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation, version 2 of the
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+ * License.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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+ * MA 02111-1307 USA
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+ */
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+
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+#include <common.h>
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+#include <i2c.h>
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+#include <linux/types.h>
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+
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+#include "compatibility.h"
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+#include "tpm.h"
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+
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+/* max. buffer size supported by our tpm */
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+#ifdef TPM_BUFSIZE
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+#undef TPM_BUFSIZE
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+#endif
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+#define TPM_BUFSIZE 1260
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+/* Address of the TPM on the I2C bus */
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+#define TPM_I2C_ADDR 0x20
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+/* max. number of iterations after i2c NAK */
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+#define MAX_COUNT 3
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+
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+#define SLEEP_DURATION 60 /*in usec*/
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+
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+/* max. number of iterations after i2c NAK for 'long' commands
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+ * we need this especially for sending TPM_READY, since the cleanup after the
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+ * transtion to the ready state may take some time, but it is unpredictable
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+ * how long it will take.
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+ */
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+#define MAX_COUNT_LONG 50
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+
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+#define SLEEP_DURATION_LONG 210 /* in usec */
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+
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+/* expected value for DIDVID register */
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+#define TPM_TIS_I2C_DID_VID 0x000b15d1L
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+
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+/* Structure to store I2C TPM specific stuff */
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+struct tpm_inf_dev {
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+ uint addr;
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+ u8 buf[TPM_BUFSIZE + sizeof(u8)]; /* max. buffer size + addr */
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+};
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+
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+static struct tpm_inf_dev tpm_dev = {
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+ .addr = TPM_I2C_ADDR
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+};
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+
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+/*
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+ * iic_tpm_read() - read from TPM register
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+ * @addr: register address to read from
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+ * @buffer: provided by caller
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+ * @len: number of bytes to read
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+ *
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+ * Read len bytes from TPM register and put them into
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+ * buffer (little-endian format, i.e. first byte is put into buffer[0]).
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+ *
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+ * NOTE: TPM is big-endian for multi-byte values. Multi-byte
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+ * values have to be swapped.
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+ *
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+ * Return -EIO on error, 0 on success.
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+ */
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+int iic_tpm_read(u8 addr, u8 *buffer, size_t len)
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+{
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+ int rc;
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+ int count;
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+ uint myaddr = addr;
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+ /* we have to use uint here, uchar hangs the board */
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+
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+ for (count = 0; count < MAX_COUNT; count++) {
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+ rc = i2c_write(tpm_dev.addr, 0, 0, (uchar *)&myaddr, 1);
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+ if (rc == 0)
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+ break; /*success, break to skip sleep*/
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+
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+ udelay(SLEEP_DURATION);
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+ }
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+
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+ if (rc)
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+ return -rc;
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+
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+ /* After the TPM has successfully received the register address it needs
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+ * some time, thus we're sleeping here again, before retrieving the data
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+ */
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+ for (count = 0; count < MAX_COUNT; count++) {
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+ udelay(SLEEP_DURATION);
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+ rc = i2c_read(tpm_dev.addr, 0, 0, buffer, len);
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+ if (rc == 0)
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+ break; /*success, break to skip sleep*/
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+ }
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+
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+ if (rc)
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+ return -rc;
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+
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+ return 0;
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+}
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+
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+static int iic_tpm_write_generic(u8 addr, u8 *buffer, size_t len,
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+ unsigned int sleep_time,
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+ u8 max_count)
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+{
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+ int rc = 0;
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+ int count;
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+
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+ /* prepare send buffer */
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+ tpm_dev.buf[0] = addr;
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+ memcpy(&(tpm_dev.buf[1]), buffer, len);
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+
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+ for (count = 0; count < max_count; count++) {
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+ rc = i2c_write(tpm_dev.addr, 0, 0, tpm_dev.buf, len + 1);
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+ if (rc == 0)
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+ break; /*success, break to skip sleep*/
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+
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+ udelay(sleep_time);
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+ }
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+
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+ if (rc)
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+ return -rc;
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+
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+ return 0;
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+}
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+
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+/*
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+ * iic_tpm_write() - write to TPM register
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+ * @addr: register address to write to
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+ * @buffer: containing data to be written
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+ * @len: number of bytes to write
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+ *
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+ * Write len bytes from provided buffer to TPM register (little
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+ * endian format, i.e. buffer[0] is written as first byte).
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+ *
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+ * NOTE: TPM is big-endian for multi-byte values. Multi-byte
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+ * values have to be swapped.
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+ *
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+ * NOTE: use this function instead of the iic_tpm_write_generic function.
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+ *
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+ * Return -EIO on error, 0 on success
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+ */
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+static int iic_tpm_write(u8 addr, u8 *buffer, size_t len)
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+{
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+ return iic_tpm_write_generic(addr, buffer, len, SLEEP_DURATION,
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+ MAX_COUNT);
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+}
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+
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+/*
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+ * This function is needed especially for the cleanup situation after
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+ * sending TPM_READY
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+ * */
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+static int iic_tpm_write_long(u8 addr, u8 *buffer, size_t len)
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+{
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+ return iic_tpm_write_generic(addr, buffer, len, SLEEP_DURATION_LONG,
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+ MAX_COUNT_LONG);
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+}
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+
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+#define TPM_HEADER_SIZE 10
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+
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+enum tis_access {
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+ TPM_ACCESS_VALID = 0x80,
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+ TPM_ACCESS_ACTIVE_LOCALITY = 0x20,
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+ TPM_ACCESS_REQUEST_PENDING = 0x04,
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+ TPM_ACCESS_REQUEST_USE = 0x02,
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+};
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+
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+enum tis_status {
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+ TPM_STS_VALID = 0x80,
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+ TPM_STS_COMMAND_READY = 0x40,
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+ TPM_STS_GO = 0x20,
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+ TPM_STS_DATA_AVAIL = 0x10,
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+ TPM_STS_DATA_EXPECT = 0x08,
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+};
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+
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+enum tis_defaults {
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+ TIS_SHORT_TIMEOUT = 750, /* ms */
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+ TIS_LONG_TIMEOUT = 2000, /* 2 sec */
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+};
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+
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+#define TPM_ACCESS(l) (0x0000 | ((l) << 4))
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+#define TPM_STS(l) (0x0001 | ((l) << 4))
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+#define TPM_DATA_FIFO(l) (0x0005 | ((l) << 4))
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+#define TPM_DID_VID(l) (0x0006 | ((l) << 4))
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+
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+static int check_locality(struct tpm_chip *chip, int loc)
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+{
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+ u8 buf;
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+ int rc;
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+
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+ rc = iic_tpm_read(TPM_ACCESS(loc), &buf, 1);
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+ if (rc < 0)
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+ return rc;
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+
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+ if ((buf & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
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+ (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) {
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+ chip->vendor.locality = loc;
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+ return loc;
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+ }
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+
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+ return -1;
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+}
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+
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+static void release_locality(struct tpm_chip *chip, int loc, int force)
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+{
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+ u8 buf;
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+ if (iic_tpm_read(TPM_ACCESS(loc), &buf, 1) < 0)
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+ return;
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+
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+ if (force || (buf & (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
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+ (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) {
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+ buf = TPM_ACCESS_ACTIVE_LOCALITY;
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+ iic_tpm_write(TPM_ACCESS(loc), &buf, 1);
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+ }
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+}
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+
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+static int request_locality(struct tpm_chip *chip, int loc)
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+{
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+ unsigned long start, stop;
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+ u8 buf = TPM_ACCESS_REQUEST_USE;
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+
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+ if (check_locality(chip, loc) >= 0)
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+ return loc; /* we already have the locality */
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+
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+ iic_tpm_write(TPM_ACCESS(loc), &buf, 1);
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+
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+ /* wait for burstcount */
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+ start = get_timer(0);
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+ stop = chip->vendor.timeout_a;
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+ do {
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+ if (check_locality(chip, loc) >= 0)
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+ return loc;
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+ msleep(TPM_TIMEOUT);
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+ } while (get_timer(start) < stop);
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+
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+ return -1;
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+}
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+
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+static u8 tpm_tis_i2c_status(struct tpm_chip *chip)
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+{
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+ /* NOTE: since i2c read may fail, return 0 in this case --> time-out */
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+ u8 buf;
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+ if (iic_tpm_read(TPM_STS(chip->vendor.locality), &buf, 1) < 0)
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+ return 0;
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+ else
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+ return buf;
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+}
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+
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+static void tpm_tis_i2c_ready(struct tpm_chip *chip)
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+{
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+ /* this causes the current command to be aborted */
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+ u8 buf = TPM_STS_COMMAND_READY;
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+ iic_tpm_write_long(TPM_STS(chip->vendor.locality), &buf, 1);
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+}
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+
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+static ssize_t get_burstcount(struct tpm_chip *chip)
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+{
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+ unsigned long start, stop;
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+ ssize_t burstcnt;
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+ u8 buf[3];
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+
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+ /* wait for burstcount */
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+ /* which timeout value, spec has 2 answers (c & d) */
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+ start = get_timer(0);
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+ stop = chip->vendor.timeout_d;
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+ do {
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+ /* Note: STS is little endian */
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+ if (iic_tpm_read(TPM_STS(chip->vendor.locality) + 1, buf, 3)
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+ < 0)
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+ burstcnt = 0;
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+ else
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+ burstcnt = (buf[2] << 16) + (buf[1] << 8) + buf[0];
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+
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+ if (burstcnt)
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+ return burstcnt;
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+ msleep(TPM_TIMEOUT);
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+ } while (get_timer(start) < stop);
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+
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+ return -EBUSY;
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+}
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+
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+static int wait_for_stat(struct tpm_chip *chip, u8 mask, unsigned long timeout,
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+ int *status)
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+{
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+ unsigned long start, stop;
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+
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+ /* check current status */
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+ *status = tpm_tis_i2c_status(chip);
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+ if ((*status & mask) == mask)
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+ return 0;
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+
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+ start = get_timer(0);
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+ stop = timeout;
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+ do {
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+ msleep(TPM_TIMEOUT);
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+ *status = tpm_tis_i2c_status(chip);
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+ if ((*status & mask) == mask)
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+ return 0;
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+
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+ } while (get_timer(start) < stop);
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+
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+ return -ETIME;
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+}
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+
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+static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
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+{
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+ size_t size = 0;
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+ ssize_t burstcnt;
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+ int rc;
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+
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+ while (size < count) {
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+ burstcnt = get_burstcount(chip);
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+
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+ /* burstcount < 0 = tpm is busy */
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+ if (burstcnt < 0)
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+ return burstcnt;
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+
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+ /* limit received data to max. left */
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+ if (burstcnt > (count - size))
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+ burstcnt = count - size;
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+
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+ rc = iic_tpm_read(TPM_DATA_FIFO(chip->vendor.locality),
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+ &(buf[size]),
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+ burstcnt);
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+ if (rc == 0)
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+ size += burstcnt;
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+ }
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+
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+ return size;
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+}
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+
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+static int tpm_tis_i2c_recv(struct tpm_chip *chip, u8 *buf, size_t count)
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+{
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|
+ int size = 0;
|
|
|
|
+ int expected, status;
|
|
|
|
+
|
|
|
|
+ if (count < TPM_HEADER_SIZE) {
|
|
|
|
+ size = -EIO;
|
|
|
|
+ goto out;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ /* read first 10 bytes, including tag, paramsize, and result */
|
|
|
|
+ size = recv_data(chip, buf, TPM_HEADER_SIZE);
|
|
|
|
+ if (size < TPM_HEADER_SIZE) {
|
|
|
|
+ dev_err(chip->dev, "Unable to read header\n");
|
|
|
|
+ goto out;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ expected = get_unaligned_be32(buf + TPM_RSP_SIZE_BYTE);
|
|
|
|
+ if ((size_t)expected > count) {
|
|
|
|
+ size = -EIO;
|
|
|
|
+ goto out;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ size += recv_data(chip, &buf[TPM_HEADER_SIZE],
|
|
|
|
+ expected - TPM_HEADER_SIZE);
|
|
|
|
+ if (size < expected) {
|
|
|
|
+ dev_err(chip->dev, "Unable to read remainder of result\n");
|
|
|
|
+ size = -ETIME;
|
|
|
|
+ goto out;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, &status);
|
|
|
|
+ if (status & TPM_STS_DATA_AVAIL) { /* retry? */
|
|
|
|
+ dev_err(chip->dev, "Error left over data\n");
|
|
|
|
+ size = -EIO;
|
|
|
|
+ goto out;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+out:
|
|
|
|
+ tpm_tis_i2c_ready(chip);
|
|
|
|
+ /* The TPM needs some time to clean up here,
|
|
|
|
+ * so we sleep rather than keeping the bus busy
|
|
|
|
+ */
|
|
|
|
+ udelay(2000);
|
|
|
|
+ release_locality(chip, chip->vendor.locality, 0);
|
|
|
|
+
|
|
|
|
+ return size;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static int tpm_tis_i2c_send(struct tpm_chip *chip, u8 *buf, size_t len)
|
|
|
|
+{
|
|
|
|
+ int rc, status;
|
|
|
|
+ ssize_t burstcnt;
|
|
|
|
+ size_t count = 0;
|
|
|
|
+ u8 sts = TPM_STS_GO;
|
|
|
|
+
|
|
|
|
+ if (len > TPM_BUFSIZE)
|
|
|
|
+ return -E2BIG; /* command is too long for our tpm, sorry */
|
|
|
|
+
|
|
|
|
+ if (request_locality(chip, 0) < 0)
|
|
|
|
+ return -EBUSY;
|
|
|
|
+
|
|
|
|
+ status = tpm_tis_i2c_status(chip);
|
|
|
|
+ if ((status & TPM_STS_COMMAND_READY) == 0) {
|
|
|
|
+ tpm_tis_i2c_ready(chip);
|
|
|
|
+ if (wait_for_stat
|
|
|
|
+ (chip, TPM_STS_COMMAND_READY,
|
|
|
|
+ chip->vendor.timeout_b, &status) < 0) {
|
|
|
|
+ rc = -ETIME;
|
|
|
|
+ goto out_err;
|
|
|
|
+ }
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ while (count < len - 1) {
|
|
|
|
+ burstcnt = get_burstcount(chip);
|
|
|
|
+
|
|
|
|
+ /* burstcount < 0 = tpm is busy */
|
|
|
|
+ if (burstcnt < 0)
|
|
|
|
+ return burstcnt;
|
|
|
|
+
|
|
|
|
+ if (burstcnt > (len-1-count))
|
|
|
|
+ burstcnt = len-1-count;
|
|
|
|
+
|
|
|
|
+#ifdef CONFIG_TPM_I2C_BURST_LIMITATION
|
|
|
|
+ if (burstcnt > CONFIG_TPM_I2C_BURST_LIMITATION)
|
|
|
|
+ burstcnt = CONFIG_TPM_I2C_BURST_LIMITATION;
|
|
|
|
+#endif /* CONFIG_TPM_I2C_BURST_LIMITATION */
|
|
|
|
+
|
|
|
|
+ rc = iic_tpm_write(TPM_DATA_FIFO(chip->vendor.locality),
|
|
|
|
+ &(buf[count]), burstcnt);
|
|
|
|
+ if (rc == 0)
|
|
|
|
+ count += burstcnt;
|
|
|
|
+
|
|
|
|
+ wait_for_stat(chip, TPM_STS_VALID,
|
|
|
|
+ chip->vendor.timeout_c, &status);
|
|
|
|
+
|
|
|
|
+ if ((status & TPM_STS_DATA_EXPECT) == 0) {
|
|
|
|
+ rc = -EIO;
|
|
|
|
+ goto out_err;
|
|
|
|
+ }
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ /* write last byte */
|
|
|
|
+ iic_tpm_write(TPM_DATA_FIFO(chip->vendor.locality), &(buf[count]), 1);
|
|
|
|
+ wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, &status);
|
|
|
|
+ if ((status & TPM_STS_DATA_EXPECT) != 0) {
|
|
|
|
+ rc = -EIO;
|
|
|
|
+ goto out_err;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ /* go and do it */
|
|
|
|
+ iic_tpm_write(TPM_STS(chip->vendor.locality), &sts, 1);
|
|
|
|
+
|
|
|
|
+ return len;
|
|
|
|
+out_err:
|
|
|
|
+ tpm_tis_i2c_ready(chip);
|
|
|
|
+ /* The TPM needs some time to clean up here,
|
|
|
|
+ * so we sleep rather than keeping the bus busy
|
|
|
|
+ */
|
|
|
|
+ udelay(2000);
|
|
|
|
+ release_locality(chip, chip->vendor.locality, 0);
|
|
|
|
+
|
|
|
|
+ return rc;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+static struct tpm_vendor_specific tpm_tis_i2c = {
|
|
|
|
+ .status = tpm_tis_i2c_status,
|
|
|
|
+ .recv = tpm_tis_i2c_recv,
|
|
|
|
+ .send = tpm_tis_i2c_send,
|
|
|
|
+ .cancel = tpm_tis_i2c_ready,
|
|
|
|
+ .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
|
|
|
|
+ .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
|
|
|
|
+ .req_canceled = TPM_STS_COMMAND_READY,
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+/* initialisation of i2c tpm */
|
|
|
|
+
|
|
|
|
+
|
|
|
|
+int tpm_vendor_init(uint32_t dev_addr)
|
|
|
|
+{
|
|
|
|
+ u32 vendor;
|
|
|
|
+ uint old_addr;
|
|
|
|
+ int rc = 0;
|
|
|
|
+ struct tpm_chip *chip;
|
|
|
|
+
|
|
|
|
+ old_addr = tpm_dev.addr;
|
|
|
|
+ if (dev_addr != 0)
|
|
|
|
+ tpm_dev.addr = dev_addr;
|
|
|
|
+
|
|
|
|
+ chip = tpm_register_hardware(&tpm_tis_i2c);
|
|
|
|
+ if (chip < 0) {
|
|
|
|
+ rc = -ENODEV;
|
|
|
|
+ goto out_err;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ /* Disable interrupts (not supported) */
|
|
|
|
+ chip->vendor.irq = 0;
|
|
|
|
+
|
|
|
|
+ /* Default timeouts */
|
|
|
|
+ chip->vendor.timeout_a = TIS_SHORT_TIMEOUT;
|
|
|
|
+ chip->vendor.timeout_b = TIS_LONG_TIMEOUT;
|
|
|
|
+ chip->vendor.timeout_c = TIS_SHORT_TIMEOUT;
|
|
|
|
+ chip->vendor.timeout_d = TIS_SHORT_TIMEOUT;
|
|
|
|
+
|
|
|
|
+ if (request_locality(chip, 0) != 0) {
|
|
|
|
+ rc = -ENODEV;
|
|
|
|
+ goto out_err;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ /* read four bytes from DID_VID register */
|
|
|
|
+ if (iic_tpm_read(TPM_DID_VID(0), (uchar *)&vendor, 4) < 0) {
|
|
|
|
+ rc = -EIO;
|
|
|
|
+ goto out_release;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ /* create DID_VID register value, after swapping to little-endian */
|
|
|
|
+ vendor = be32_to_cpu(vendor);
|
|
|
|
+
|
|
|
|
+ if (vendor != TPM_TIS_I2C_DID_VID) {
|
|
|
|
+ rc = -ENODEV;
|
|
|
|
+ goto out_release;
|
|
|
|
+ }
|
|
|
|
+
|
|
|
|
+ dev_info(dev, "1.2 TPM (device-id 0x%X)\n", vendor >> 16);
|
|
|
|
+
|
|
|
|
+ /*
|
|
|
|
+ * A timeout query to TPM can be placed here.
|
|
|
|
+ * Standard timeout values are used so far
|
|
|
|
+ */
|
|
|
|
+
|
|
|
|
+ return 0;
|
|
|
|
+
|
|
|
|
+out_release:
|
|
|
|
+ release_locality(chip, 0, 1);
|
|
|
|
+
|
|
|
|
+out_err:
|
|
|
|
+ tpm_dev.addr = old_addr;
|
|
|
|
+ return rc;
|
|
|
|
+}
|
|
|
|
+
|
|
|
|
+void tpm_vendor_cleanup(struct tpm_chip *chip)
|
|
|
|
+{
|
|
|
|
+ release_locality(chip, chip->vendor.locality, 1);
|
|
|
|
+}
|