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@@ -37,12 +37,15 @@
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*/
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*/
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#include <common.h>
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#include <common.h>
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+#include <fdtdec.h>
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#include <i2c.h>
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#include <i2c.h>
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#include <linux/types.h>
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#include <linux/types.h>
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#include "compatibility.h"
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#include "compatibility.h"
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#include "tpm.h"
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#include "tpm.h"
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+DECLARE_GLOBAL_DATA_PTR;
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+
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/* max. buffer size supported by our tpm */
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/* max. buffer size supported by our tpm */
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#ifdef TPM_BUFSIZE
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#ifdef TPM_BUFSIZE
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#undef TPM_BUFSIZE
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#undef TPM_BUFSIZE
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@@ -65,12 +68,26 @@
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#define SLEEP_DURATION_LONG 210 /* in usec */
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#define SLEEP_DURATION_LONG 210 /* in usec */
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/* expected value for DIDVID register */
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/* expected value for DIDVID register */
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-#define TPM_TIS_I2C_DID_VID 0x000b15d1L
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+#define TPM_TIS_I2C_DID_VID_9635 0x000b15d1L
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+#define TPM_TIS_I2C_DID_VID_9645 0x001a15d1L
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+
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+enum i2c_chip_type {
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+ SLB9635,
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+ SLB9645,
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+ UNKNOWN,
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+};
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+
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+static const char * const chip_name[] = {
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+ [SLB9635] = "slb9635tt",
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+ [SLB9645] = "slb9645tt",
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+ [UNKNOWN] = "unknown/fallback to slb9635",
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+};
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/* Structure to store I2C TPM specific stuff */
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/* Structure to store I2C TPM specific stuff */
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struct tpm_inf_dev {
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struct tpm_inf_dev {
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uint addr;
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uint addr;
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u8 buf[TPM_BUFSIZE + sizeof(u8)]; /* max. buffer size + addr */
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u8 buf[TPM_BUFSIZE + sizeof(u8)]; /* max. buffer size + addr */
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+ enum i2c_chip_type chip_type;
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};
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};
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static struct tpm_inf_dev tpm_dev = {
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static struct tpm_inf_dev tpm_dev = {
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@@ -98,27 +115,47 @@ int iic_tpm_read(u8 addr, u8 *buffer, size_t len)
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uint myaddr = addr;
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uint myaddr = addr;
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/* we have to use uint here, uchar hangs the board */
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/* we have to use uint here, uchar hangs the board */
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- for (count = 0; count < MAX_COUNT; count++) {
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- rc = i2c_write(tpm_dev.addr, 0, 0, (uchar *)&myaddr, 1);
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- if (rc == 0)
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- break; /*success, break to skip sleep*/
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-
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- udelay(SLEEP_DURATION);
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- }
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+ if ((tpm_dev.chip_type == SLB9635) || (tpm_dev.chip_type == UNKNOWN)) {
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+ /* slb9635 protocol should work in both cases */
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+ for (count = 0; count < MAX_COUNT; count++) {
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+ rc = i2c_write(tpm_dev.addr, 0, 0,
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+ (uchar *)&myaddr, 1);
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+ if (rc == 0)
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+ break; /* success, break to skip sleep */
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- if (rc)
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- return -rc;
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+ udelay(SLEEP_DURATION);
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+ }
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- /* After the TPM has successfully received the register address it needs
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- * some time, thus we're sleeping here again, before retrieving the data
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- */
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- for (count = 0; count < MAX_COUNT; count++) {
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- udelay(SLEEP_DURATION);
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- rc = i2c_read(tpm_dev.addr, 0, 0, buffer, len);
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- if (rc == 0)
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- break; /*success, break to skip sleep*/
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+ if (rc)
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+ return -rc;
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+
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+ /* After the TPM has successfully received the register address
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+ * it needs some time, thus we're sleeping here again, before
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+ * retrieving the data
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+ */
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+ for (count = 0; count < MAX_COUNT; count++) {
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+ udelay(SLEEP_DURATION);
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+ rc = i2c_read(tpm_dev.addr, 0, 0, buffer, len);
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+ if (rc == 0)
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+ break; /* success, break to skip sleep */
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+ }
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+ } else {
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+ /* use a combined read for newer chips
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+ * unfortunately the smbus functions are not suitable due to
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+ * the 32 byte limit of the smbus.
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+ * retries should usually not be needed, but are kept just to
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+ * be safe on the safe side.
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+ */
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+ for (count = 0; count < MAX_COUNT; count++) {
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+ rc = i2c_read(tpm_dev.addr, addr, 1, buffer, len);
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+ if (rc == 0)
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+ break; /* break here to skip sleep */
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+ udelay(SLEEP_DURATION);
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+ }
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}
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}
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+ /* take care of 'guard time' */
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+ udelay(SLEEP_DURATION);
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if (rc)
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if (rc)
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return -rc;
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return -rc;
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@@ -139,11 +176,13 @@ static int iic_tpm_write_generic(u8 addr, u8 *buffer, size_t len,
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for (count = 0; count < max_count; count++) {
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for (count = 0; count < max_count; count++) {
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rc = i2c_write(tpm_dev.addr, 0, 0, tpm_dev.buf, len + 1);
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rc = i2c_write(tpm_dev.addr, 0, 0, tpm_dev.buf, len + 1);
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if (rc == 0)
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if (rc == 0)
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- break; /*success, break to skip sleep*/
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+ break; /* success, break to skip sleep */
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udelay(sleep_time);
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udelay(sleep_time);
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}
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}
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+ /* take care of 'guard time' */
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+ udelay(SLEEP_DURATION);
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if (rc)
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if (rc)
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return -rc;
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return -rc;
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@@ -490,12 +529,27 @@ static struct tpm_vendor_specific tpm_tis_i2c = {
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.req_canceled = TPM_STS_COMMAND_READY,
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.req_canceled = TPM_STS_COMMAND_READY,
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};
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};
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+static enum i2c_chip_type tpm_vendor_chip_type(void)
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+{
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+#ifdef CONFIG_OF_CONTROL
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+ const void *blob = gd->fdt_blob;
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+
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+ if (fdtdec_next_compatible(blob, 0, COMPAT_INFINEON_SLB9645_TPM) >= 0)
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+ return SLB9645;
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+
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+ if (fdtdec_next_compatible(blob, 0, COMPAT_INFINEON_SLB9635_TPM) >= 0)
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+ return SLB9635;
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+#endif
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+ return UNKNOWN;
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+}
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+
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/* initialisation of i2c tpm */
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/* initialisation of i2c tpm */
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int tpm_vendor_init(uint32_t dev_addr)
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int tpm_vendor_init(uint32_t dev_addr)
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{
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{
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u32 vendor;
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u32 vendor;
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+ u32 expected_did_vid;
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uint old_addr;
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uint old_addr;
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int rc = 0;
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int rc = 0;
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struct tpm_chip *chip;
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struct tpm_chip *chip;
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@@ -504,6 +558,8 @@ int tpm_vendor_init(uint32_t dev_addr)
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if (dev_addr != 0)
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if (dev_addr != 0)
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tpm_dev.addr = dev_addr;
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tpm_dev.addr = dev_addr;
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+ tpm_dev.chip_type = tpm_vendor_chip_type();
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+
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chip = tpm_register_hardware(&tpm_tis_i2c);
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chip = tpm_register_hardware(&tpm_tis_i2c);
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if (chip < 0) {
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if (chip < 0) {
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rc = -ENODEV;
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rc = -ENODEV;
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@@ -530,15 +586,22 @@ int tpm_vendor_init(uint32_t dev_addr)
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goto out_release;
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goto out_release;
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}
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}
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- /* create DID_VID register value, after swapping to little-endian */
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- vendor = be32_to_cpu(vendor);
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+ if (tpm_dev.chip_type == SLB9635) {
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+ vendor = be32_to_cpu(vendor);
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+ expected_did_vid = TPM_TIS_I2C_DID_VID_9635;
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+ } else {
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+ /* device id and byte order has changed for newer i2c tpms */
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+ expected_did_vid = TPM_TIS_I2C_DID_VID_9645;
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+ }
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- if (vendor != TPM_TIS_I2C_DID_VID) {
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+ if (tpm_dev.chip_type != UNKNOWN && vendor != expected_did_vid) {
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+ dev_err(dev, "vendor id did not match! ID was %08x\n", vendor);
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rc = -ENODEV;
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rc = -ENODEV;
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goto out_release;
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goto out_release;
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}
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}
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- dev_info(dev, "1.2 TPM (device-id 0x%X)\n", vendor >> 16);
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+ dev_info(dev, "1.2 TPM (chip type %s device-id 0x%X)\n",
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+ chip_name[tpm_dev.chip_type], vendor >> 16);
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/*
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/*
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* A timeout query to TPM can be placed here.
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* A timeout query to TPM can be placed here.
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