tpm_tis_i2c.c 15 KB

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  1. /*
  2. * Copyright (C) 2011 Infineon Technologies
  3. *
  4. * Authors:
  5. * Peter Huewe <huewe.external@infineon.com>
  6. *
  7. * Description:
  8. * Device driver for TCG/TCPA TPM (trusted platform module).
  9. * Specifications at www.trustedcomputinggroup.org
  10. *
  11. * This device driver implements the TPM interface as defined in
  12. * the TCG TPM Interface Spec version 1.2, revision 1.0 and the
  13. * Infineon I2C Protocol Stack Specification v0.20.
  14. *
  15. * It is based on the Linux kernel driver tpm.c from Leendert van
  16. * Dorn, Dave Safford, Reiner Sailer, and Kyleen Hall.
  17. *
  18. * Version: 2.1.1
  19. *
  20. * See file CREDITS for list of people who contributed to this
  21. * project.
  22. *
  23. * This program is free software; you can redistribute it and/or
  24. * modify it under the terms of the GNU General Public License as
  25. * published by the Free Software Foundation, version 2 of the
  26. * License.
  27. *
  28. * This program is distributed in the hope that it will be useful,
  29. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  30. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  31. * GNU General Public License for more details.
  32. *
  33. * You should have received a copy of the GNU General Public License
  34. * along with this program; if not, write to the Free Software
  35. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  36. * MA 02111-1307 USA
  37. */
  38. #include <common.h>
  39. #include <fdtdec.h>
  40. #include <i2c.h>
  41. #include <linux/types.h>
  42. #include "compatibility.h"
  43. #include "tpm.h"
  44. DECLARE_GLOBAL_DATA_PTR;
  45. /* max. buffer size supported by our tpm */
  46. #ifdef TPM_BUFSIZE
  47. #undef TPM_BUFSIZE
  48. #endif
  49. #define TPM_BUFSIZE 1260
  50. /* Address of the TPM on the I2C bus */
  51. #define TPM_I2C_ADDR 0x20
  52. /* max. number of iterations after i2c NAK */
  53. #define MAX_COUNT 3
  54. #define SLEEP_DURATION 60 /*in usec*/
  55. /* max. number of iterations after i2c NAK for 'long' commands
  56. * we need this especially for sending TPM_READY, since the cleanup after the
  57. * transtion to the ready state may take some time, but it is unpredictable
  58. * how long it will take.
  59. */
  60. #define MAX_COUNT_LONG 50
  61. #define SLEEP_DURATION_LONG 210 /* in usec */
  62. /* expected value for DIDVID register */
  63. #define TPM_TIS_I2C_DID_VID_9635 0x000b15d1L
  64. #define TPM_TIS_I2C_DID_VID_9645 0x001a15d1L
  65. enum i2c_chip_type {
  66. SLB9635,
  67. SLB9645,
  68. UNKNOWN,
  69. };
  70. static const char * const chip_name[] = {
  71. [SLB9635] = "slb9635tt",
  72. [SLB9645] = "slb9645tt",
  73. [UNKNOWN] = "unknown/fallback to slb9635",
  74. };
  75. /* Structure to store I2C TPM specific stuff */
  76. struct tpm_inf_dev {
  77. uint addr;
  78. u8 buf[TPM_BUFSIZE + sizeof(u8)]; /* max. buffer size + addr */
  79. enum i2c_chip_type chip_type;
  80. };
  81. static struct tpm_inf_dev tpm_dev = {
  82. .addr = TPM_I2C_ADDR
  83. };
  84. /*
  85. * iic_tpm_read() - read from TPM register
  86. * @addr: register address to read from
  87. * @buffer: provided by caller
  88. * @len: number of bytes to read
  89. *
  90. * Read len bytes from TPM register and put them into
  91. * buffer (little-endian format, i.e. first byte is put into buffer[0]).
  92. *
  93. * NOTE: TPM is big-endian for multi-byte values. Multi-byte
  94. * values have to be swapped.
  95. *
  96. * Return -EIO on error, 0 on success.
  97. */
  98. int iic_tpm_read(u8 addr, u8 *buffer, size_t len)
  99. {
  100. int rc;
  101. int count;
  102. uint myaddr = addr;
  103. /* we have to use uint here, uchar hangs the board */
  104. if ((tpm_dev.chip_type == SLB9635) || (tpm_dev.chip_type == UNKNOWN)) {
  105. /* slb9635 protocol should work in both cases */
  106. for (count = 0; count < MAX_COUNT; count++) {
  107. rc = i2c_write(tpm_dev.addr, 0, 0,
  108. (uchar *)&myaddr, 1);
  109. if (rc == 0)
  110. break; /* success, break to skip sleep */
  111. udelay(SLEEP_DURATION);
  112. }
  113. if (rc)
  114. return -rc;
  115. /* After the TPM has successfully received the register address
  116. * it needs some time, thus we're sleeping here again, before
  117. * retrieving the data
  118. */
  119. for (count = 0; count < MAX_COUNT; count++) {
  120. udelay(SLEEP_DURATION);
  121. rc = i2c_read(tpm_dev.addr, 0, 0, buffer, len);
  122. if (rc == 0)
  123. break; /* success, break to skip sleep */
  124. }
  125. } else {
  126. /* use a combined read for newer chips
  127. * unfortunately the smbus functions are not suitable due to
  128. * the 32 byte limit of the smbus.
  129. * retries should usually not be needed, but are kept just to
  130. * be safe on the safe side.
  131. */
  132. for (count = 0; count < MAX_COUNT; count++) {
  133. rc = i2c_read(tpm_dev.addr, addr, 1, buffer, len);
  134. if (rc == 0)
  135. break; /* break here to skip sleep */
  136. udelay(SLEEP_DURATION);
  137. }
  138. }
  139. /* take care of 'guard time' */
  140. udelay(SLEEP_DURATION);
  141. if (rc)
  142. return -rc;
  143. return 0;
  144. }
  145. static int iic_tpm_write_generic(u8 addr, u8 *buffer, size_t len,
  146. unsigned int sleep_time,
  147. u8 max_count)
  148. {
  149. int rc = 0;
  150. int count;
  151. /* prepare send buffer */
  152. tpm_dev.buf[0] = addr;
  153. memcpy(&(tpm_dev.buf[1]), buffer, len);
  154. for (count = 0; count < max_count; count++) {
  155. rc = i2c_write(tpm_dev.addr, 0, 0, tpm_dev.buf, len + 1);
  156. if (rc == 0)
  157. break; /* success, break to skip sleep */
  158. udelay(sleep_time);
  159. }
  160. /* take care of 'guard time' */
  161. udelay(SLEEP_DURATION);
  162. if (rc)
  163. return -rc;
  164. return 0;
  165. }
  166. /*
  167. * iic_tpm_write() - write to TPM register
  168. * @addr: register address to write to
  169. * @buffer: containing data to be written
  170. * @len: number of bytes to write
  171. *
  172. * Write len bytes from provided buffer to TPM register (little
  173. * endian format, i.e. buffer[0] is written as first byte).
  174. *
  175. * NOTE: TPM is big-endian for multi-byte values. Multi-byte
  176. * values have to be swapped.
  177. *
  178. * NOTE: use this function instead of the iic_tpm_write_generic function.
  179. *
  180. * Return -EIO on error, 0 on success
  181. */
  182. static int iic_tpm_write(u8 addr, u8 *buffer, size_t len)
  183. {
  184. return iic_tpm_write_generic(addr, buffer, len, SLEEP_DURATION,
  185. MAX_COUNT);
  186. }
  187. /*
  188. * This function is needed especially for the cleanup situation after
  189. * sending TPM_READY
  190. * */
  191. static int iic_tpm_write_long(u8 addr, u8 *buffer, size_t len)
  192. {
  193. return iic_tpm_write_generic(addr, buffer, len, SLEEP_DURATION_LONG,
  194. MAX_COUNT_LONG);
  195. }
  196. #define TPM_HEADER_SIZE 10
  197. enum tis_access {
  198. TPM_ACCESS_VALID = 0x80,
  199. TPM_ACCESS_ACTIVE_LOCALITY = 0x20,
  200. TPM_ACCESS_REQUEST_PENDING = 0x04,
  201. TPM_ACCESS_REQUEST_USE = 0x02,
  202. };
  203. enum tis_status {
  204. TPM_STS_VALID = 0x80,
  205. TPM_STS_COMMAND_READY = 0x40,
  206. TPM_STS_GO = 0x20,
  207. TPM_STS_DATA_AVAIL = 0x10,
  208. TPM_STS_DATA_EXPECT = 0x08,
  209. };
  210. enum tis_defaults {
  211. TIS_SHORT_TIMEOUT = 750, /* ms */
  212. TIS_LONG_TIMEOUT = 2000, /* 2 sec */
  213. };
  214. #define TPM_ACCESS(l) (0x0000 | ((l) << 4))
  215. #define TPM_STS(l) (0x0001 | ((l) << 4))
  216. #define TPM_DATA_FIFO(l) (0x0005 | ((l) << 4))
  217. #define TPM_DID_VID(l) (0x0006 | ((l) << 4))
  218. static int check_locality(struct tpm_chip *chip, int loc)
  219. {
  220. u8 buf;
  221. int rc;
  222. rc = iic_tpm_read(TPM_ACCESS(loc), &buf, 1);
  223. if (rc < 0)
  224. return rc;
  225. if ((buf & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
  226. (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) {
  227. chip->vendor.locality = loc;
  228. return loc;
  229. }
  230. return -1;
  231. }
  232. static void release_locality(struct tpm_chip *chip, int loc, int force)
  233. {
  234. u8 buf;
  235. if (iic_tpm_read(TPM_ACCESS(loc), &buf, 1) < 0)
  236. return;
  237. if (force || (buf & (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
  238. (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) {
  239. buf = TPM_ACCESS_ACTIVE_LOCALITY;
  240. iic_tpm_write(TPM_ACCESS(loc), &buf, 1);
  241. }
  242. }
  243. static int request_locality(struct tpm_chip *chip, int loc)
  244. {
  245. unsigned long start, stop;
  246. u8 buf = TPM_ACCESS_REQUEST_USE;
  247. if (check_locality(chip, loc) >= 0)
  248. return loc; /* we already have the locality */
  249. iic_tpm_write(TPM_ACCESS(loc), &buf, 1);
  250. /* wait for burstcount */
  251. start = get_timer(0);
  252. stop = chip->vendor.timeout_a;
  253. do {
  254. if (check_locality(chip, loc) >= 0)
  255. return loc;
  256. msleep(TPM_TIMEOUT);
  257. } while (get_timer(start) < stop);
  258. return -1;
  259. }
  260. static u8 tpm_tis_i2c_status(struct tpm_chip *chip)
  261. {
  262. /* NOTE: since i2c read may fail, return 0 in this case --> time-out */
  263. u8 buf;
  264. if (iic_tpm_read(TPM_STS(chip->vendor.locality), &buf, 1) < 0)
  265. return 0;
  266. else
  267. return buf;
  268. }
  269. static void tpm_tis_i2c_ready(struct tpm_chip *chip)
  270. {
  271. /* this causes the current command to be aborted */
  272. u8 buf = TPM_STS_COMMAND_READY;
  273. iic_tpm_write_long(TPM_STS(chip->vendor.locality), &buf, 1);
  274. }
  275. static ssize_t get_burstcount(struct tpm_chip *chip)
  276. {
  277. unsigned long start, stop;
  278. ssize_t burstcnt;
  279. u8 buf[3];
  280. /* wait for burstcount */
  281. /* which timeout value, spec has 2 answers (c & d) */
  282. start = get_timer(0);
  283. stop = chip->vendor.timeout_d;
  284. do {
  285. /* Note: STS is little endian */
  286. if (iic_tpm_read(TPM_STS(chip->vendor.locality) + 1, buf, 3)
  287. < 0)
  288. burstcnt = 0;
  289. else
  290. burstcnt = (buf[2] << 16) + (buf[1] << 8) + buf[0];
  291. if (burstcnt)
  292. return burstcnt;
  293. msleep(TPM_TIMEOUT);
  294. } while (get_timer(start) < stop);
  295. return -EBUSY;
  296. }
  297. static int wait_for_stat(struct tpm_chip *chip, u8 mask, unsigned long timeout,
  298. int *status)
  299. {
  300. unsigned long start, stop;
  301. /* check current status */
  302. *status = tpm_tis_i2c_status(chip);
  303. if ((*status & mask) == mask)
  304. return 0;
  305. start = get_timer(0);
  306. stop = timeout;
  307. do {
  308. msleep(TPM_TIMEOUT);
  309. *status = tpm_tis_i2c_status(chip);
  310. if ((*status & mask) == mask)
  311. return 0;
  312. } while (get_timer(start) < stop);
  313. return -ETIME;
  314. }
  315. static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
  316. {
  317. size_t size = 0;
  318. ssize_t burstcnt;
  319. int rc;
  320. while (size < count) {
  321. burstcnt = get_burstcount(chip);
  322. /* burstcount < 0 = tpm is busy */
  323. if (burstcnt < 0)
  324. return burstcnt;
  325. /* limit received data to max. left */
  326. if (burstcnt > (count - size))
  327. burstcnt = count - size;
  328. rc = iic_tpm_read(TPM_DATA_FIFO(chip->vendor.locality),
  329. &(buf[size]),
  330. burstcnt);
  331. if (rc == 0)
  332. size += burstcnt;
  333. }
  334. return size;
  335. }
  336. static int tpm_tis_i2c_recv(struct tpm_chip *chip, u8 *buf, size_t count)
  337. {
  338. int size = 0;
  339. int expected, status;
  340. if (count < TPM_HEADER_SIZE) {
  341. size = -EIO;
  342. goto out;
  343. }
  344. /* read first 10 bytes, including tag, paramsize, and result */
  345. size = recv_data(chip, buf, TPM_HEADER_SIZE);
  346. if (size < TPM_HEADER_SIZE) {
  347. dev_err(chip->dev, "Unable to read header\n");
  348. goto out;
  349. }
  350. expected = get_unaligned_be32(buf + TPM_RSP_SIZE_BYTE);
  351. if ((size_t)expected > count) {
  352. size = -EIO;
  353. goto out;
  354. }
  355. size += recv_data(chip, &buf[TPM_HEADER_SIZE],
  356. expected - TPM_HEADER_SIZE);
  357. if (size < expected) {
  358. dev_err(chip->dev, "Unable to read remainder of result\n");
  359. size = -ETIME;
  360. goto out;
  361. }
  362. wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, &status);
  363. if (status & TPM_STS_DATA_AVAIL) { /* retry? */
  364. dev_err(chip->dev, "Error left over data\n");
  365. size = -EIO;
  366. goto out;
  367. }
  368. out:
  369. tpm_tis_i2c_ready(chip);
  370. /* The TPM needs some time to clean up here,
  371. * so we sleep rather than keeping the bus busy
  372. */
  373. udelay(2000);
  374. release_locality(chip, chip->vendor.locality, 0);
  375. return size;
  376. }
  377. static int tpm_tis_i2c_send(struct tpm_chip *chip, u8 *buf, size_t len)
  378. {
  379. int rc, status;
  380. ssize_t burstcnt;
  381. size_t count = 0;
  382. u8 sts = TPM_STS_GO;
  383. if (len > TPM_BUFSIZE)
  384. return -E2BIG; /* command is too long for our tpm, sorry */
  385. if (request_locality(chip, 0) < 0)
  386. return -EBUSY;
  387. status = tpm_tis_i2c_status(chip);
  388. if ((status & TPM_STS_COMMAND_READY) == 0) {
  389. tpm_tis_i2c_ready(chip);
  390. if (wait_for_stat
  391. (chip, TPM_STS_COMMAND_READY,
  392. chip->vendor.timeout_b, &status) < 0) {
  393. rc = -ETIME;
  394. goto out_err;
  395. }
  396. }
  397. while (count < len - 1) {
  398. burstcnt = get_burstcount(chip);
  399. /* burstcount < 0 = tpm is busy */
  400. if (burstcnt < 0)
  401. return burstcnt;
  402. if (burstcnt > (len-1-count))
  403. burstcnt = len-1-count;
  404. #ifdef CONFIG_TPM_I2C_BURST_LIMITATION
  405. if (burstcnt > CONFIG_TPM_I2C_BURST_LIMITATION)
  406. burstcnt = CONFIG_TPM_I2C_BURST_LIMITATION;
  407. #endif /* CONFIG_TPM_I2C_BURST_LIMITATION */
  408. rc = iic_tpm_write(TPM_DATA_FIFO(chip->vendor.locality),
  409. &(buf[count]), burstcnt);
  410. if (rc == 0)
  411. count += burstcnt;
  412. wait_for_stat(chip, TPM_STS_VALID,
  413. chip->vendor.timeout_c, &status);
  414. if ((status & TPM_STS_DATA_EXPECT) == 0) {
  415. rc = -EIO;
  416. goto out_err;
  417. }
  418. }
  419. /* write last byte */
  420. iic_tpm_write(TPM_DATA_FIFO(chip->vendor.locality), &(buf[count]), 1);
  421. wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, &status);
  422. if ((status & TPM_STS_DATA_EXPECT) != 0) {
  423. rc = -EIO;
  424. goto out_err;
  425. }
  426. /* go and do it */
  427. iic_tpm_write(TPM_STS(chip->vendor.locality), &sts, 1);
  428. return len;
  429. out_err:
  430. tpm_tis_i2c_ready(chip);
  431. /* The TPM needs some time to clean up here,
  432. * so we sleep rather than keeping the bus busy
  433. */
  434. udelay(2000);
  435. release_locality(chip, chip->vendor.locality, 0);
  436. return rc;
  437. }
  438. static struct tpm_vendor_specific tpm_tis_i2c = {
  439. .status = tpm_tis_i2c_status,
  440. .recv = tpm_tis_i2c_recv,
  441. .send = tpm_tis_i2c_send,
  442. .cancel = tpm_tis_i2c_ready,
  443. .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  444. .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  445. .req_canceled = TPM_STS_COMMAND_READY,
  446. };
  447. static enum i2c_chip_type tpm_vendor_chip_type(void)
  448. {
  449. #ifdef CONFIG_OF_CONTROL
  450. const void *blob = gd->fdt_blob;
  451. if (fdtdec_next_compatible(blob, 0, COMPAT_INFINEON_SLB9645_TPM) >= 0)
  452. return SLB9645;
  453. if (fdtdec_next_compatible(blob, 0, COMPAT_INFINEON_SLB9635_TPM) >= 0)
  454. return SLB9635;
  455. #endif
  456. return UNKNOWN;
  457. }
  458. /* initialisation of i2c tpm */
  459. int tpm_vendor_init(uint32_t dev_addr)
  460. {
  461. u32 vendor;
  462. u32 expected_did_vid;
  463. uint old_addr;
  464. int rc = 0;
  465. struct tpm_chip *chip;
  466. old_addr = tpm_dev.addr;
  467. if (dev_addr != 0)
  468. tpm_dev.addr = dev_addr;
  469. tpm_dev.chip_type = tpm_vendor_chip_type();
  470. chip = tpm_register_hardware(&tpm_tis_i2c);
  471. if (chip < 0) {
  472. rc = -ENODEV;
  473. goto out_err;
  474. }
  475. /* Disable interrupts (not supported) */
  476. chip->vendor.irq = 0;
  477. /* Default timeouts */
  478. chip->vendor.timeout_a = TIS_SHORT_TIMEOUT;
  479. chip->vendor.timeout_b = TIS_LONG_TIMEOUT;
  480. chip->vendor.timeout_c = TIS_SHORT_TIMEOUT;
  481. chip->vendor.timeout_d = TIS_SHORT_TIMEOUT;
  482. if (request_locality(chip, 0) != 0) {
  483. rc = -ENODEV;
  484. goto out_err;
  485. }
  486. /* read four bytes from DID_VID register */
  487. if (iic_tpm_read(TPM_DID_VID(0), (uchar *)&vendor, 4) < 0) {
  488. rc = -EIO;
  489. goto out_release;
  490. }
  491. if (tpm_dev.chip_type == SLB9635) {
  492. vendor = be32_to_cpu(vendor);
  493. expected_did_vid = TPM_TIS_I2C_DID_VID_9635;
  494. } else {
  495. /* device id and byte order has changed for newer i2c tpms */
  496. expected_did_vid = TPM_TIS_I2C_DID_VID_9645;
  497. }
  498. if (tpm_dev.chip_type != UNKNOWN && vendor != expected_did_vid) {
  499. dev_err(dev, "vendor id did not match! ID was %08x\n", vendor);
  500. rc = -ENODEV;
  501. goto out_release;
  502. }
  503. dev_info(dev, "1.2 TPM (chip type %s device-id 0x%X)\n",
  504. chip_name[tpm_dev.chip_type], vendor >> 16);
  505. /*
  506. * A timeout query to TPM can be placed here.
  507. * Standard timeout values are used so far
  508. */
  509. return 0;
  510. out_release:
  511. release_locality(chip, 0, 1);
  512. out_err:
  513. tpm_dev.addr = old_addr;
  514. return rc;
  515. }
  516. void tpm_vendor_cleanup(struct tpm_chip *chip)
  517. {
  518. release_locality(chip, chip->vendor.locality, 1);
  519. }