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@@ -23,6 +23,7 @@
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#include <common.h>
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#include <common.h>
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#include <fdtdec.h>
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#include <fdtdec.h>
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#include <asm/io.h>
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#include <asm/io.h>
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+#include <errno.h>
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#include <i2c.h>
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#include <i2c.h>
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#include <lcd.h>
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#include <lcd.h>
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#include <netdev.h>
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#include <netdev.h>
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@@ -35,6 +36,7 @@
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#include <asm/arch/sromc.h>
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#include <asm/arch/sromc.h>
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#include <asm/arch/dp_info.h>
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#include <asm/arch/dp_info.h>
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#include <power/pmic.h>
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#include <power/pmic.h>
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+#include <power/max77686_pmic.h>
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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@@ -80,12 +82,119 @@ int dram_init(void)
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}
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}
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#if defined(CONFIG_POWER)
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#if defined(CONFIG_POWER)
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+static int pmic_reg_update(struct pmic *p, int reg, uint regval)
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+{
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+ u32 val;
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+ int ret = 0;
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+
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+ ret = pmic_reg_read(p, reg, &val);
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+ if (ret) {
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+ debug("%s: PMIC %d register read failed\n", __func__, reg);
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+ return -1;
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+ }
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+ val |= regval;
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+ ret = pmic_reg_write(p, reg, val);
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+ if (ret) {
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+ debug("%s: PMIC %d register write failed\n", __func__, reg);
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+ return -1;
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+ }
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+ return 0;
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+}
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+
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int power_init_board(void)
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int power_init_board(void)
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{
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{
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+ struct pmic *p;
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+
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+ set_ps_hold_ctrl();
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+
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+ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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+
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if (pmic_init(I2C_PMIC))
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if (pmic_init(I2C_PMIC))
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return -1;
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return -1;
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- else
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- return 0;
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+
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+ p = pmic_get("MAX77686_PMIC");
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+ if (!p)
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+ return -ENODEV;
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+
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+ if (pmic_probe(p))
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+ return -1;
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+
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+ if (pmic_reg_update(p, MAX77686_REG_PMIC_32KHZ, MAX77686_32KHCP_EN))
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+ return -1;
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+
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+ if (pmic_reg_update(p, MAX77686_REG_PMIC_BBAT,
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+ MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V))
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+ return -1;
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+
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+ /* VDD_MIF */
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+ if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK1OUT,
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+ MAX77686_BUCK1OUT_1V)) {
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+ debug("%s: PMIC %d register write failed\n", __func__,
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+ MAX77686_REG_PMIC_BUCK1OUT);
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+ return -1;
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+ }
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+
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+ if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK1CRTL,
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+ MAX77686_BUCK1CTRL_EN))
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+ return -1;
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+
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+ /* VDD_ARM */
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+ if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK2DVS1,
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+ MAX77686_BUCK2DVS1_1_3V)) {
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+ debug("%s: PMIC %d register write failed\n", __func__,
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+ MAX77686_REG_PMIC_BUCK2DVS1);
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+ return -1;
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+ }
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+
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+ if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK2CTRL1,
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+ MAX77686_BUCK2CTRL_ON))
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+ return -1;
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+
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+ /* VDD_INT */
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+ if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK3DVS1,
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+ MAX77686_BUCK3DVS1_1_0125V)) {
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+ debug("%s: PMIC %d register write failed\n", __func__,
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+ MAX77686_REG_PMIC_BUCK3DVS1);
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+ return -1;
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+ }
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+
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+ if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK3CTRL,
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+ MAX77686_BUCK3CTRL_ON))
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+ return -1;
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+
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+ /* VDD_G3D */
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+ if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK4DVS1,
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+ MAX77686_BUCK4DVS1_1_2V)) {
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+ debug("%s: PMIC %d register write failed\n", __func__,
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+ MAX77686_REG_PMIC_BUCK4DVS1);
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+ return -1;
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+ }
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+
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+ if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK4CTRL1,
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+ MAX77686_BUCK3CTRL_ON))
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+ return -1;
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+
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+ /* VDD_LDO2 */
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+ if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO2CTRL1,
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+ MAX77686_LD02CTRL1_1_5V | EN_LDO))
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+ return -1;
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+
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+ /* VDD_LDO3 */
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+ if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO3CTRL1,
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+ MAX77686_LD03CTRL1_1_8V | EN_LDO))
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+ return -1;
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+
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+ /* VDD_LDO5 */
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+ if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO5CTRL1,
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+ MAX77686_LD05CTRL1_1_8V | EN_LDO))
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+ return -1;
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+
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+ /* VDD_LDO10 */
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+ if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO10CTRL1,
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+ MAX77686_LD10CTRL1_1_8V | EN_LDO))
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+ return -1;
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+
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+ return 0;
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}
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}
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#endif
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#endif
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