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@@ -28,6 +28,7 @@
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#include <common.h>
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#include <common.h>
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#include <ppc_asm.tmpl>
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#include <ppc_asm.tmpl>
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#include <asm/processor.h>
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#include <asm/processor.h>
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+#include <asm/io.h>
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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@@ -37,6 +38,7 @@ void get_sys_info (sys_info_t * sysInfo)
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{
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{
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volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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uint plat_ratio,e500_ratio,half_freqSystemBus;
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uint plat_ratio,e500_ratio,half_freqSystemBus;
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+ uint lcrr_div;
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plat_ratio = (gur->porpllsr) & 0x0000003e;
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plat_ratio = (gur->porpllsr) & 0x0000003e;
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plat_ratio >>= 1;
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plat_ratio >>= 1;
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@@ -60,6 +62,30 @@ void get_sys_info (sys_info_t * sysInfo)
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sysInfo->freqDDRBus = ddr_ratio * CONFIG_DDR_CLK_FREQ;
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sysInfo->freqDDRBus = ddr_ratio * CONFIG_DDR_CLK_FREQ;
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}
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}
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#endif
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#endif
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+
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+#if defined(CONFIG_SYS_LBC_LCRR)
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+ /* We will program LCRR to this value later */
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+ lcrr_div = CONFIG_SYS_LBC_LCRR & LCRR_CLKDIV;
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+#else
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+ {
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+ volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR);
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+ lcrr_div = in_be32(&lbc->lcrr) & LCRR_CLKDIV;
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+ }
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+#endif
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+ if (lcrr_div == 2 || lcrr_div == 4 || lcrr_div == 8) {
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+#if !defined(CONFIG_MPC8540) && !defined(CONFIG_MPC8541) && \
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+ !defined(CONFIG_MPC8555) && !defined(CONFIG_MPC8560)
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+ /*
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+ * Yes, the entire PQ38 family use the same
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+ * bit-representation for twice the clock divider values.
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+ */
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+ lcrr_div *= 2;
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+#endif
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+ sysInfo->freqLocalBus = sysInfo->freqSystemBus / lcrr_div;
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+ } else {
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+ /* In case anyone cares what the unknown value is */
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+ sysInfo->freqLocalBus = lcrr_div;
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+ }
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}
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}
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@@ -82,6 +108,7 @@ int get_clocks (void)
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gd->cpu_clk = sys_info.freqProcessor;
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gd->cpu_clk = sys_info.freqProcessor;
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gd->bus_clk = sys_info.freqSystemBus;
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gd->bus_clk = sys_info.freqSystemBus;
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gd->mem_clk = sys_info.freqDDRBus;
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gd->mem_clk = sys_info.freqDDRBus;
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+ gd->lbc_clk = sys_info.freqLocalBus;
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/*
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/*
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* The base clock for I2C depends on the actual SOC. Unfortunately,
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* The base clock for I2C depends on the actual SOC. Unfortunately,
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