Merge branch 'master' of git://www.denx.de/git/u-boot

CREDITS

@@ -426,7 +426,7 @@ D: FADS823 configuration, MPC823 video support, I2C, wireless keyboard, lots mor
 
 N: Andre Schwarz
 E: andre.schwarz@matrix-vision.de
-D: Support for Matrix Vision boards (MVBLM7)
+D: Support for Matrix Vision boards (MVBLM7/MVBC_P)
 
 N: Robert Schwebel
 E: r.schwebel@pengutronix.de

MAINTAINERS

@@ -14,261 +14,260 @@
 # PowerPC Systems:							#
 #									#
 # Maintainer Name, Email Address					#
-#	Board			CPU					#
+#	Board		CPU						#
 #########################################################################
 
 Greg Allen <gallen@arlut.utexas.edu>
 
-	UTX8245			MPC8245
+	UTX8245		MPC8245
 
 Pantelis Antoniou <panto@intracom.gr>
 
-	NETVIA			MPC8xx
+	NETVIA		MPC8xx
 
 Reinhard Arlt <reinhard.arlt@esd-electronics.com>
 
-	cpci5200		MPC5200
-	mecp5200		MPC5200
-	pf5200			MPC5200
+	cpci5200	MPC5200
+	mecp5200	MPC5200
+	pf5200		MPC5200
 
-	CPCI750			PPC750FX/GX
+	CPCI750		PPC750FX/GX
 
 Yuli Barcohen <yuli@arabellasw.com>
 
-	Adder			MPC87x/MPC852T
-	ep8248			MPC8248
-	ISPAN			MPC8260
-	MPC8260ADS		MPC826x/MPC827x/MPC8280
-	Rattler			MPC8248
-	ZPC1900			MPC8265
+	Adder		MPC87x/MPC852T
+	ep8248		MPC8248
+	ISPAN		MPC8260
+	MPC8260ADS	MPC826x/MPC827x/MPC8280
+	Rattler		MPC8248
+	ZPC1900		MPC8265
 
 Michael Barkowski <michael.barkowski@freescale.com>
 
-	MPC8323ERDB		MPC8323
+	MPC8323ERDB	MPC8323
 
 Jerry Van Baren <gerald.vanbaren@smiths-aerospace.com>
 
-	sacsng			MPC8260
+	sacsng		MPC8260
 
 Oliver Brown <obrown@adventnetworks.com>
 
-	gw8260			MPC8260
+	gw8260		MPC8260
 
 Conn Clark <clark@esteem.com>
 
-	ESTEEM192E		MPC8xx
+	ESTEEM192E	MPC8xx
 
 Joe D'Abbraccio <ljd015@freescale.com>
 
-	MPC837xERDB		MPC837x
+	MPC837xERDB	MPC837x
 
 Kári Davíðsson <kd@flaga.is>
 
-	FLAGADM			MPC823
+	FLAGADM		MPC823
 
 Torsten Demke <torsten.demke@fci.com>
 
-	eXalion			MPC824x
+	eXalion		MPC824x
 
 Wolfgang Denk <wd@denx.de>
 
-	IceCube_5100		MGT5100
-	IceCube_5200		MPC5200
-
-	AMX860			MPC860
-	ETX094			MPC850
-	FPS850L			MPC850
-	FPS860L			MPC860
-	ICU862			MPC862
-	IP860			MPC860
-	IVML24			MPC860
-	IVML24_128		MPC860
-	IVML24_256		MPC860
-	IVMS8			MPC860
-	IVMS8_128		MPC860
-	IVMS8_256		MPC860
-	LANTEC			MPC850
-	LWMON			MPC823
-	NC650			MPC852
-	R360MPI			MPC823
-	RMU			MPC850
-	RRvision		MPC823
-	SM850			MPC850
-	SPD823TS		MPC823
-	TQM823L			MPC823
-	TQM823L_LCD		MPC823
-	TQM850L			MPC850
-	TQM855L			MPC855
-	TQM860L			MPC860
-	TQM860L_FEC		MPC860
-	c2mon			MPC855
-	hermes			MPC860
-	lwmon			MPC823
-	pcu_e			MPC855
-
-	CU824			MPC8240
-	Sandpoint8240		MPC8240
-	SL8245			MPC8245
-
-	ATC			MPC8250
-	PM825			MPC8250
-
-	TQM8255			MPC8255
-
-	CPU86			MPC8260
-	PM826			MPC8260
-	TQM8260			MPC8260
-
-	P3G4			MPC7410
-
-	PCIPPC2			MPC750
-	PCIPPC6			MPC750
-
-	EXBITGEN		PPC405GP
+	IceCube_5100	MGT5100
+	IceCube_5200	MPC5200
+
+	AMX860		MPC860
+	ETX094		MPC850
+	FPS850L		MPC850
+	FPS860L		MPC860
+	ICU862		MPC862
+	IP860		MPC860
+	IVML24		MPC860
+	IVML24_128	MPC860
+	IVML24_256	MPC860
+	IVMS8		MPC860
+	IVMS8_128	MPC860
+	IVMS8_256	MPC860
+	LANTEC		MPC850
+	LWMON		MPC823
+	NC650		MPC852
+	R360MPI		MPC823
+	RMU		MPC850
+	RRvision	MPC823
+	SM850		MPC850
+	SPD823TS	MPC823
+	TQM823L		MPC823
+	TQM823L_LCD	MPC823
+	TQM850L		MPC850
+	TQM855L		MPC855
+	TQM860L		MPC860
+	TQM860L_FEC	MPC860
+	c2mon		MPC855
+	hermes		MPC860
+	lwmon		MPC823
+	pcu_e		MPC855
+
+	CU824		MPC8240
+	Sandpoint8240	MPC8240
+	SL8245		MPC8245
+
+	ATC		MPC8250
+	PM825		MPC8250
+
+	TQM8255		MPC8255
+
+	CPU86		MPC8260
+	PM826		MPC8260
+	TQM8260		MPC8260
+
+	P3G4		MPC7410
+
+	PCIPPC2		MPC750
+	PCIPPC6		MPC750
+
+	EXBITGEN	PPC405GP
 
 Jon Diekema <jon.diekema@smiths-aerospace.com>
 
-	sbc8260			MPC8260
+	sbc8260		MPC8260
 
 Dave Ellis <DGE@sixnetio.com>
 
-	SXNI855T		MPC8xx
+	SXNI855T	MPC8xx
 
 Thomas Frieden <ThomasF@hyperion-entertainment.com>
 
-	AmigaOneG3SE		MPC7xx
+	AmigaOneG3SE	MPC7xx
 
 Matthias Fuchs <matthias.fuchs@esd-electronics.com>
 
-	ADCIOP			IOP480 (PPC401)
-	APC405			PPC405GP
-	AR405			PPC405GP
-	ASH405			PPC405EP
-	CANBT			PPC405CR
-	CPCI2DP			PPC405GP
-	CPCI405			PPC405GP
-	CPCI4052		PPC405GP
-	CPCI405AB		PPC405GP
-	CPCI405DT		PPC405GP
-	CPCIISER4		PPC405GP
-	DASA_SIM		IOP480 (PPC401)
-	DP405			PPC405EP
-	DU405			PPC405GP
-	DU440			PPC440EPx
-	G2000			PPC405EP
-	HH405			PPC405EP
-	HUB405			PPC405EP
-	OCRTC			PPC405GP
-	ORSG			PPC405GP
-	PCI405			PPC405GP
-	PLU405			PPC405EP
-	PMC405			PPC405GP
-	PMC440			PPC440EPx
-	VOH405			PPC405EP
-	VOM405			PPC405EP
-	WUH405			PPC405EP
-	CMS700			PPC405EP
+	ADCIOP		IOP480 (PPC401)
+	APC405		PPC405GP
+	AR405		PPC405GP
+	ASH405		PPC405EP
+	CANBT		PPC405CR
+	CPCI2DP		PPC405GP
+	CPCI405		PPC405GP
+	CPCI4052	PPC405GP
+	CPCI405AB	PPC405GP
+	CPCI405DT	PPC405GP
+	CPCIISER4	PPC405GP
+	DASA_SIM	IOP480 (PPC401)
+	DP405		PPC405EP
+	DU405		PPC405GP
+	DU440		PPC440EPx
+	G2000		PPC405EP
+	HH405		PPC405EP
+	HUB405		PPC405EP
+	OCRTC		PPC405GP
+	ORSG		PPC405GP
+	PCI405		PPC405GP
+	PLU405		PPC405EP
+	PMC405		PPC405GP
+	PMC440		PPC440EPx
+	VOH405		PPC405EP
+	VOM405		PPC405EP
+	WUH405		PPC405EP
+	CMS700		PPC405EP
 
 Niklaus Giger <niklaus.giger@netstal.com>
 
-	HCU4			PPC405GPr
-	MCU25			PPC405GPr
-	HCU5			PPC440EPx
+	HCU4		PPC405GPr
+	MCU25		PPC405GPr
+	HCU5		PPC440EPx
 
 Frank Gottschling <fgottschling@eltec.de>
 
-	MHPC			MPC8xx
+	MHPC		MPC8xx
 
-	BAB7xx			MPC740/MPC750
+	BAB7xx		MPC740/MPC750
 
 Wolfgang Grandegger <wg@denx.de>
 
-	CCM			MPC855
+	CCM		MPC855
 
-	PN62			MPC8240
-
-	IPHASE4539		MPC8260
-	SCM			MPC8260
+	PN62		MPC8240
+	IPHASE4539	MPC8260
+	SCM		MPC8260
 
 Howard Gray <mvsensor@matrix-vision.de>
 
-	MVS1			MPC823
+	MVS1		MPC823
 
 Joe Hamman <joe.hamman@embeddedspecialties.com>
 
-	sbc8548			MPC8548
-	sbc8641d		MPC8641D
+	sbc8548		MPC8548
+	sbc8641d	MPC8641D
 
 Klaus Heydeck <heydeck@kieback-peter.de>
 
-	KUP4K			MPC855
-	KUP4X			MPC859
+	KUP4K		MPC855
+	KUP4X		MPC859
 
 Gary Jennejohn <garyj@denx.de>
 
-	quad100hd		PPC405EP
+	quad100hd	PPC405EP
 
 Murray Jensen <Murray.Jensen@csiro.au>
 
-	cogent_mpc8xx		MPC8xx
+	cogent_mpc8xx	MPC8xx
 
-	cogent_mpc8260		MPC8260
-	hymod			MPC8260
+	cogent_mpc8260	MPC8260
+	hymod		MPC8260
 
 Larry Johnson <lrj@acm.org>
 
-	korat			PPC440EPx
+	korat		PPC440EPx
 
 Brad Kemp <Brad.Kemp@seranoa.com>
 
-	ppmc8260		MPC8260
+	ppmc8260	MPC8260
 
 Sangmoon Kim <dogoil@etinsys.com>
 
-	debris			MPC8245
-	KVME080			MPC8245
+	debris		MPC8245
+	KVME080		MPC8245
 
 Thomas Lange <thomas@corelatus.se>
 
-	GTH			MPC860
+	GTH		MPC860
 
 Robert Lazarski <robertlazarski@gmail.com>
 
-	ATUM8548		MPC8548
+	ATUM8548	MPC8548
 
 The LEOX team <team@leox.org>
 
-	ELPT860			MPC860T
+	ELPT860		MPC860T
 
 Dave Liu <daveliu@freescale.com>
 
-	MPC8315ERDB		MPC8315
-	MPC832XEMDS		MPC832x
-	MPC8360EMDS		MPC8360
-	MPC837XEMDS		MPC837x
+	MPC8315ERDB	MPC8315
+	MPC832XEMDS	MPC832x
+	MPC8360EMDS	MPC8360
+	MPC837XEMDS	MPC837x
 
 Nye Liu <nyet@zumanetworks.com>
 
-	ZUMA			MPC7xx_74xx
+	ZUMA		MPC7xx_74xx
 
 Jon Loeliger <jdl@freescale.com>
 
-	MPC8540ADS		MPC8540
-	MPC8560ADS		MPC8560
-	MPC8541CDS		MPC8541
-	MPC8555CDS		MPC8555
+	MPC8540ADS	MPC8540
+	MPC8560ADS	MPC8560
+	MPC8541CDS	MPC8541
+	MPC8555CDS	MPC8555
 
-	MPC8641HPCN		MPC8641D
+	MPC8641HPCN	MPC8641D
 
 Dan Malek <dan@embeddedalley.com>
 
-	stxgp3			MPC85xx
-	stxssa			MPC85xx
-	stxxtc			MPC8xx
+	stxgp3		MPC85xx
+	stxssa		MPC85xx
+	stxxtc		MPC8xx
 
 Eran Man <eran@nbase.co.il>
 
-	EVB64260_750CX		MPC750CX
+	EVB64260_750CX	MPC750CX
 
 Andrea "llandre" Marson <andrea.marson@dave-tech.it>
 
@@ -276,75 +275,75 @@ Andrea "llandre" Marson <andrea.marson@dave-tech.it>
 
 Reinhard Meyer <r.meyer@emk-elektronik.de>
 
-	TOP860			MPC860T
-	TOP5200			MPC5200
+	TOP860		MPC860T
+	TOP5200		MPC5200
 
 Tolunay Orkun <torkun@nextio.com>
 
-	csb272			PPC405GP
-	csb472			PPC405GP
+	csb272		PPC405GP
+	csb472		PPC405GP
 
 John Otken <jotken@softadvances.com>
 
-	luan			PPC440SP
-	taihu			PPC405EP
+	luan		PPC440SP
+	taihu		PPC405EP
 
 Keith Outwater <Keith_Outwater@mvis.com>
 
-	GEN860T			MPC860T
-	GEN860T_SC		MPC860T
+	GEN860T		MPC860T
+	GEN860T_SC	MPC860T
 
 Frank Panno <fpanno@delphintech.com>
 
-	ep8260			MPC8260
+	ep8260		MPC8260
 
 Denis Peter <d.peter@mpl.ch>
 
-	MIP405			PPC4xx
-	PIP405			PPC4xx
+	MIP405		PPC4xx
+	PIP405		PPC4xx
 
 Kim Phillips <kim.phillips@freescale.com>
 
-	MPC8349EMDS		MPC8349
+	MPC8349EMDS	MPC8349
 
 Daniel Poirot <dan.poirot@windriver.com>
 
-	sbc8240			MPC8240
-	sbc405			PPC405GP
+	sbc8240		MPC8240
+	sbc405		PPC405GP
 
 Stefan Roese <sr@denx.de>
 
-	P3M7448			MPC7448
-
-	uc100			MPC857
-
-	TQM85xx			MPC8540/8541/8555/8560
-
-	acadia			PPC405EZ
-	alpr			PPC440GX
-	bamboo			PPC440EP
-	bunbinga		PPC405EP
-	canyonlands		PPC460EX
-	ebony			PPC440GP
-	glacier			PPC460GT
-	haleakala		PPC405EXr
-	katmai			PPC440SPe
-	kilauea			PPC405EX
-	lwmon5			PPC440EPx
-	makalu			PPC405EX
-	ocotea			PPC440GX
-	p3p440			PPC440GP
-	pcs440ep		PPC440EP
-	rainier			PPC440GRx
-	sequoia			PPC440EPx
-	sycamore		PPC405GPr
-	taishan			PPC440GX
-	walnut			PPC405GP
-	yellowstone		PPC440GR
-	yosemite		PPC440EP
-	zeus			PPC405EP
-
-	P3M750			PPC750FX/GX/GL
+	P3M7448		MPC7448
+
+	uc100		MPC857
+
+	TQM85xx		MPC8540/8541/8555/8560
+
+	acadia		PPC405EZ
+	alpr		PPC440GX
+	bamboo		PPC440EP
+	bunbinga	PPC405EP
+	canyonlands	PPC460EX
+	ebony		PPC440GP
+	glacier		PPC460GT
+	haleakala	PPC405EXr
+	katmai		PPC440SPe
+	kilauea		PPC405EX
+	lwmon5		PPC440EPx
+	makalu		PPC405EX
+	ocotea		PPC440GX
+	p3p440		PPC440GP
+	pcs440ep	PPC440EP
+	rainier		PPC440GRx
+	sequoia		PPC440EPx
+	sycamore	PPC405GPr
+	taishan		PPC440GX
+	walnut		PPC405GP
+	yellowstone	PPC440GR
+	yosemite	PPC440EP
+	zeus		PPC405EP
+
+	P3M750		PPC750FX/GX/GL
 
 Yusdi Santoso <yusdi_santoso@adaptec.com>
 
@@ -352,404 +351,405 @@ Yusdi Santoso <yusdi_santoso@adaptec.com>
 
 Travis Sawyer (travis.sawyer@sandburst.com>
 
-	KAREF			PPC440GX
-	METROBOX		PPC440GX
-	XPEDITE1K		PPC440GX
+	KAREF		PPC440GX
+	METROBOX	PPC440GX
+	XPEDITE1K	PPC440GX
 
 Heiko Schocher <hs@denx.de>
 
-	ids8247			MPC8247
-	jupiter			MPC5200
-	mgcoge			MPC8247
-	mgsuvd			MPC852
-	municse			MPC5200
-	sc3			PPC405GP
-	uc101			MPC5200
+	ids8247		MPC8247
+	jupiter		MPC5200
+	mgcoge		MPC8247
+	mgsuvd		MPC852
+	municse		MPC5200
+	sc3		PPC405GP
+	uc101		MPC5200
 
 
 Peter De Schrijver <p2@mind.be>
 
-	ML2			PPC4xx
+	ML2		PPC4xx
 
 Andre Schwarz <andre.schwarz@matrix-vision.de>
 
-	mvblm7			MPC8343
+	mvbc_p		MPC5200
+	mvblm7		MPC8343
 
 Timur Tabi <timur@freescale.com>
 
-	MPC8349E-mITX		MPC8349
-	MPC8349E-mITX-GP	MPC8349
+	MPC8349E-mITX	MPC8349
+	MPC8349E-mITX-GP MPC8349
 
 Erik Theisen <etheisen@mindspring.com>
 
-	W7OLMC			PPC4xx
-	W7OLMG			PPC4xx
+	W7OLMC		PPC4xx
+	W7OLMG		PPC4xx
 
 Jim Thompson <jim@musenki.com>
 
-	MUSENKI			MPC8245/8241
-	Sandpoint8245		MPC8245
+	MUSENKI		MPC8245/8241
+	Sandpoint8245	MPC8245
 
 Rune Torgersen <runet@innovsys.com>
 
-	MPC8266ADS		MPC8266
+	MPC8266ADS	MPC8266
 
 
 David Updegraff <dave@cray.com>
 
-	CRAYL1			PPC4xx
+	CRAYL1		PPC4xx
 
 Anton Vorontsov <avorontsov@ru.mvista.com>
 
-	MPC8360ERDK		MPC8360
+	MPC8360ERDK	MPC8360
 
 Josef Wagner <Wagner@Microsys.de>
 
-	CPC45			MPC8245
-	PM520			MPC5200
+	CPC45		MPC8245
+	PM520		MPC5200
 
 Stephen Williams <steve@icarus.com>
 
-	JSE			PPC405GPr
+	JSE		PPC405GPr
 
 John Zhan <zhanz@sinovee.com>
 
-	svm_sc8xx		MPC8xx
+	svm_sc8xx	MPC8xx
 
 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
 
-	linkstation		MPC8241
+	linkstation	MPC8241
 
 -------------------------------------------------------------------------
 
 Unknown / orphaned boards:
 
-	ADS860			MPC8xx
-	FADS823			MPC8xx
-	FADS850SAR		MPC8xx
-	FADS860T		MPC8xx
-	GENIETV			MPC8xx
-	IAD210			MPC8xx
-	MBX			MPC8xx
-	MBX860T			MPC8xx
-	NX823			MPC8xx
-	RPXClassic		MPC8xx
-	RPXlite			MPC8xx
+	ADS860		MPC8xx
+	FADS823		MPC8xx
+	FADS850SAR	MPC8xx
+	FADS860T	MPC8xx
+	GENIETV		MPC8xx
+	IAD210		MPC8xx
+	MBX		MPC8xx
+	MBX860T		MPC8xx
+	NX823		MPC8xx
+	RPXClassic	MPC8xx
+	RPXlite		MPC8xx
 
-	ERIC			PPC4xx
+	ERIC		PPC4xx
 
-	MOUSSE			MPC824x
+	MOUSSE		MPC824x
 
-	RPXsuper		MPC8260
-	rsdproto		MPC8260
+	RPXsuper	MPC8260
+	rsdproto	MPC8260
 
-	EVB64260		MPC7xx_74xx
+	EVB64260	MPC7xx_74xx
 
 
 #########################################################################
 # ARM Systems:								#
 #									#
 # Maintainer Name, Email Address					#
-#	Board			CPU					#
+#	Board		CPU						#
 #########################################################################
 
 Rowel Atienza <rowel@diwalabs.com>
 
-	armadillo		ARM720T
+	armadillo	ARM720T
 
 Rishi Bhattacharya <rishi@ti.com>
 
-	omap5912osk		ARM926EJS
+	omap5912osk	ARM926EJS
 
 Cliff Brake <cliff.brake@gmail.com>
 
-	pxa255_idp		xscale
+	pxa255_idp	xscale
 
 Rick Bronson <rick@efn.org>
 
-	AT91RM9200DK		at91rm9200
+	AT91RM9200DK	at91rm9200
 
 George G. Davis <gdavis@mvista.com>
 
-	assabet			SA1100
-	gcplus			SA1100
+	assabet		SA1100
+	gcplus		SA1100
 
 Thomas Elste <info@elste.org>
 
-	modnet50		ARM720T (NET+50)
+	modnet50	ARM720T (NET+50)
 
 Peter Figuli <peposh@etc.sk>
 
-	wepep250		xscale
+	wepep250	xscale
 
 Marius Gröger <mag@sysgo.de>
 
-	impa7			ARM720T (EP7211)
-	ep7312			ARM720T (EP7312)
+	impa7		ARM720T (EP7211)
+	ep7312		ARM720T (EP7312)
 
 Kshitij Gupta <kshitij@ti.com>
 
-	omap1510inn		ARM925T
-	omap1610inn		ARM926EJS
-
-Kyle Harris <kharris@nexus-tech.net>
-
-	lubbock			xscale
-	cradle			xscale
-	ixdp425			xscale
+	omap1510inn	ARM925T
+	omap1610inn	ARM926EJS
 
 Gary Jennejohn <gj@denx.de>
 
-	smdk2400		ARM920T
-	trab			ARM920T
+	smdk2400	ARM920T
+	trab		ARM920T
 
 Konstantin Kletschke <kletschke@synertronixx.de>
-	scb9328			ARM920T
+	scb9328		ARM920T
 
 Nishant Kamat <nskamat@ti.com>
 
-	omap1610h2		ARM926EJS
+	omap1610h2	ARM926EJS
 
 Sergey Kubushyn <ksi@koi8.net>
 
-	DV-EVM			ARM926EJS
-	SONATA			ARM926EJS
-	SCHMOOGIE		ARM926EJS
+	DV-EVM		ARM926EJS
+	SONATA		ARM926EJS
+	SCHMOOGIE	ARM926EJS
 
 Prakash Kumar <prakash@embedx.com>
 
-	cerf250			xscale
+	cerf250		xscale
 
 David Müller <d.mueller@elsoft.ch>
 
-	smdk2410		ARM920T
-	VCMA9			ARM920T
+	smdk2410	ARM920T
+	VCMA9		ARM920T
 
 Rolf Offermanns <rof@sysgo.de>
 
-	shannon			SA1100
+	shannon		SA1100
 
 Peter Pearse <peter.pearse@arm.com>
-	integratorcp		All current ARM supplied &
-				supported core modules
-				-see http://www.arm.com
-				/products/DevTools
-				/Hardware_Platforms.html
-	versatile		ARM926EJ-S
-	versatile		ARM926EJ-S
+	integratorcp	All current ARM supplied & supported core modules
+			-see http://www.arm.com/products/DevTools/Hardware_Platforms.html
+	versatile	ARM926EJ-S
+	versatile	ARM926EJ-S
 
 Dave Peverley <dpeverley@mpc-data.co.uk>
 
-	omap730p2		ARM926EJS
+	omap730p2	ARM926EJS
 
 Stelian Pop <stelian.pop@leadtechdesign.com>
 
-	at91cap9adk		ARM926EJS (AT91CAP9 SoC)
-	at91sam9260ek		ARM926EJS (AT91SAM9260 SoC)
-	at91sam9261ek		ARM926EJS (AT91SAM9261 SoC)
-	at91sam9263ek		ARM926EJS (AT91SAM9263 SoC)
-	at91sam9rlek		ARM926EJS (AT91SAM9RL SoC)
+	at91cap9adk	ARM926EJS (AT91CAP9 SoC)
+	at91sam9260ek	ARM926EJS (AT91SAM9260 SoC)
+	at91sam9261ek	ARM926EJS (AT91SAM9261 SoC)
+	at91sam9263ek	ARM926EJS (AT91SAM9263 SoC)
+	at91sam9rlek	ARM926EJS (AT91SAM9RL SoC)
 
 Stefan Roese <sr@denx.de>
 
-	ixdpg425		xscale
-	pdnb3			xscale
-	scpu			xscale
+	ixdpg425	xscale
+	pdnb3		xscale
+	scpu		xscale
 
 Robert Schwebel <r.schwebel@pengutronix.de>
 
-	csb226			xscale
-	innokom			xscale
+	csb226		xscale
+	innokom		xscale
 
 Andrea Scian <andrea.scian@dave-tech.it>
 
-	B2			ARM7TDMI (S3C44B0X)
+	B2		ARM7TDMI (S3C44B0X)
 
 Greg Ungerer <greg.ungerer@opengear.com>
 
-	cm4008			ks8695p
-	cm4116			ks8695p
-	cm4148			ks8695p
+	cm4008		ks8695p
+	cm4116		ks8695p
+	cm4148		ks8695p
 
 Richard Woodruff <r-woodruff2@ti.com>
 
-	omap2420h4		ARM1136EJS
+	omap2420h4	ARM1136EJS
 
 Kyungmin Park <kyungmin.park@samsung.com>
 
-	apollon			ARM1136EJS
+	apollon		ARM1136EJS
 
 Alex Züpke <azu@sysgo.de>
 
-	lart			SA1100
-	dnp1110			SA1110
+	lart		SA1100
+	dnp1110		SA1110
 
 Michael Schwingen <michael@schwingen.org>
 
-	actux1			xscale
-	actux2			xscale
-	actux3			xscale
-	actux4			xscale
+	actux1		xscale
+	actux2		xscale
+	actux3		xscale
+	actux4		xscale
+
+-------------------------------------------------------------------------
+
+Unknown / orphaned boards:
+ 	Board		CPU	Last known maintainer / Comment
+.........................................................................
+	cradle		xscale	Kyle Harris <kharris@nexus-tech.net> / dead address
+	ixdp425		xscale	Kyle Harris <kharris@nexus-tech.net> / dead address
+	lubbock		xscale	Kyle Harris <kharris@nexus-tech.net> / dead address
 
 #########################################################################
 # x86 Systems:								#
 #									#
 # Maintainer Name, Email Address					#
-#	Board			CPU					#
+#	Board		CPU						#
 #########################################################################
 
 Daniel Engström <daniel@omicron.se>
 
-	sc520_cdp		x86
+	sc520_cdp	x86
 
 #########################################################################
 # MIPS Systems:								#
 #									#
 # Maintainer Name, Email Address					#
-#	Board			CPU					#
+#	Board		CPU						#
 #########################################################################
 
 Wolfgang Denk <wd@denx.de>
 
-	incaip			MIPS32 4Kc
-	purple			MIPS64 5Kc
+	incaip		MIPS32 4Kc
+	purple		MIPS64 5Kc
 
 Thomas Lange <thomas@corelatus.se>
-	dbau1x00		MIPS32 Au1000
-	gth2			MIPS32 Au1000
+	dbau1x00	MIPS32 Au1000
+	gth2		MIPS32 Au1000
 
 Vlad Lungu <vlad.lungu@windriver.com>
-	qemu_mips		MIPS32
+	qemu_mips	MIPS32
 
 #########################################################################
 # Nios-32 Systems:							#
 #									#
 # Maintainer Name, Email Address					#
-#	Board			CPU					#
+#	Board		CPU						#
 #########################################################################
 
 Stephan Linz <linz@li-pro.net>
 
-	DK1S10			Nios-32
-	ADNPESC1		Nios-32
+	DK1S10		Nios-32
+	ADNPESC1	Nios-32
 
 Scott McNutt <smcnutt@psyent.com>
 
-	DK1C20			Nios-32
+	DK1C20		Nios-32
 
 #########################################################################
 # Nios-II Systems:							#
 #									#
 # Maintainer Name, Email Address					#
-#	Board			CPU					#
+#	Board		CPU						#
 #########################################################################
 
 Scott McNutt <smcnutt@psyent.com>
 
-	PCI5441			Nios-II
-	PK1C20			Nios-II
-	EP1C20			Nios-II
-	EP1S10			Nios-II
-	EP1S40			Nios-II
+	PCI5441		Nios-II
+	PK1C20		Nios-II
+	EP1C20		Nios-II
+	EP1S10		Nios-II
+	EP1S40		Nios-II
 
 #########################################################################
 # MicroBlaze Systems:							#
 #									#
 # Maintainer Name, Email Address					#
-#	Board			CPU					#
+#	Board		CPU						#
 #########################################################################
 
 Yasushi Shoji <yashi@atmark-techno.com>
 
-	SUZAKU			MicroBlaze
+	SUZAKU		MicroBlaze
 
 Michal Simek <monstr@monstr.eu>
 
-	ML401			MicroBlaze
-	XUPV2P			MicroBlaze
+	ML401		MicroBlaze
+	XUPV2P		MicroBlaze
 
 #########################################################################
 # Coldfire Systems:							#
 #									#
 # Maintainer Name, Email Address					#
-#	Board			CPU					#
+#	Board		CPU						#
 #########################################################################
 
 Matthias Fuchs <matthias.fuchs@esd-electronics.com>
 
-	TASREG			MCF5249
+	TASREG		MCF5249
 
 TsiChung Liew <Tsi-Chung.Liew@freescale.com>
 
-	M52277EVB		mcf5227x
-	M5235EVB		mcf52x2
-	M5329EVB		mcf532x
-	M5373EVB		mcf532x
-	M54455EVB		mcf5445x
-	M5475EVB		mcf547x_8x
-	M5485EVB		mcf547x_8x
+	M52277EVB	mcf5227x
+	M5235EVB	mcf52x2
+	M5329EVB	mcf532x
+	M5373EVB	mcf532x
+	M54455EVB	mcf5445x
+	M5475EVB	mcf547x_8x
+	M5485EVB	mcf547x_8x
 
 Hayden Fraser <Hayden.Fraser@freescale.com>
 
-	M5253EVBE		mcf52x2
+	M5253EVBE	mcf52x2
 
 #########################################################################
 # AVR32 Systems:							#
 #									#
 # Maintainer Name, Email Address					#
-#	Board			CPU					#
+#	Board		CPU						#
 #########################################################################
 
 Haavard Skinnemoen <hskinnemoen@atmel.com>
 
-	ATSTK1000		AT32AP7xxx
-	ATSTK1002		AT32AP7000
-	ATSTK1003		AT32AP7001
-	ATSTK1004		AT32AP7002
-	ATSTK1006		AT32AP7000
-	ATNGW100		AT32AP7000
+	ATSTK1000	AT32AP7xxx
+	ATSTK1002	AT32AP7000
+	ATSTK1003	AT32AP7001
+	ATSTK1004	AT32AP7002
+	ATSTK1006	AT32AP7000
+	ATNGW100	AT32AP7000
 
 #########################################################################
 # SuperH Systems:							#
 #									#
 # Maintainer Name, Email Address					#
-#	Board			CPU					#
+#	Board		CPU						#
 #########################################################################
 
 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
 
-	MS7750SE		SH7750
-	MS7722SE		SH7722
-	R7780MP			SH7780
-	R2DPlus			SH7751R
-	SH7763RDP		SH7763
+	MS7750SE	SH7750
+	MS7722SE	SH7722
+	R7780MP		SH7780
+	R2DPlus		SH7751R
+	SH7763RDP	SH7763
 
 Mark Jonas <mark.jonas@de.bosch.com>
 
-	mpr2			SH7720
+	mpr2		SH7720
 
 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
 
-	MS7720SE		SH7720
+	MS7720SE	SH7720
 
 Yusuke Goda <goda.yusuke@renesas.com>
 
-	MIGO-R			SH7722
+	MIGO-R		SH7722
 
 #########################################################################
 # Blackfin Systems:							#
 #									#
 # Maintainer Name, Email Address					#
-#	Board			CPU					#
+#	Board		CPU						#
 #########################################################################
 
 Mike Frysinger <vapier@gentoo.org>
 Blackfin Team <u-boot-devel@blackfin.uclinux.org>
 
-	BF533-EZKIT		BF533
-	BF533-STAMP		BF533
-	BF537-STAMP		BF537
-	BF561-EZKIT		BF561
+	BF533-EZKIT	BF533
+	BF533-STAMP	BF533
+	BF537-STAMP	BF537
+	BF561-EZKIT	BF561
 
 #########################################################################
 # End of MAINTAINERS list						#

MAKEALL

@@ -48,6 +48,7 @@ LIST_5xxx="		\
 	mecp5200	\
 	motionpro	\
 	munices		\
+	MVBC_P		\
 	o2dnt		\
 	pf5200		\
 	PM520		\
@@ -461,13 +462,6 @@ LIST_ARM7="		\
 #########################################################################
 
 LIST_ARM9="			\
-	at91cap9adk		\
-	at91rm9200dk		\
-	at91sam9260ek		\
-	at91sam9261ek		\
-	at91sam9263ek		\
-	at91sam9rlek		\
-	cmc_pu2			\
 	ap920t			\
 	ap922_XA10		\
 	ap926ejs		\
@@ -478,11 +472,7 @@ LIST_ARM9="			\
 	cp926ejs		\
 	cp946es			\
 	cp966			\
-	csb637			\
-	kb9202			\
 	lpd7a400		\
-	m501sk			\
-	mp2usb			\
 	mx1ads			\
 	mx1fs2			\
 	netstar			\
@@ -587,6 +577,7 @@ LIST_arm="		\
 	${LIST_ARM9}	\
 	${LIST_ARM10}	\
 	${LIST_ARM11}	\
+	${LIST_at91}	\
 	${LIST_pxa}	\
 	${LIST_ixp}	\
 "
@@ -701,7 +692,7 @@ LIST_coldfire="			\
 	M52277EVB		\
 	M5235EVB		\
 	M5249EVB		\
-	M5253EVB		\
+	M5253EVBE		\
 	M5271EVB		\
 	M5272C3			\
 	M5275EVB		\

Makefile

@@ -23,8 +23,8 @@
 
 VERSION = 1
 PATCHLEVEL = 3
-SUBLEVEL = 3
-EXTRAVERSION =
+SUBLEVEL = 4
+EXTRAVERSION = -rc1
 U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
 VERSION_FILE = $(obj)include/version_autogenerated.h
 
@@ -493,6 +493,9 @@ aev_config: unconfig
 BC3450_config:	unconfig
 	@$(MKCONFIG) -a BC3450 ppc mpc5xxx bc3450
 
+cm5200_config:	unconfig
+	@$(MKCONFIG) -a cm5200 ppc mpc5xxx cm5200
+
 cpci5200_config:  unconfig
 	@$(MKCONFIG) -a cpci5200  ppc mpc5xxx cpci5200 esd
 
@@ -540,9 +543,6 @@ icecube_5100_config:			unconfig
 jupiter_config:	unconfig
 	@$(MKCONFIG) jupiter ppc mpc5xxx jupiter
 
-v38b_config: unconfig
-	@$(MKCONFIG) -a v38b ppc mpc5xxx v38b
-
 inka4x0_config:	unconfig
 	@$(MKCONFIG) inka4x0 ppc mpc5xxx inka4x0
 
@@ -617,9 +617,20 @@ prs200_highboot_DDR_config:	unconfig
 mecp5200_config:  unconfig
 	@$(MKCONFIG) mecp5200  ppc mpc5xxx mecp5200 esd
 
+motionpro_config:	unconfig
+	@$(MKCONFIG) motionpro ppc mpc5xxx motionpro
+
 munices_config:	unconfig
 	@$(MKCONFIG) munices ppc mpc5xxx munices
 
+MVBC_P_config: unconfig
+	@mkdir -p $(obj)include
+	@mkdir -p $(obj)board/mvbc_p
+	@ >$(obj)include/config.h
+	@[ -z "$(findstring MVBC_P,$@)" ] || \
+	{   	echo "#define CONFIG_MVBC_P" 	>>$(obj)include/config.h; }
+	@$(MKCONFIG) -n $@ -a MVBC_P ppc mpc5xxx mvbc_p matrix_vision
+
 o2dnt_config:	unconfig
 	@$(MKCONFIG) o2dnt ppc mpc5xxx o2dnt
 
@@ -644,9 +655,6 @@ PM520_ROMBOOT_DDR_config:	unconfig
 smmaco4_config: unconfig
 	@$(MKCONFIG) -a smmaco4 ppc mpc5xxx tqm5200 tqc
 
-cm5200_config:	unconfig
-	@$(MKCONFIG) -a cm5200 ppc mpc5xxx cm5200
-
 spieval_config:	unconfig
 	@$(MKCONFIG) -a spieval ppc mpc5xxx tqm5200 tqc
 
@@ -740,22 +748,23 @@ TQM5200_STK100_config:	unconfig
 		{ echo "TEXT_BASE = 0xFFF00000" >$(obj)board/tqm5200/config.tmp ; \
 		}
 	@$(MKCONFIG) -n $@ -a TQM5200 ppc mpc5xxx tqm5200 tqc
+
 uc101_config:		unconfig
 	@$(MKCONFIG) uc101 ppc mpc5xxx uc101
-motionpro_config:	unconfig
-	@$(MKCONFIG) motionpro ppc mpc5xxx motionpro
 
+v38b_config: unconfig
+	@$(MKCONFIG) -a v38b ppc mpc5xxx v38b
 
 #########################################################################
 ## MPC512x Systems
 #########################################################################
+
 ads5121_config \
-ads5121_PCI_config \
-	:		 unconfig
+ads5121_rev2_config	\
+	: unconfig
 	@mkdir -p $(obj)include
-	@if [ "$(findstring _PCI_,$@)" ] ; then \
-		echo "#define CONFIG_PCI"  >>$(obj)include/config.h ; \
-		$(XECHO) "... with PCI enabled" ; \
+	@if [ "$(findstring rev2,$@)" ] ; then \
+		echo "#define CONFIG_ADS5121_REV2 1" > $(obj)include/config.h; \
 	fi
 	@$(MKCONFIG) -a ads5121 ppc mpc512x ads5121
 
@@ -1220,6 +1229,9 @@ CATcenter_33_config:	unconfig
 		}
 	@$(MKCONFIG) -a $(call xtract_4xx,$@) ppc ppc4xx PPChameleonEVB dave
 
+CMS700_config:	unconfig
+	@$(MKCONFIG) $(@:_config=) ppc ppc4xx cms700 esd
+
 CPCI2DP_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx cpci2dp esd
 
@@ -1401,6 +1413,9 @@ quad100hd_config:	unconfig
 sbc405_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx sbc405
 
+sc3_config:unconfig
+	@$(MKCONFIG) $(@:_config=) ppc ppc4xx sc3
+
 sequoia_config \
 rainier_config: unconfig
 	@mkdir -p $(obj)include
@@ -1419,9 +1434,6 @@ rainier_nand_config: unconfig
 	@echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/sequoia/config.tmp
 	@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
 
-sc3_config:unconfig
-	@$(MKCONFIG) $(@:_config=) ppc ppc4xx sc3
-
 taihu_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx taihu amcc
 
@@ -1434,9 +1446,6 @@ VOH405_config:	unconfig
 VOM405_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx vom405 esd
 
-CMS700_config:	unconfig
-	@$(MKCONFIG) $(@:_config=) ppc ppc4xx cms700 esd
-
 W7OLMC_config	\
 W7OLMG_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc ppc4xx w7o
@@ -1861,9 +1870,6 @@ M5275EVB_config :		unconfig
 M5282EVB_config :		unconfig
 	@$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5282evb
 
-TASREG_config :		unconfig
-	@$(MKCONFIG) $(@:_config=) m68k mcf52x2 tasreg esd
-
 M5329AFEE_config \
 M5329BFEE_config :	unconfig
 	@case "$@" in \
@@ -1983,6 +1989,9 @@ M5485HFE_config :	unconfig
 	fi
 	@$(MKCONFIG) -a M5485EVB m68k mcf547x_8x m548xevb freescale
 
+TASREG_config :		unconfig
+	@$(MKCONFIG) $(@:_config=) m68k mcf52x2 tasreg esd
+
 #########################################################################
 ## MPC83xx Systems
 #########################################################################
@@ -2306,12 +2315,12 @@ PCIPPC2_config \
 PCIPPC6_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx pcippc2
 
-ZUMA_config:	unconfig
-	@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx evb64260
-
 ppmc7xx_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx ppmc7xx
 
+ZUMA_config:	unconfig
+	@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx evb64260
+
 #========================================================================
 # ARM
 #========================================================================
@@ -2363,12 +2372,12 @@ csb637_config	:	unconfig
 kb9202_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t kb9202 NULL at91rm9200
 
-mp2usb_config	:	unconfig
-	@$(MKCONFIG) $(@:_config=) arm arm920t mp2usb NULL at91rm9200
-
 m501sk_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t m501sk NULL at91rm9200
 
+mp2usb_config	:	unconfig
+	@$(MKCONFIG) $(@:_config=) arm arm920t mp2usb NULL at91rm9200
+
 #########################################################################
 ## Atmel ARM926EJ-S Systems
 #########################################################################
@@ -2405,6 +2414,18 @@ cp922_XA10_config	\
 cp1026_config: unconfig
 	@board/integratorcp/split_by_variant.sh $@
 
+davinci_dvevm_config :	unconfig
+	@$(MKCONFIG) $(@:_config=) arm arm926ejs dv-evm davinci davinci
+
+davinci_schmoogie_config :	unconfig
+	@$(MKCONFIG) $(@:_config=) arm arm926ejs schmoogie davinci davinci
+
+davinci_sffsdr_config :	unconfig
+	@$(MKCONFIG) $(@:_config=) arm arm926ejs sffsdr davinci davinci
+
+davinci_sonata_config :	unconfig
+	@$(MKCONFIG) $(@:_config=) arm arm926ejs sonata davinci davinci
+
 lpd7a400_config \
 lpd7a404_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm lh7a40x lpd7a40x
@@ -2421,21 +2442,6 @@ netstar_config:		unconfig
 omap1510inn_config :	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm925t omap1510inn
 
-omap5912osk_config :	unconfig
-	@$(MKCONFIG) $(@:_config=) arm arm926ejs omap5912osk NULL omap
-
-davinci_dvevm_config :	unconfig
-	@$(MKCONFIG) $(@:_config=) arm arm926ejs dv-evm davinci davinci
-
-davinci_schmoogie_config :	unconfig
-	@$(MKCONFIG) $(@:_config=) arm arm926ejs schmoogie davinci davinci
-
-davinci_sffsdr_config :	unconfig
-	@$(MKCONFIG) $(@:_config=) arm arm926ejs sffsdr davinci davinci
-
-davinci_sonata_config :	unconfig
-	@$(MKCONFIG) $(@:_config=) arm arm926ejs sonata davinci davinci
-
 xtract_omap1610xxx = $(subst _cs0boot,,$(subst _cs3boot,,$(subst _cs_autoboot,,$(subst _config,,$1))))
 
 omap1610inn_config \
@@ -2459,6 +2465,9 @@ omap1610h2_cs_autoboot_config:	unconfig
 	fi;
 	@$(MKCONFIG) -a $(call xtract_omap1610xxx,$@) arm arm926ejs omap1610inn NULL omap
 
+omap5912osk_config :	unconfig
+	@$(MKCONFIG) $(@:_config=) arm arm926ejs omap5912osk NULL omap
+
 xtract_omap730p2 = $(subst _cs0boot,,$(subst _cs3boot,, $(subst _config,,$1)))
 
 omap730p2_config \
@@ -2520,9 +2529,16 @@ trab_old_config:	unconfig
 VCMA9_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm920t vcma9 mpl s3c24x0
 
-#========================================================================
+#########################################################################
 # ARM supplied Versatile development boards
-#========================================================================
+#########################################################################
+
+cm4008_config	:	unconfig
+	@$(MKCONFIG) $(@:_config=) arm arm920t cm4008 NULL ks8695
+
+cm41xx_config	:	unconfig
+	@$(MKCONFIG) $(@:_config=) arm arm920t cm41xx NULL ks8695
+
 versatile_config	\
 versatileab_config	\
 versatilepb_config :	unconfig
@@ -2531,12 +2547,6 @@ versatilepb_config :	unconfig
 voiceblue_config:	unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm925t voiceblue
 
-cm4008_config	:	unconfig
-	@$(MKCONFIG) $(@:_config=) arm arm920t cm4008 NULL ks8695
-
-cm41xx_config	:	unconfig
-	@$(MKCONFIG) $(@:_config=) arm arm920t cm41xx NULL ks8695
-
 #########################################################################
 ## S3C44B0 Systems
 #########################################################################
@@ -2651,8 +2661,6 @@ zylonite_config :
 #########################################################################
 ## ARM1136 Systems
 #########################################################################
-omap2420h4_config	: unconfig
-	@$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
 
 apollon_config		: unconfig
 	@mkdir -p $(obj)include
@@ -2669,6 +2677,9 @@ imx31_phycore_config	: unconfig
 mx31ads_config		: unconfig
 	@$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads NULL mx31
 
+omap2420h4_config	: unconfig
+	@$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
+
 #========================================================================
 # i386
 #========================================================================
@@ -2718,6 +2729,7 @@ tb0229_config: unconfig
 #########################################################################
 ## MIPS32 AU1X00
 #########################################################################
+
 dbau1000_config		:	unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_DBAU1000 1" >$(obj)include/config.h
@@ -2743,17 +2755,17 @@ dbau1550_el_config	:	unconfig
 	@echo "#define CONFIG_DBAU1550 1" >$(obj)include/config.h
 	@$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
 
+gth2_config		:	unconfig
+	@mkdir -p $(obj)include
+	@echo "#define CONFIG_GTH2 1" >$(obj)include/config.h
+	@$(MKCONFIG) -a gth2 mips mips gth2
+
 pb1000_config		:	unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_PB1000 1" >$(obj)include/config.h
 	@$(MKCONFIG) -a pb1x00 mips mips pb1x00
 
-gth2_config:	unconfig
-	@mkdir -p $(obj)include
-	@echo "#define CONFIG_GTH2 1" >$(obj)include/config.h
-	@$(MKCONFIG) -a gth2 mips mips gth2
-
-qemu_mips_config: unconfig
+qemu_mips_config	: unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_QEMU_MIPS 1" >$(obj)include/config.h
 	@$(MKCONFIG) -a qemu-mips mips mips qemu-mips
@@ -2772,6 +2784,24 @@ purple_config :		unconfig
 ## Nios32
 #########################################################################
 
+ADNPESC1_DNPEVA2_base_32_config	\
+ADNPESC1_base_32_config		\
+ADNPESC1_config: unconfig
+	@mkdir -p $(obj)include
+	@[ -z "$(findstring _DNPEVA2,$@)" ] || \
+		{ echo "#define CONFIG_DNPEVA2 1" >>$(obj)include/config.h ; \
+		  $(XECHO) "... DNP/EVA2 configuration" ; \
+		}
+	@[ -z "$(findstring _base_32,$@)" ] || \
+		{ echo "#define CONFIG_NIOS_BASE_32 1" >>$(obj)include/config.h ; \
+		  $(XECHO) "... NIOS 'base_32' configuration" ; \
+		}
+	@[ -z "$(findstring ADNPESC1_config,$@)" ] || \
+		{ echo "#define CONFIG_NIOS_BASE_32 1" >>$(obj)include/config.h ; \
+		  $(XECHO) "... NIOS 'base_32' configuration (DEFAULT)" ; \
+		}
+	@$(MKCONFIG) -a ADNPESC1 nios nios adnpesc1 ssv
+
 DK1C20_safe_32_config		\
 DK1C20_standard_32_config	\
 DK1C20_config:	unconfig
@@ -2813,24 +2843,6 @@ DK1S10_config:	unconfig
 		}
 	@$(MKCONFIG) -a DK1S10 nios nios dk1s10 altera
 
-ADNPESC1_DNPEVA2_base_32_config	\
-ADNPESC1_base_32_config		\
-ADNPESC1_config: unconfig
-	@mkdir -p $(obj)include
-	@[ -z "$(findstring _DNPEVA2,$@)" ] || \
-		{ echo "#define CONFIG_DNPEVA2 1" >>$(obj)include/config.h ; \
-		  $(XECHO) "... DNP/EVA2 configuration" ; \
-		}
-	@[ -z "$(findstring _base_32,$@)" ] || \
-		{ echo "#define CONFIG_NIOS_BASE_32 1" >>$(obj)include/config.h ; \
-		  $(XECHO) "... NIOS 'base_32' configuration" ; \
-		}
-	@[ -z "$(findstring ADNPESC1_config,$@)" ] || \
-		{ echo "#define CONFIG_NIOS_BASE_32 1" >>$(obj)include/config.h ; \
-		  $(XECHO) "... NIOS 'base_32' configuration (DEFAULT)" ; \
-		}
-	@$(MKCONFIG) -a ADNPESC1 nios nios adnpesc1 ssv
-
 #########################################################################
 ## Nios-II
 #########################################################################
@@ -2851,21 +2863,19 @@ PCI5441_config : unconfig
 	@$(MKCONFIG)  PCI5441 nios2 nios2 pci5441 psyent
 
 #========================================================================
-# MicroBlaze
-#========================================================================
-#########################################################################
 ## Microblaze
-#########################################################################
-suzaku_config:	unconfig
-	@mkdir -p $(obj)include
-	@echo "#define CONFIG_SUZAKU 1" > $(obj)include/config.h
-	@$(MKCONFIG) -a $(@:_config=) microblaze microblaze suzaku AtmarkTechno
+#========================================================================
 
 ml401_config:	unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_ML401 1" > $(obj)include/config.h
 	@$(MKCONFIG) -a $(@:_config=) microblaze microblaze ml401 xilinx
 
+suzaku_config:	unconfig
+	@mkdir -p $(obj)include
+	@echo "#define CONFIG_SUZAKU 1" > $(obj)include/config.h
+	@$(MKCONFIG) -a $(@:_config=) microblaze microblaze suzaku AtmarkTechno
+
 xupv2p_config:	unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_XUPV2P 1" > $(obj)include/config.h
@@ -2888,9 +2898,9 @@ $(BFIN_BOARDS):
 #========================================================================
 # AVR32
 #========================================================================
-#########################################################################
-## AT32AP70xx
-#########################################################################
+
+atngw100_config	:	unconfig
+	@$(MKCONFIG) $(@:_config=) avr32 at32ap atngw100 atmel at32ap700x
 
 atstk1002_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
@@ -2904,16 +2914,14 @@ atstk1004_config	:	unconfig
 atstk1006_config	:	unconfig
 	@$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
 
-atngw100_config	:	unconfig
-	@$(MKCONFIG) $(@:_config=) avr32 at32ap atngw100 atmel at32ap700x
-
-#########################################################################
-#########################################################################
-#########################################################################
+#========================================================================
+# SH3 (SuperH)
+#========================================================================
 
 #########################################################################
 ## sh3 (Renesas SuperH)
 #########################################################################
+
 mpr2_config: unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_MPR2 1" > $(obj)include/config.h
@@ -2927,6 +2935,12 @@ ms7720se_config: unconfig
 #########################################################################
 ## sh4 (Renesas SuperH)
 #########################################################################
+
+MigoR_config :       unconfig
+	@mkdir -p $(obj)include
+	@echo "#define CONFIG_MIGO_R 1" > $(obj)include/config.h
+	@./mkconfig -a $(@:_config=) sh sh4 MigoR
+
 ms7750se_config: unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_MS7750SE 1" > $(obj)include/config.h
@@ -2937,21 +2951,16 @@ ms7722se_config :	unconfig
 	@echo "#define CONFIG_MS7722SE 1" > $(obj)include/config.h
 	@$(MKCONFIG) -a $(@:_config=) sh sh4 ms7722se
 
-MigoR_config :       unconfig
+r2dplus_config  :   unconfig
 	@mkdir -p $(obj)include
-	@echo "#define CONFIG_MIGO_R 1" > $(obj)include/config.h
-	@./mkconfig -a $(@:_config=) sh sh4 MigoR
+	@echo "#define CONFIG_R2DPLUS 1" > $(obj)include/config.h
+	@./mkconfig -a $(@:_config=) sh sh4 r2dplus
 
 r7780mp_config: unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_R7780MP 1" > $(obj)include/config.h
 	@./mkconfig -a $(@:_config=) sh sh4 r7780mp
 
-r2dplus_config  :   unconfig
-	@mkdir -p $(obj)include
-	@echo "#define CONFIG_R2DPLUS 1" > $(obj)include/config.h
-	@./mkconfig -a $(@:_config=) sh sh4 r2dplus
-
 sh7763rdp_config  :   unconfig
 	@mkdir -p $(obj)include
 	@echo "#define CONFIG_SH7763RDP 1" > $(obj)include/config.h
@@ -2960,6 +2969,7 @@ sh7763rdp_config  :   unconfig
 #========================================================================
 # SPARC
 #========================================================================
+
 #########################################################################
 ## LEON3
 #########################################################################

board/BuS/EB+MCF-EV123/EB+MCF-EV123.c

@@ -41,51 +41,51 @@ int checkboard (void)
 
 phys_size_t initdram (int board_type)
 {
-	int size,i;
+	int size, i;
 
 	size = 0;
-	MCFSDRAMC_DCR =	MCFSDRAMC_DCR_RTIM_6
-			| MCFSDRAMC_DCR_RC((15 * CFG_CLK)>>4);
-	#ifdef CFG_SDRAM_BASE0
-
-		MCFSDRAMC_DACR0 =	MCFSDRAMC_DACR_BASE(CFG_SDRAM_BASE0)
-					| MCFSDRAMC_DACR_CASL(1)
-					| MCFSDRAMC_DACR_CBM(3)
-					| MCFSDRAMC_DACR_PS_16);
-
-		MCFSDRAMC_DMR0 =	MCFSDRAMC_DMR_BAM_16M
-					| MCFSDRAMC_DMR_V;
-
-		MCFSDRAMC_DACR0 |=	MCFSDRAMC_DACR_IP;
-
-		*(unsigned short *)(CFG_SDRAM_BASE0) = 0xA5A5;
-		MCFSDRAMC_DACR0 |=	MCFSDRAMC_DACR_RE;
-		for (i=0; i < 2000; i++)
-			asm(" nop");
-		mbar_writeLong(MCFSDRAMC_DACR0, mbar_readLong(MCFSDRAMC_DACR0)
-								    | MCFSDRAMC_DACR_IMRS);
-		*(unsigned int *)(CFG_SDRAM_BASE0 + 0x220) = 0xA5A5;
-		size += CFG_SDRAM_SIZE * 1024 * 1024;
-	#endif
-	#ifdef CFG_SDRAM_BASE1
-		MCFSDRAMC_DACR1 =	MCFSDRAMC_DACR_BASE(CFG_SDRAM_BASE1)
-					| MCFSDRAMC_DACR_CASL(1)
-					| MCFSDRAMC_DACR_CBM(3)
-					| MCFSDRAMC_DACR_PS_16;
-
-		MCFSDRAMC_DMR1 =	MCFSDRAMC_DMR_BAM_16M
-					| MCFSDRAMC_DMR_V;
-
-		MCFSDRAMC_DACR1 |=	MCFSDRAMC_DACR_IP;
-
-		*(unsigned short *)(CFG_SDRAM_BASE1) = 0xA5A5;
-		MCFSDRAMC_DACR1 |=	MCFSDRAMC_DACR_RE;
-		for (i=0; i < 2000; i++)
-			asm(" nop");
-		MCFSDRAMC_DACR1 |=	MCFSDRAMC_DACR_IMRS;
-		*(unsigned int *)(CFG_SDRAM_BASE1 + 0x220) = 0xA5A5;
-		size += CFG_SDRAM_SIZE1 * 1024 * 1024;
-	#endif
+	MCFSDRAMC_DCR = MCFSDRAMC_DCR_RTIM_6
+			| MCFSDRAMC_DCR_RC ((15 * CFG_CLK) >> 4);
+#ifdef CFG_SDRAM_BASE0
+
+	MCFSDRAMC_DACR0 = MCFSDRAMC_DACR_BASE (CFG_SDRAM_BASE0)
+			| MCFSDRAMC_DACR_CASL (1)
+			| MCFSDRAMC_DACR_CBM (3)
+			| MCFSDRAMC_DACR_PS_16;
+
+	MCFSDRAMC_DMR0 = MCFSDRAMC_DMR_BAM_16M | MCFSDRAMC_DMR_V;
+
+	MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_IP;
+
+	*(unsigned short *) (CFG_SDRAM_BASE0) = 0xA5A5;
+	MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_RE;
+	for (i = 0; i < 2000; i++)
+		asm (" nop");
+	mbar_writeLong (MCFSDRAMC_DACR0,
+			mbar_readLong (MCFSDRAMC_DACR0) | MCFSDRAMC_DACR_IMRS);
+	*(unsigned int *) (CFG_SDRAM_BASE0 + 0x220) = 0xA5A5;
+	size += CFG_SDRAM_SIZE * 1024 * 1024;
+#endif
+#ifdef CFG_SDRAM_BASE1
+	MCFSDRAMC_DACR1 = MCFSDRAMC_DACR_BASE (CFG_SDRAM_BASE1)
+			| MCFSDRAMC_DACR_CASL (1)
+			| MCFSDRAMC_DACR_CBM (3)
+			| MCFSDRAMC_DACR_PS_16;
+
+	MCFSDRAMC_DMR1 = MCFSDRAMC_DMR_BAM_16M | MCFSDRAMC_DMR_V;
+
+	MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IP;
+
+	*(unsigned short *) (CFG_SDRAM_BASE1) = 0xA5A5;
+	MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_RE;
+
+	for (i = 0; i < 2000; i++)
+		asm (" nop");
+
+	MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IMRS;
+	*(unsigned int *) (CFG_SDRAM_BASE1 + 0x220) = 0xA5A5;
+	size += CFG_SDRAM_SIZE1 * 1024 * 1024;
+#endif
 	return size;
 }
 

board/BuS/EB+MCF-EV123/cfm_flash.c

@@ -173,7 +173,7 @@ int cfm_flash_write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cn
 	dest = cmf_backdoor_address(addr);
 	while ((cnt>=4) && (rc == ERR_OK))
 	{
-		data =*((volatile u32 *) src);
+		data = *((volatile u32 *) src);
 		*(volatile u32*) dest = data;
 		MCFCFM_CMD = MCFCFM_CMD_PGM;
 		MCFCFM_USTAT = MCFCFM_USTAT_CBEIF;

board/BuS/EB+MCF-EV123/flash.c

@@ -348,7 +348,7 @@ int amd_flash_write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt
 	dest = addr;
 	while ((cnt>=2) && (rc == ERR_OK))
 	{
-		data =*((volatile u16 *) src);
+		data = *((volatile u16 *) src);
 		rc=amd_write_word (info,dest,data);
 		src +=2;
 		dest +=2;

board/BuS/EB+MCF-EV123/mii.c

@@ -201,7 +201,7 @@ int mii_discover_phy(struct eth_device *dev)
 }
 #endif				/* CFG_DISCOVER_PHY */
 
-int mii_init(void) __attribute__((weak,alias("__mii_init")));
+void mii_init(void) __attribute__((weak,alias("__mii_init")));
 
 void __mii_init(void)
 {

board/MAI/AmigaOneG3SE/ps2kbd.c

@@ -229,7 +229,7 @@ int drv_isa_kbd_init (void)
 	device_t kbddev ;
 	char *stdinname  = getenv ("stdin");
 
-	if(isa_kbd_init()==-1)
+	if(isa_kbd_init() == -1)
 		return -1;
 	memset (&kbddev, 0, sizeof(kbddev));
 	strcpy(kbddev.name, DEVNAME);
@@ -515,7 +515,7 @@ int kbd_read_data(void)
 	int val;
 	unsigned char status;
 
-	val=-1;
+	val = -1;
 	status = kbd_read_status();
 	if (status & KBD_STAT_OBF) {
 		val = kbd_read_input();

board/MAI/AmigaOneG3SE/usb_uhci.c

@@ -518,7 +518,7 @@ void usb_check_int_chain(void)
 	uhci_td_t *td,*prevtd;
 
 	for(i=0;i<8;i++) {
-		prevtd=&td_int[i]; /* the first previous td is the skeleton td */
+		prevtd = &td_int[i]; /* the first previous td is the skeleton td */
 		link=swap_32(td_int[i].link) & 0xfffffff0; /* next in chain */
 		td=(uhci_td_t *)link; /* assign it */
 		/* all interrupt TDs are finally linked to the td_int[0].
@@ -595,7 +595,7 @@ int usb_lowlevel_init(void)
 
 
 	busdevfunc=pci_find_device(USB_UHCI_VEND_ID,USB_UHCI_DEV_ID,0); /* get PCI Device ID */
-	if(busdevfunc==-1) {
+	if(busdevfunc == -1) {
 		printf("Error USB UHCI (%04X,%04X) not found\n",USB_UHCI_VEND_ID,USB_UHCI_DEV_ID);
 		return -1;
 	}
@@ -642,12 +642,12 @@ int usb_lowlevel_init(void)
  */
 int usb_lowlevel_stop(void)
 {
-	if(irqvec==-1)
+	if(irqvec == -1)
 		return 1;
 	irq_free_handler(irqvec);
 	irq_free_handler(0);
 	reset_hc();
-	irqvec=-1;
+	irqvec = -1;
 	return 0;
 }
 

board/MAI/menu/menu.c

@@ -1,66 +0,0 @@
-#include "menu.h"
-
-#define SINGLE_BOX 0
-#define DOUBLE_BOX 1
-
-void video_draw_box(int style, int attr, char *title, int separate, int x, int y, int w, int h);
-void video_draw_text(int x, int y, int attr, char *text);
-void video_save_rect(int x, int y, int w, int h, void *save_area, int clearchar, int clearattr);
-void video_restore_rect(int x, int y, int w, int h, void *save_area);
-int  video_rows(void);
-int  video_cols(void);
-
-#define MAX_MENU_OPTIONS 200
-
-typedef struct
-{
-    int used;                  /* flag if this entry is used */
-    int entry_x;               /* Character column of the menu entry */
-    int entry_y;               /* Character line of the entry */
-    int option_x;              /* Character colum of the option (entry is same) */
-} option_data_t;
-
-option_data_t odata[MAX_MENU_OPTIONS];
-
-int normal_attr = 0x0F;
-int select_attr = 0x2F;
-int disabled_attr = 0x07;
-
-menu_t *root_menu;
-
-int menu_init (menu_t *root)
-{
-    char *s;
-    int i;
-
-    s = getenv("menu_normal");
-    if (s) normal_attr = atoi(s);
-
-    s = getenv("menu_select");
-    if (s) select_attr = atoi(s);
-
-    s = getenv("menu_disabled");
-    if (s) disabled_attr = atoi(s);
-
-    for (i=0; i<MAX_MENU_OPTIONS; i++) odata[i].used = 0;
-
-    root_menu = root;
-}
-
-option_data_t *menu_alloc_odata(void)
-{
-    int i;
-    for (int i=0; i<MAX_MENU_OPTIONS; i++)
-    {
-	if (odata[i].used == 0) return &odata[i];
-    }
-    return NULL;
-}
-
-void menu_free_odata(option_data_t *odata)
-{
-    odata->used = 0;
-}
-
-void menu_layout (menu_t *menu)
-{

board/MAI/menu/menu.h

@@ -1,162 +0,0 @@
-#ifndef MENU_H
-#define MENU_H
-
-/* A single menu */
-typedef void (*menu_finish_callback)(struct menu_s *menu);
-
-typedef struct menu_s {
-	char *name;		/* Menu name */
-	int num_options;	/* Number of options in this menu */
-	int flags;		/* Various flags - see below */
-	int option_align;	/* Aligns options to a field width of this much characters if != 0 */
-
-	struct menu_option_s **options;	/* Pointer to this menu's options */
-	menu_finish_callback callback;	/* Called when the menu closes */
-} menu_t;
-
-/*
- * type: Type of the option (see below)
- * name: Name to display for this option
- * help: Optional help string
- * id  : optional id number
- * sys : pointer for system-specific data, init to NULL and don't touch
- */
-
-#define OPTION_PREAMBLE		\
-	int type;		\
-	char *name;		\
-	char *help;		\
-	int id;			\
-	void *sys;
-
-/*
- * Menu option types.
- * There are a number of different layouts for menu options depending
- * on their types. Currently there are the following possibilities:
- *
- * Submenu:
- *   This entry links to a new menu.
- *
- * Boolean:
- *   A simple on/off toggle entry. Booleans can be either yes/no, 0/1 or on/off.
- *   Optionally, this entry can enable/disable a set of other options. An example would
- *   be to enable/disable on-board USB, and if enabled give access to further options like
- *   irq settings, base address etc.
- *
- * Text:
- *   A single line/limited number of characters text entry box. Text can be restricted
- *   to a certain charset (digits/hex digits/all/custom). Result is also available as an
- *   int if numeric.
- *
- * Selection:
- *   One-of-many type of selection entry. User may choose on of a set of strings, which
- *   maps to a specific value for the variable.
- *
- * Routine:
- *   Selecting this calls an entry-specific routine. This can be used for saving contents etc.
- *
- * Custom:
- *   Display and behaviour of this entry is defined by a set of callbacks.
- */
-
-#define MENU_SUBMENU_TYPE 0
-typedef struct menu_submenu_s
-{
-    OPTION_PREAMBLE
-
-    menu_t *   submenu;            /* Pointer to the submenu */
-} menu_submenu_t;
-
-#define MENU_BOOLEAN_TYPE 1
-typedef struct menu_boolean_s
-{
-    OPTION_PREAMBLE
-
-    char *variable;                /* Name of the variable to getenv()/setenv() */
-    int subtype;                   /* Subtype (on/off, 0/1, yes/no, enable/disable), see below */
-    int mutex;                     /* Bit mask of options to enable/disable. Bit 0 is the option
-				      immediately following this one, bit 1 is the next one etc.
-				      bit 7 = 0 means to disable when this option is off,
-				      bit 7 = 1 means to disable when this option is on.
-				      An option is disabled when the type field's upper bit is set */
-} menu_boolean_t;
-
-/* BOOLEAN Menu flags */
-#define MENU_BOOLEAN_ONOFF         0x01
-#define MENU_BOOLEAN_01            0x02
-#define MENU_BOOLEAN_YESNO         0x03
-#define MENU_BOOLEAN_ENDIS         0x04
-#define MENU_BOOLEAN_TYPE_MASK     0x07
-
-
-#define MENU_TEXT_TYPE 2
-typedef struct menu_text_s
-{
-    OPTION_PREAMBLE
-
-    char *variable;                /* Name of the variable to getenv()/setenv() */
-    int maxchars;                  /* Max number of characters */
-    char *charset;                 /* Optional charset to use */
-    int flags;                     /* Flags - see below */
-} menu_text_t;
-
-/* TEXT entry menu flags */
-#define MENU_TEXT_NUMERIC         0x01
-#define MENU_TEXT_HEXADECIMAL     0x02
-#define MENU_TEXT_FREE            0x03
-#define MENU_TEXT_TYPE_MASK       0x07
-
-
-#define MENU_SELECTION_TYPE 3
-typedef struct menu_select_option_s {
-	char *map_from;		/* Map this variable contents ... */
-	char *map_to;		/* ... to this menu text and vice versa */
-} menu_select_option_t;
-
-typedef struct menu_select_s {
-	OPTION_PREAMBLE int num_options;	/* Number of mappings */
-	menu_select_option_t **options;
-	/* Option list array */
-} menu_select_t;
-
-
-#define MENU_ROUTINE_TYPE 4
-typedef void (*menu_routine_callback) (struct menu_routine_s *);
-
-typedef struct menu_routine_s {
-	OPTION_PREAMBLE menu_routine_callback callback;
-	/* routine to be called */
-	void *user_data;	/* User data, don't care for system */
-} menu_routine_t;
-
-
-#define MENU_CUSTOM_TYPE 5
-typedef void (*menu_custom_draw) (struct menu_custom_s *);
-typedef void (*menu_custom_key) (struct menu_custom_s *, int);
-
-typedef struct menu_custom_s {
-	OPTION_PREAMBLE menu_custom_draw drawfunc;
-	menu_custom_key keyfunc;
-	void *user_data;
-} menu_custom_t;
-
-/*
- * The menu option superstructure
- */
-typedef struct menu_option_s {
-	union {
-		menu_submenu_t m_sub_menu;
-		menu_boolean_t m_boolean;
-		menu_text_t m_text;
-		menu_select_t m_select;
-		menu_routine_t m_routine;
-	};
-} menu_option_t;
-
-/* Init the menu system. Returns <0 on error */
-int menu_init(menu_t *root);
-
-/* Execute a single menu. Returns <0 on error */
-int menu_do(menu_t *menu);
-
-#endif

board/ads5121/Makefile

@@ -27,7 +27,7 @@ $(shell mkdir -p $(OBJTREE)/board/freescale/common)
 
 LIB	= $(obj)lib$(BOARD).a
 
-COBJS-y	:= $(BOARD).o
+COBJS-y	:= $(BOARD).o iopin.o
 COBJS-${CONFIG_FSL_DIU_FB} += ads5121_diu.o
 COBJS-${CONFIG_FSL_DIU_FB} += ../freescale/common/fsl_diu_fb.o
 COBJS-${CONFIG_FSL_DIU_FB} += ../freescale/common/fsl_logo_bmp.o

board/ads5121/README

@@ -0,0 +1,7 @@
+To configure for the current (Rev 3.x) ADS5121
+	make ads5121_config
+This will automatically include PCI, the Real Time CLock, add backup flash
+ability and set the correct frequency and memory configuration.
+
+To configure for the older Rev 2 ADS5121 type (this will not have PCI)
+	make ads5121_rev2_config

board/ads5121/ads5121.c

@@ -23,9 +23,14 @@
 
 #include <common.h>
 #include <mpc512x.h>
+#include "iopin.h"
 #include <asm/bitops.h>
 #include <command.h>
 #include <fdt_support.h>
+#ifdef CONFIG_MISC_INIT_R
+#include <i2c.h>
+#endif
+#include "iopin.h"	/* for iopin_initialize() prototype */
 
 /* Clocks in use */
 #define SCCR1_CLOCKS_EN	(CLOCK_SCCR1_CFG_EN |				\
@@ -45,29 +50,12 @@
 #define CSAW_START(start)	((start) & 0xFFFF0000)
 #define CSAW_STOP(start, size)	(((start) + (size) - 1) >> 16)
 
-#define MPC5121_IOCTL_PSC6_0	(0x284/4)
-#define MPC5121_IO_DIU_START	(0x288/4)
-#define MPC5121_IO_DIU_END	(0x2fc/4)
-
-/* Functional pin muxing */
-#define MPC5121_IO_FUNC1	(0 << 7)
-#define MPC5121_IO_FUNC2	(1 << 7)
-#define MPC5121_IO_FUNC3	(2 << 7)
-#define MPC5121_IO_FUNC4	(3 << 7)
-#define MPC5121_IO_ST		(1 << 2)
-#define MPC5121_IO_DS_1		(0)
-#define MPC5121_IO_DS_2		(1)
-#define MPC5121_IO_DS_3		(2)
-#define MPC5121_IO_DS_4		(3)
-
 long int fixed_sdram(void);
 
 int board_early_init_f (void)
 {
 	volatile immap_t *im = (immap_t *) CFG_IMMR;
-	u32 lpcaw, tmp32;
-	volatile ioctrl512x_t *ioctl = &(im->io_ctrl);
-	int i;
+	u32 lpcaw;
 
 	/*
 	 * Initialize Local Window for the CPLD registers access (CS2 selects
@@ -91,24 +79,27 @@ int board_early_init_f (void)
 	 * Without this the flash identification routine fails, as it needs to issue
 	 * write commands in order to establish the device ID.
 	 */
-	*((volatile u8 *)(CFG_CPLD_BASE + 0x08)) = 0xC1;
 
+#ifdef CONFIG_ADS5121_REV2
+	*((volatile u8 *)(CFG_CPLD_BASE + 0x08)) = 0xC1;
+#else
+	if (*((u8 *)(CFG_CPLD_BASE + 0x08)) & 0x04) {
+		*((volatile u8 *)(CFG_CPLD_BASE + 0x08)) = 0xC1;
+	} else {
+		/* running from Backup flash */
+		*((volatile u8 *)(CFG_CPLD_BASE + 0x08)) = 0x32;
+	}
+#endif
+	/*
+	 * Configure Flash Speed
+	 */
+	*((volatile u32 *)(CFG_IMMR + LPC_OFFSET + CS0_CONFIG)) = CFG_CS0_CFG;
 	/*
 	 * Enable clocks
 	 */
 	im->clk.sccr[0] = SCCR1_CLOCKS_EN;
 	im->clk.sccr[1] = SCCR2_CLOCKS_EN;
 
-	/* Configure DIU clock pin */
-	tmp32 = ioctl->regs[MPC5121_IOCTL_PSC6_0];
-	tmp32 &= ~0x1ff;
-	tmp32 |= MPC5121_IO_FUNC3 | MPC5121_IO_DS_4;
-	ioctl->regs[MPC5121_IOCTL_PSC6_0] = tmp32;
-
-	/* Initialize IO pins (pin mux) for DIU function */
-	for (i = MPC5121_IO_DIU_START; i < MPC5121_IO_DIU_END; i++)
-		ioctl->regs[i] |= (MPC5121_IO_FUNC3 | MPC5121_IO_DS_4);
-
 	return 0;
 }
 
@@ -217,6 +208,7 @@ long int fixed_sdram (void)
 int misc_init_r(void)
 {
 	u8 tmp_val;
+	extern int ads5121_diu_init(void);
 
 	/* Using this for DIU init before the driver in linux takes over
 	 *  Enable the TFP410 Encoder (I2C address 0x38)
@@ -250,17 +242,12 @@ int checkboard (void)
 {
 	ushort brd_rev = *(vu_short *) (CFG_CPLD_BASE + 0x00);
 	uchar cpld_rev = *(vu_char *) (CFG_CPLD_BASE + 0x02);
-	volatile immap_t *im = (immap_t *) CFG_IMMR;
-	volatile unsigned long *reg;
-	int i;
 
 	printf ("Board: ADS5121 rev. 0x%04x (CPLD rev. 0x%02x)\n",
 		brd_rev, cpld_rev);
+	/* initialize function mux & slew rate IO inter alia on IO Pins  */
+	iopin_initialize();
 
-	/* change the slew rate on all pata pins to max */
-	reg = (unsigned long *) &(im->io_ctrl.regs[PATA_CE1_IDX]);
-	for (i = 0; i < 9; i++)
-		reg[i] |= 0x00000003;
 	return 0;
 }
 

board/ads5121/ads5121_diu.c

@@ -57,7 +57,7 @@ void diu_set_pixel_clock(unsigned int pixclock)
 	/* Modify PXCLK in GUTS CLKDVDR */
 	debug("DIU: Current value of CLKDVDR = 0x%08x\n", *clkdvdr);
 	temp = *clkdvdr & 0xFFFFFF00;
-	*clkdvdr = temp | (pixval & 0x1F);
+	*clkdvdr = temp | (pixval & 0xFF);
 	debug("DIU: Modified value of CLKDVDR = 0x%08x\n", *clkdvdr);
 }
 

board/ads5121/iopin.c

@@ -0,0 +1,115 @@
+/*
+ * (C) Copyright 2008
+ * Martha J Marx, Silicon Turnkey Express, mmarx@silicontkx.com
+ * mpc512x I/O pin/pad initialization for the ADS5121 board
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <linux/types.h>
+#include "iopin.h"
+
+/* IO pin fields */
+#define IO_PIN_FMUX(v)	((v) << 7)	/* pin function */
+#define IO_PIN_HOLD(v)	((v) << 5)	/* hold time, pci only */
+#define IO_PIN_PUD(v)	((v) << 4)	/* if PUE, 0=pull-down, 1=pull-up */
+#define IO_PIN_PUE(v)	((v) << 3)	/* pull up/down enable */
+#define IO_PIN_ST(v)	((v) << 2)	/* schmitt trigger */
+#define IO_PIN_DS(v)	((v))		/* slew rate */
+
+static struct iopin_t {
+	int p_offset;		/* offset from IOCTL_MEM_OFFSET */
+	int nr_pins;		/* number of pins to set this way */
+	int bit_or;		/* or in the value instead of overwrite */
+	u_long val;		/* value to write or or */
+} ioregs_init[] = {
+	/* FUNC1=FEC_RX_DV Sets Next 3 to FEC pads */
+	{
+		IOCTL_SPDIF_TXCLK, 3, 0,
+		IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+	},
+	/* Set highest Slew on 9 PATA pins */
+	{
+		IOCTL_PATA_CE1, 9, 1,
+		IO_PIN_FMUX(0) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+	},
+	/* FUNC1=FEC_COL Sets Next 15 to FEC pads */
+	{
+		IOCTL_PSC0_0, 15, 0,
+		IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+	},
+	/* FUNC1=SPDIF_TXCLK */
+	{
+		IOCTL_LPC_CS1, 1, 0,
+		IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3)
+	},
+	/* FUNC2=SPDIF_TX and sets Next pin to SPDIF_RX */
+	{
+		IOCTL_I2C1_SCL, 2, 0,
+		IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3)
+	},
+	/* FUNC2=DIU CLK */
+	{
+		IOCTL_PSC6_0, 1, 0,
+		IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3)
+	},
+	/* FUNC2=DIU_HSYNC */
+	{
+		IOCTL_PSC6_1, 1, 0,
+		IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+	},
+	/* FUNC2=DIUVSYNC Sets Next 26 to DIU Pads */
+	{
+		IOCTL_PSC6_4, 26, 0,
+		IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
+		IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
+	}
+};
+
+void iopin_initialize(void)
+{
+	short i, j, n, p;
+	u_long *reg;
+	immap_t *im = (immap_t *)CFG_IMMR;
+
+	reg = (u_long *)&(im->io_ctrl.regs[0]);
+
+	if (sizeof(ioregs_init) == 0)
+		return;
+
+	n = sizeof(ioregs_init) / sizeof(ioregs_init[0]);
+
+	for (i = 0; i < n; i++) {
+		for (p = 0, j = ioregs_init[i].p_offset / sizeof(u_long);
+			p < ioregs_init[i].nr_pins; p++, j++) {
+			if (ioregs_init[i].bit_or)
+				reg[j] |= ioregs_init[i].val;
+			else
+				reg[j] = ioregs_init[i].val;
+		}
+	}
+	return;
+}

board/ads5121/iopin.h

@@ -0,0 +1,222 @@
+/*
+ * (C) Copyright 2008
+ * Martha J Marx, Silicon Turnkey Express, mmarx@silicontkx.com
+ * mpc512x I/O pin/pad initialization for the ADS5121 board
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#define IOCTL_MEM		0x000
+#define IOCTL_GP		0x004
+#define IOCTL_LPC_CLK		0x008
+#define IOCTL_LPC_OE		0x00C
+#define IOCTL_LPC_RWB		0x010
+#define IOCTL_LPC_ACK		0x014
+#define IOCTL_LPC_CS0		0x018
+#define IOCTL_NFC_CE0		0x01C
+#define IOCTL_LPC_CS1		0x020
+#define IOCTL_LPC_CS2		0x024
+#define IOCTL_LPC_AX03		0x028
+#define IOCTL_EMB_AX02		0x02C
+#define IOCTL_EMB_AX01		0x030
+#define IOCTL_EMB_AX00		0x034
+#define IOCTL_EMB_AD31		0x038
+#define IOCTL_EMB_AD30		0x03C
+#define IOCTL_EMB_AD29		0x040
+#define IOCTL_EMB_AD28		0x044
+#define IOCTL_EMB_AD27		0x048
+#define IOCTL_EMB_AD26		0x04C
+#define IOCTL_EMB_AD25		0x050
+#define IOCTL_EMB_AD24		0x054
+#define IOCTL_EMB_AD23		0x058
+#define IOCTL_EMB_AD22		0x05C
+#define IOCTL_EMB_AD21		0x060
+#define IOCTL_EMB_AD20		0x064
+#define IOCTL_EMB_AD19		0x068
+#define IOCTL_EMB_AD18		0x06C
+#define IOCTL_EMB_AD17		0x070
+#define IOCTL_EMB_AD16		0x074
+#define IOCTL_EMB_AD15		0x078
+#define IOCTL_EMB_AD14		0x07C
+#define IOCTL_EMB_AD13		0x080
+#define IOCTL_EMB_AD12		0x084
+#define IOCTL_EMB_AD11		0x088
+#define IOCTL_EMB_AD10		0x08C
+#define IOCTL_EMB_AD09		0x090
+#define IOCTL_EMB_AD08		0x094
+#define IOCTL_EMB_AD07		0x098
+#define IOCTL_EMB_AD06		0x09C
+#define IOCTL_EMB_AD05		0x0A0
+#define IOCTL_EMB_AD04		0x0A4
+#define IOCTL_EMB_AD03		0x0A8
+#define IOCTL_EMB_AD02		0x0AC
+#define IOCTL_EMB_AD01		0x0B0
+#define IOCTL_EMB_AD00		0x0B4
+#define IOCTL_PATA_CE1		0x0B8
+#define IOCTL_PATA_CE2		0x0BC
+#define IOCTL_PATA_ISOLATE	0x0C0
+#define IOCTL_PATA_IOR		0x0C4
+#define IOCTL_PATA_IOW		0x0C8
+#define IOCTL_PATA_IOCHRDY	0x0CC
+#define IOCTL_PATA_INTRQ	0x0D0
+#define IOCTL_PATA_DRQ		0x0D4
+#define IOCTL_PATA_DACK		0x0D8
+#define IOCTL_NFC_WP		0x0DC
+#define IOCTL_NFC_RB		0x0E0
+#define IOCTL_NFC_ALE		0x0E4
+#define IOCTL_NFC_CLE		0x0E8
+#define IOCTL_NFC_WE		0x0EC
+#define IOCTL_NFC_RE		0x0F0
+#define IOCTL_PCI_AD31		0x0F4
+#define IOCTL_PCI_AD30		0x0F8
+#define IOCTL_PCI_AD29		0x0FC
+#define IOCTL_PCI_AD28		0x100
+#define IOCTL_PCI_AD27		0x104
+#define IOCTL_PCI_AD26		0x108
+#define IOCTL_PCI_AD25		0x10C
+#define IOCTL_PCI_AD24		0x110
+#define IOCTL_PCI_AD23		0x114
+#define IOCTL_PCI_AD22		0x118
+#define IOCTL_PCI_AD21		0x11C
+#define IOCTL_PCI_AD20		0x120
+#define IOCTL_PCI_AD19		0x124
+#define IOCTL_PCI_AD18		0x128
+#define IOCTL_PCI_AD17		0x12C
+#define IOCTL_PCI_AD16		0x130
+#define IOCTL_PCI_AD15		0x134
+#define IOCTL_PCI_AD14		0x138
+#define IOCTL_PCI_AD13		0x13C
+#define IOCTL_PCI_AD12		0x140
+#define IOCTL_PCI_AD11		0x144
+#define IOCTL_PCI_AD10		0x148
+#define IOCTL_PCI_AD09		0x14C
+#define IOCTL_PCI_AD08		0x150
+#define IOCTL_PCI_AD07		0x154
+#define IOCTL_PCI_AD06		0x158
+#define IOCTL_PCI_AD05		0x15C
+#define IOCTL_PCI_AD04		0x160
+#define IOCTL_PCI_AD03		0x164
+#define IOCTL_PCI_AD02		0x168
+#define IOCTL_PCI_AD01		0x16C
+#define IOCTL_PCI_AD00		0x170
+#define IOCTL_PCI_CBE0		0x174
+#define IOCTL_PCI_CBE1		0x178
+#define IOCTL_PCI_CBE2		0x17C
+#define IOCTL_PCI_CBE3		0x180
+#define IOCTL_PCI_GNT2		0x184
+#define IOCTL_PCI_REQ2		0x188
+#define IOCTL_PCI_GNT1		0x18C
+#define IOCTL_PCI_REQ1		0x190
+#define IOCTL_PCI_GNT0		0x194
+#define IOCTL_PCI_REQ0		0x198
+#define IOCTL_PCI_INTA		0x19C
+#define IOCTL_PCI_CLK		0x1A0
+#define IOCTL_PCI_RST_OUT	0x1A4
+#define IOCTL_PCI_FRAME		0x1A8
+#define IOCTL_PCI_IDSEL		0x1AC
+#define IOCTL_PCI_DEVSEL	0x1B0
+#define IOCTL_PCI_IRDY		0x1B4
+#define IOCTL_PCI_TRDY		0x1B8
+#define IOCTL_PCI_STOP		0x1BC
+#define IOCTL_PCI_PAR		0x1C0
+#define IOCTL_PCI_PERR		0x1C4
+#define IOCTL_PCI_SERR		0x1C8
+#define IOCTL_SPDIF_TXCLK	0x1CC
+#define IOCTL_SPDIF_TX		0x1D0
+#define IOCTL_SPDIF_RX		0x1D4
+#define IOCTL_I2C0_SCL		0x1D8
+#define IOCTL_I2C0_SDA		0x1DC
+#define IOCTL_I2C1_SCL		0x1E0
+#define IOCTL_I2C1_SDA		0x1E4
+#define IOCTL_I2C2_SCL		0x1E8
+#define IOCTL_I2C2_SDA		0x1EC
+#define IOCTL_IRQ0		0x1F0
+#define IOCTL_IRQ1		0x1F4
+#define IOCTL_CAN1_TX		0x1F8
+#define IOCTL_CAN2_TX		0x1FC
+#define IOCTL_J1850_TX		0x200
+#define IOCTL_J1850_RX		0x204
+#define IOCTL_PSC_MCLK_IN	0x208
+#define IOCTL_PSC0_0		0x20C
+#define IOCTL_PSC0_1		0x210
+#define IOCTL_PSC0_2		0x214
+#define IOCTL_PSC0_3		0x218
+#define IOCTL_PSC0_4		0x21C
+#define IOCTL_PSC1_0		0x220
+#define IOCTL_PSC1_1		0x224
+#define IOCTL_PSC1_2		0x228
+#define IOCTL_PSC1_3		0x22C
+#define IOCTL_PSC1_4		0x230
+#define IOCTL_PSC2_0		0x234
+#define IOCTL_PSC2_1		0x238
+#define IOCTL_PSC2_2		0x23C
+#define IOCTL_PSC2_3		0x240
+#define IOCTL_PSC2_4		0x244
+#define IOCTL_PSC3_0		0x248
+#define IOCTL_PSC3_1		0x24C
+#define IOCTL_PSC3_2		0x250
+#define IOCTL_PSC3_3		0x254
+#define IOCTL_PSC3_4		0x258
+#define IOCTL_PSC4_0		0x25C
+#define IOCTL_PSC4_1		0x260
+#define IOCTL_PSC4_2		0x264
+#define IOCTL_PSC4_3		0x268
+#define IOCTL_PSC4_4		0x26C
+#define IOCTL_PSC5_0		0x270
+#define IOCTL_PSC5_1		0x274
+#define IOCTL_PSC5_2		0x278
+#define IOCTL_PSC5_3		0x27C
+#define IOCTL_PSC5_4		0x280
+#define IOCTL_PSC6_0		0x284
+#define IOCTL_PSC6_1		0x288
+#define IOCTL_PSC6_2		0x28C
+#define IOCTL_PSC6_3		0x290
+#define IOCTL_PSC6_4		0x294
+#define IOCTL_PSC7_0		0x298
+#define IOCTL_PSC7_1		0x29C
+#define IOCTL_PSC7_2		0x2A0
+#define IOCTL_PSC7_3		0x2A4
+#define IOCTL_PSC7_4		0x2A8
+#define IOCTL_PSC8_0		0x2AC
+#define IOCTL_PSC8_1		0x2B0
+#define IOCTL_PSC8_2		0x2B4
+#define IOCTL_PSC8_3		0x2B8
+#define IOCTL_PSC8_4		0x2BC
+#define IOCTL_PSC9_0		0x2C0
+#define IOCTL_PSC9_1		0x2C4
+#define IOCTL_PSC9_2		0x2C8
+#define IOCTL_PSC9_3		0x2CC
+#define IOCTL_PSC9_4		0x2D0
+#define IOCTL_PSC10_0		0x2D4
+#define IOCTL_PSC10_1		0x2D8
+#define IOCTL_PSC10_2		0x2DC
+#define IOCTL_PSC10_3		0x2E0
+#define IOCTL_PSC10_4		0x2E4
+#define IOCTL_PSC11_0		0x2E8
+#define IOCTL_PSC11_1		0x2EC
+#define IOCTL_PSC11_2		0x2F0
+#define IOCTL_PSC11_3		0x2F4
+#define IOCTL_PSC11_4		0x2F8
+#define IOCTL_HRESET		0x2FC
+#define IOCTL_SRESET		0x300
+#define IOCTL_CKSTP_OUT		0x304
+#define IOCTL_USB2_VBUS_PWR_FAULT	0x308
+#define IOCTL_USB2_VBUS_PWR_SELECT	0x30C
+#define IOCTL_USB2_PHY_DRVV_BUS		0x310
+
+extern void iopin_initialize(void);

board/amcc/katmai/katmai.c

@@ -517,24 +517,3 @@ int post_hotkeys_pressed(void)
 	return (ctrlc());
 }
 #endif
-
-#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-void ft_board_setup(void *blob, bd_t *bd)
-{
-	u32 val[4];
-	int rc;
-
-	ft_cpu_setup(blob, bd);
-
-	/* Fixup NOR mapping */
-	val[0] = 0;				/* chip select number */
-	val[1] = 0;				/* always 0 */
-	val[2] = gd->bd->bi_flashstart;
-	val[3] = gd->bd->bi_flashsize;
-	rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
-				  val, sizeof(val), 1);
-	if (rc)
-		printf("Unable to update property NOR mapping, err=%s\n",
-		       fdt_strerror(rc));
-}
-#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */

board/amcc/kilauea/kilauea.c

@@ -374,24 +374,3 @@ int post_hotkeys_pressed(void)
 	return 0;	/* No hotkeys supported */
 }
 #endif /* CONFIG_POST */
-
-#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-void ft_board_setup(void *blob, bd_t *bd)
-{
-	u32 val[4];
-	int rc;
-
-	ft_cpu_setup(blob, bd);
-
-	/* Fixup NOR mapping */
-	val[0] = 0;				/* chip select number */
-	val[1] = 0;				/* always 0 */
-	val[2] = gd->bd->bi_flashstart;
-	val[3] = gd->bd->bi_flashsize;
-	rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
-				  val, sizeof(val), 1);
-	if (rc)
-		printf("Unable to update property NOR mapping, err=%s\n",
-		       fdt_strerror(rc));
-}
-#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */

board/amcc/makalu/makalu.c

@@ -330,24 +330,3 @@ int post_hotkeys_pressed(void)
 	return 0;	/* No hotkeys supported */
 }
 #endif /* CONFIG_POST */
-
-#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-void ft_board_setup(void *blob, bd_t *bd)
-{
-	u32 val[4];
-	int rc;
-
-	ft_cpu_setup(blob, bd);
-
-	/* Fixup NOR mapping */
-	val[0] = 0;				/* chip select number */
-	val[1] = 0;				/* always 0 */
-	val[2] = gd->bd->bi_flashstart;
-	val[3] = gd->bd->bi_flashsize;
-	rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
-				  val, sizeof(val), 1);
-	if (rc)
-		printf("Unable to update property NOR mapping, err=%s\n",
-		       fdt_strerror(rc));
-}
-#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */

board/amcc/sequoia/sequoia.c

@@ -509,24 +509,3 @@ int post_hotkeys_pressed(void)
 	return 0;	/* No hotkeys supported */
 }
 #endif /* CONFIG_POST */
-
-#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-void ft_board_setup(void *blob, bd_t *bd)
-{
-	u32 val[4];
-	int rc;
-
-	ft_cpu_setup(blob, bd);
-
-	/* Fixup NOR mapping */
-	val[0] = 0;				/* chip select number */
-	val[1] = 0;				/* always 0 */
-	val[2] = gd->bd->bi_flashstart;
-	val[3] = gd->bd->bi_flashsize;
-	rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
-				  val, sizeof(val), 1);
-	if (rc)
-		printf("Unable to update property NOR mapping, err=%s\n",
-		       fdt_strerror(rc));
-}
-#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */

board/amcc/taishan/showinfo.c

@@ -34,59 +34,59 @@ void show_reset_reg(void)
 	/* read clock regsiter */
 	printf("===== Display reset and initialize register Start =========\n");
 	mfcpr(clk_pllc,reg);
-	printf("cpr_pllc   = %#010x\n",reg);
+	printf("cpr_pllc   = %#010lx\n",reg);
 
 	mfcpr(clk_plld,reg);
-	printf("cpr_plld   = %#010x\n",reg);
+	printf("cpr_plld   = %#010lx\n",reg);
 
 	mfcpr(clk_primad,reg);
-	printf("cpr_primad = %#010x\n",reg);
+	printf("cpr_primad = %#010lx\n",reg);
 
 	mfcpr(clk_primbd,reg);
-	printf("cpr_primbd = %#010x\n",reg);
+	printf("cpr_primbd = %#010lx\n",reg);
 
 	mfcpr(clk_opbd,reg);
-	printf("cpr_opbd   = %#010x\n",reg);
+	printf("cpr_opbd   = %#010lx\n",reg);
 
 	mfcpr(clk_perd,reg);
-	printf("cpr_perd   = %#010x\n",reg);
+	printf("cpr_perd   = %#010lx\n",reg);
 
 	mfcpr(clk_mald,reg);
-	printf("cpr_mald   = %#010x\n",reg);
+	printf("cpr_mald   = %#010lx\n",reg);
 
 	/* read sdr register */
 	mfsdr(sdr_ebc,reg);
-	printf("sdr_ebc    = %#010x\n",reg);
+	printf("sdr_ebc    = %#010lx\n",reg);
 
 	mfsdr(sdr_cp440,reg);
-	printf("sdr_cp440  = %#010x\n",reg);
+	printf("sdr_cp440  = %#010lx\n",reg);
 
 	mfsdr(sdr_xcr,reg);
-	printf("sdr_xcr    = %#010x\n",reg);
+	printf("sdr_xcr    = %#010lx\n",reg);
 
 	mfsdr(sdr_xpllc,reg);
-	printf("sdr_xpllc  = %#010x\n",reg);
+	printf("sdr_xpllc  = %#010lx\n",reg);
 
 	mfsdr(sdr_xplld,reg);
-	printf("sdr_xplld  = %#010x\n",reg);
+	printf("sdr_xplld  = %#010lx\n",reg);
 
 	mfsdr(sdr_pfc0,reg);
-	printf("sdr_pfc0   = %#010x\n",reg);
+	printf("sdr_pfc0   = %#010lx\n",reg);
 
 	mfsdr(sdr_pfc1,reg);
-	printf("sdr_pfc1   = %#010x\n",reg);
+	printf("sdr_pfc1   = %#010lx\n",reg);
 
 	mfsdr(sdr_cust0,reg);
-	printf("sdr_cust0  = %#010x\n",reg);
+	printf("sdr_cust0  = %#010lx\n",reg);
 
 	mfsdr(sdr_cust1,reg);
-	printf("sdr_cust1  = %#010x\n",reg);
+	printf("sdr_cust1  = %#010lx\n",reg);
 
 	mfsdr(sdr_uart0,reg);
-	printf("sdr_uart0  = %#010x\n",reg);
+	printf("sdr_uart0  = %#010lx\n",reg);
 
 	mfsdr(sdr_uart1,reg);
-	printf("sdr_uart1  = %#010x\n",reg);
+	printf("sdr_uart1  = %#010lx\n",reg);
 
 	printf("===== Display reset and initialize register End   =========\n");
 }
@@ -97,13 +97,13 @@ void show_xbridge_info(void)
 
 	printf("PCI-X chip control registers\n");
 	mfsdr(sdr_xcr, reg);
-	printf("sdr_xcr    = %#010x\n", reg);
+	printf("sdr_xcr    = %#010lx\n", reg);
 
 	mfsdr(sdr_xpllc, reg);
-	printf("sdr_xpllc  = %#010x\n", reg);
+	printf("sdr_xpllc  = %#010lx\n", reg);
 
 	mfsdr(sdr_xplld, reg);
-	printf("sdr_xplld  = %#010x\n", reg);
+	printf("sdr_xplld  = %#010lx\n", reg);
 
 	printf("PCI-X Bridge Configure registers\n");
 	printf("PCIX0_VENDID            = %#06x\n", in16r(PCIX0_VENDID));
@@ -116,49 +116,49 @@ void show_xbridge_info(void)
 	printf("PCIX0_HDTYPE            = %#04x\n", in8(PCIX0_HDTYPE));
 	printf("PCIX0_BIST              = %#04x\n", in8(PCIX0_BIST));
 
-	printf("PCIX0_BAR0              = %#010x\n", in32r(PCIX0_BAR0));
-	printf("PCIX0_BAR1              = %#010x\n", in32r(PCIX0_BAR1));
-	printf("PCIX0_BAR2              = %#010x\n", in32r(PCIX0_BAR2));
-	printf("PCIX0_BAR3              = %#010x\n", in32r(PCIX0_BAR3));
-	printf("PCIX0_BAR4              = %#010x\n", in32r(PCIX0_BAR4));
-	printf("PCIX0_BAR5              = %#010x\n", in32r(PCIX0_BAR5));
+	printf("PCIX0_BAR0              = %#010lx\n", in32r(PCIX0_BAR0));
+	printf("PCIX0_BAR1              = %#010lx\n", in32r(PCIX0_BAR1));
+	printf("PCIX0_BAR2              = %#010lx\n", in32r(PCIX0_BAR2));
+	printf("PCIX0_BAR3              = %#010lx\n", in32r(PCIX0_BAR3));
+	printf("PCIX0_BAR4              = %#010lx\n", in32r(PCIX0_BAR4));
+	printf("PCIX0_BAR5              = %#010lx\n", in32r(PCIX0_BAR5));
 
-	printf("PCIX0_CISPTR            = %#010x\n", in32r(PCIX0_CISPTR));
+	printf("PCIX0_CISPTR            = %#010lx\n", in32r(PCIX0_CISPTR));
 	printf("PCIX0_SBSSYSVID         = %#010x\n", in16r(PCIX0_SBSYSVID));
 	printf("PCIX0_SBSSYSID          = %#010x\n", in16r(PCIX0_SBSYSID));
-	printf("PCIX0_EROMBA            = %#010x\n", in32r(PCIX0_EROMBA));
+	printf("PCIX0_EROMBA            = %#010lx\n", in32r(PCIX0_EROMBA));
 	printf("PCIX0_CAP               = %#04x\n", in8(PCIX0_CAP));
 	printf("PCIX0_INTLN             = %#04x\n", in8(PCIX0_INTLN));
 	printf("PCIX0_INTPN             = %#04x\n", in8(PCIX0_INTPN));
 	printf("PCIX0_MINGNT            = %#04x\n", in8(PCIX0_MINGNT));
 	printf("PCIX0_MAXLTNCY          = %#04x\n", in8(PCIX0_MAXLTNCY));
 
-	printf("PCIX0_BRDGOPT1          = %#010x\n", in32r(PCIX0_BRDGOPT1));
-	printf("PCIX0_BRDGOPT2          = %#010x\n", in32r(PCIX0_BRDGOPT2));
-
-	printf("PCIX0_POM0LAL           = %#010x\n", in32r(PCIX0_POM0LAL));
-	printf("PCIX0_POM0LAH           = %#010x\n", in32r(PCIX0_POM0LAH));
-	printf("PCIX0_POM0SA            = %#010x\n", in32r(PCIX0_POM0SA));
-	printf("PCIX0_POM0PCILAL        = %#010x\n", in32r(PCIX0_POM0PCIAL));
-	printf("PCIX0_POM0PCILAH        = %#010x\n", in32r(PCIX0_POM0PCIAH));
-	printf("PCIX0_POM1LAL           = %#010x\n", in32r(PCIX0_POM1LAL));
-	printf("PCIX0_POM1LAH           = %#010x\n", in32r(PCIX0_POM1LAH));
-	printf("PCIX0_POM1SA            = %#010x\n", in32r(PCIX0_POM1SA));
-	printf("PCIX0_POM1PCILAL        = %#010x\n", in32r(PCIX0_POM1PCIAL));
-	printf("PCIX0_POM1PCILAH        = %#010x\n", in32r(PCIX0_POM1PCIAH));
-	printf("PCIX0_POM2SA            = %#010x\n", in32r(PCIX0_POM2SA));
-
-	printf("PCIX0_PIM0SA            = %#010x\n", in32r(PCIX0_PIM0SA));
-	printf("PCIX0_PIM0LAL           = %#010x\n", in32r(PCIX0_PIM0LAL));
-	printf("PCIX0_PIM0LAH           = %#010x\n", in32r(PCIX0_PIM0LAH));
-	printf("PCIX0_PIM1SA            = %#010x\n", in32r(PCIX0_PIM1SA));
-	printf("PCIX0_PIM1LAL           = %#010x\n", in32r(PCIX0_PIM1LAL));
-	printf("PCIX0_PIM1LAH           = %#010x\n", in32r(PCIX0_PIM1LAH));
-	printf("PCIX0_PIM2SA            = %#010x\n", in32r(PCIX0_PIM1SA));
-	printf("PCIX0_PIM2LAL           = %#010x\n", in32r(PCIX0_PIM1LAL));
-	printf("PCIX0_PIM2LAH           = %#010x\n", in32r(PCIX0_PIM1LAH));
-
-	printf("PCIX0_XSTS              = %#010x\n", in32r(PCIX0_STS));
+	printf("PCIX0_BRDGOPT1          = %#010lx\n", in32r(PCIX0_BRDGOPT1));
+	printf("PCIX0_BRDGOPT2          = %#010lx\n", in32r(PCIX0_BRDGOPT2));
+
+	printf("PCIX0_POM0LAL           = %#010lx\n", in32r(PCIX0_POM0LAL));
+	printf("PCIX0_POM0LAH           = %#010lx\n", in32r(PCIX0_POM0LAH));
+	printf("PCIX0_POM0SA            = %#010lx\n", in32r(PCIX0_POM0SA));
+	printf("PCIX0_POM0PCILAL        = %#010lx\n", in32r(PCIX0_POM0PCIAL));
+	printf("PCIX0_POM0PCILAH        = %#010lx\n", in32r(PCIX0_POM0PCIAH));
+	printf("PCIX0_POM1LAL           = %#010lx\n", in32r(PCIX0_POM1LAL));
+	printf("PCIX0_POM1LAH           = %#010lx\n", in32r(PCIX0_POM1LAH));
+	printf("PCIX0_POM1SA            = %#010lx\n", in32r(PCIX0_POM1SA));
+	printf("PCIX0_POM1PCILAL        = %#010lx\n", in32r(PCIX0_POM1PCIAL));
+	printf("PCIX0_POM1PCILAH        = %#010lx\n", in32r(PCIX0_POM1PCIAH));
+	printf("PCIX0_POM2SA            = %#010lx\n", in32r(PCIX0_POM2SA));
+
+	printf("PCIX0_PIM0SA            = %#010lx\n", in32r(PCIX0_PIM0SA));
+	printf("PCIX0_PIM0LAL           = %#010lx\n", in32r(PCIX0_PIM0LAL));
+	printf("PCIX0_PIM0LAH           = %#010lx\n", in32r(PCIX0_PIM0LAH));
+	printf("PCIX0_PIM1SA            = %#010lx\n", in32r(PCIX0_PIM1SA));
+	printf("PCIX0_PIM1LAL           = %#010lx\n", in32r(PCIX0_PIM1LAL));
+	printf("PCIX0_PIM1LAH           = %#010lx\n", in32r(PCIX0_PIM1LAH));
+	printf("PCIX0_PIM2SA            = %#010lx\n", in32r(PCIX0_PIM1SA));
+	printf("PCIX0_PIM2LAL           = %#010lx\n", in32r(PCIX0_PIM1LAL));
+	printf("PCIX0_PIM2LAH           = %#010lx\n", in32r(PCIX0_PIM1LAH));
+
+	printf("PCIX0_XSTS              = %#010lx\n", in32r(PCIX0_STS));
 }
 
 int do_show_xbridge_info(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])

board/amcc/yosemite/yosemite.c

@@ -510,24 +510,3 @@ void board_reset(void)
 	/* give reset to BCSR */
 	*(unsigned char *)(CFG_BCSR_BASE | 0x06) = 0x09;
 }
-
-#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-void ft_board_setup(void *blob, bd_t *bd)
-{
-	u32 val[4];
-	int rc;
-
-	ft_cpu_setup(blob, bd);
-
-	/* Fixup NOR mapping */
-	val[0] = 0;				/* chip select number */
-	val[1] = 0;				/* always 0 */
-	val[2] = gd->bd->bi_flashstart;
-	val[3] = gd->bd->bi_flashsize;
-	rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
-				  val, sizeof(val), 1);
-	if (rc)
-		printf("Unable to update property NOR mapping, err=%s\n",
-		       fdt_strerror(rc));
-}
-#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */

board/armadillo/flash.c

@@ -279,7 +279,7 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
 	int i, rc;
 
 	wp = (addr & ~1);	/* get lower word aligned address */
-	printf ("Writing %d short data to 0x%p from 0x%p.\n ", cnt, wp, src);
+	printf ("Writing %lu short data to 0x%lx from 0x%p.\n ", cnt, wp, src);
 
 	/*
 	 * handle unaligned start bytes

board/atmel/at91sam9260ek/at91sam9260ek.c

@@ -188,8 +188,17 @@ static void at91sam9260ek_macb_hw_init(void)
 	at91_set_B_periph(AT91_PIN_PA25, 0);	/* ERX2 */
 	at91_set_B_periph(AT91_PIN_PA26, 0);	/* ERX3 */
 	at91_set_B_periph(AT91_PIN_PA27, 0);	/* ERXCK */
+#if defined(CONFIG_AT91SAM9260EK)
+	/*
+	 * use PA10, PA11 for ETX2, ETX3.
+	 * PA23 and PA24 are for TWI EEPROM
+	 */
+	at91_set_B_periph(AT91_PIN_PA10, 0);	/* ETX2 */
+	at91_set_B_periph(AT91_PIN_PA11, 0);	/* ETX3 */
+#else
 	at91_set_B_periph(AT91_PIN_PA23, 0);	/* ETX2 */
 	at91_set_B_periph(AT91_PIN_PA24, 0);	/* ETX3 */
+#endif
 	at91_set_B_periph(AT91_PIN_PA22, 0);	/* ETXER */
 #endif
 

board/atum8548/atum8548.c

@@ -53,7 +53,7 @@ int checkboard (void)
 	volatile ccsr_local_ecm_t *ecm = (void *)(CFG_MPC85xx_ECM_ADDR);
 
 	if ((uint)&gur->porpllsr != 0xe00e0000) {
-		printf("immap size error %x\n",&gur->porpllsr);
+		printf("immap size error %lx\n",(ulong)&gur->porpllsr);
 	}
 	printf ("Board: ATUM8548\n");
 

board/bc3450/cmd_bc3450.c

@@ -189,7 +189,7 @@ int cmd_dip (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 	if (rc > 0x0F)
 		return -1;
 
-	printf ("0x%x\n", rc);
+	printf ("0x%lx\n", rc);
 	return 0;
 }
 

board/cm5200/cmd_cm5200.c

@@ -335,7 +335,7 @@ int do_rs232(char *argv[])
 		if (((*(vu_long *)MPC5XXX_WU_GPIO_DATA_I) & 0x10000000) !=
 				0x10000000) {
 			error_status = 2;
-			printf("%s: failure at rs232_4, rxd status is %d "
+			printf("%s: failure at rs232_4, rxd status is %lu "
 				"(should be 1)\n", __FUNCTION__,
 				((*(vu_long *)MPC5XXX_WU_GPIO_DATA_I) &
 					0x10000000) >> 28);
@@ -350,7 +350,7 @@ int do_rs232(char *argv[])
 		if (((*(vu_long *)MPC5XXX_WU_GPIO_DATA_I) & 0x10000000) !=
 				0x00000000) {
 			error_status = 2;
-			printf("%s: failure at rs232_4, rxd status is %d "
+			printf("%s: failure at rs232_4, rxd status is %lu "
 				"(should be 0)\n", __FUNCTION__,
 				((*(vu_long *)MPC5XXX_WU_GPIO_DATA_I) &
 					0x10000000) >> 28);
@@ -366,7 +366,7 @@ int do_rs232(char *argv[])
 		if (((*(vu_long *)MPC5XXX_WU_GPIO_DATA_I) & 0x20000000) !=
 				0x20000000) {
 			error_status = 3;
-			printf("%s: failure at rs232_4, cts status is %d "
+			printf("%s: failure at rs232_4, cts status is %lu "
 				"(should be 1)\n", __FUNCTION__,
 				((*(vu_long *)MPC5XXX_WU_GPIO_DATA_I) &
 					0x20000000) >> 29);
@@ -381,7 +381,7 @@ int do_rs232(char *argv[])
 		if (((*(vu_long *)MPC5XXX_WU_GPIO_DATA_I) & 0x20000000) !=
 				0x00000000) {
 			error_status = 3;
-			printf("%s: failure at rs232_4, cts status is %d "
+			printf("%s: failure at rs232_4, cts status is %lu "
 				"(should be 0)\n", __FUNCTION__,
 				((*(vu_long *)MPC5XXX_WU_GPIO_DATA_I) &
 					0x20000000) >> 29);

board/cm5200/fwupdate.c

@@ -63,7 +63,7 @@ void cm5200_fwupdate(void)
 	if (!bcmd)
 		return;
 
-	sprintf(ka, "%lx", LOAD_ADDR);
+	sprintf(ka, "%lx", (ulong)LOAD_ADDR);
 
 	/* prepare our bootargs */
 	rsargs = getenv("rs-args");

board/cobra5272/mii.c

@@ -200,7 +200,7 @@ int mii_discover_phy(struct eth_device *dev)
 }
 #endif				/* CFG_DISCOVER_PHY */
 
-int mii_init(void) __attribute__((weak,alias("__mii_init")));
+void mii_init(void) __attribute__((weak,alias("__mii_init")));
 
 void __mii_init(void)
 {

board/davinci/dv-evm/dv_board.c

@@ -29,14 +29,10 @@
 #include <asm/arch/hardware.h>
 #include <asm/arch/emac_defs.h>
 
-#define MACH_TYPE_DAVINCI_EVM		901
-
 DECLARE_GLOBAL_DATA_PTR;
 
-extern void	i2c_init(int speed, int slaveaddr);
 extern void	timer_init(void);
 extern int	eth_hw_init(void);
-extern phy_t	phy;
 
 
 /* Works on Always On power domain only (no PD argument) */
@@ -187,11 +183,8 @@ int misc_init_r (void)
 		}
 	}
 
-	if (!eth_hw_init()) {
+	if (!eth_hw_init())
 		printf("ethernet init failed!\n");
-	} else {
-		printf("ETH PHY   : %s\n", phy.name);
-	}
 
 	i2c_read (0x39, 0x00, 1, (u_int8_t *)&i, 1);
 

board/davinci/schmoogie/dv_board.c

@@ -29,14 +29,10 @@
 #include <asm/arch/hardware.h>
 #include <asm/arch/emac_defs.h>
 
-#define MACH_TYPE_SCHMOOGIE		1255
-
 DECLARE_GLOBAL_DATA_PTR;
 
-extern void	i2c_init(int speed, int slaveaddr);
 extern void	timer_init(void);
 extern int	eth_hw_init(void);
-extern phy_t	phy;
 
 
 /* Works on Always On power domain only (no PD argument) */
@@ -233,11 +229,8 @@ int misc_init_r (void)
 		forceenv("serial#", (char *)&tmp[0]);
 	}
 
-	if (!eth_hw_init()) {
+	if (!eth_hw_init())
 		printf("ethernet init failed!\n");
-	} else {
-		printf("ETH PHY   : %s\n", phy.name);
-	}
 
 	return(0);
 }

board/davinci/sffsdr/sffsdr.c

@@ -43,7 +43,6 @@ DECLARE_GLOBAL_DATA_PTR;
 
 extern void timer_init(void);
 extern int eth_hw_init(void);
-extern phy_t phy;
 
 
 /* Works on Always On power domain only (no PD argument) */
@@ -288,11 +287,8 @@ int misc_init_r(void)
 		}
 	}
 
-	if (!eth_hw_init()) {
+	if (!eth_hw_init())
 		printf("Ethernet init failed\n");
-	} else {
-		printf("ETH PHY: %s\n", phy.name);
-	}
 
 	/* On this platform, U-Boot is copied in RAM by the UBL,
 	 * so we are always in the relocated state. */

board/davinci/sonata/dv_board.c

@@ -29,14 +29,10 @@
 #include <asm/arch/hardware.h>
 #include <asm/arch/emac_defs.h>
 
-#define MACH_TYPE_SONATA		1254
-
 DECLARE_GLOBAL_DATA_PTR;
 
-extern void	i2c_init(int speed, int slaveaddr);
 extern void	timer_init(void);
 extern int	eth_hw_init(void);
-extern phy_t	phy;
 
 
 /* Works on Always On power domain only (no PD argument) */
@@ -188,11 +184,8 @@ int misc_init_r (void)
 		}
 	}
 
-	if (!eth_hw_init()) {
+	if (!eth_hw_init())
 		printf("ethernet init failed!\n");
-	} else {
-		printf("ETH PHY   : %s\n", phy.name);
-	}
 
 	return(0);
 }

board/delta/nand.c

@@ -254,7 +254,7 @@ static unsigned long dfc_wait_event(unsigned long event)
 			break;
 		}
 		if(get_delta(start) > timeout) {
-			DFC_DEBUG1("dfc_wait_event: TIMEOUT waiting for event: 0x%x.\n", event);
+			DFC_DEBUG1("dfc_wait_event: TIMEOUT waiting for event: 0x%lx.\n", event);
 			return 0xff000000;
 		}
 

board/eltec/elppc/eepro100_srom.c

@@ -31,82 +31,83 @@
 #include <net.h>
 #include "srom.h"
 
-extern int eepro100_write_eeprom (struct eth_device* dev,
-		    int location, int addr_len, unsigned short data);
+extern int eepro100_write_eeprom (struct eth_device *dev,
+				  int location, int addr_len,
+				  unsigned short data);
 
 /*----------------------------------------------------------------------------*/
 
 unsigned short eepro100_srom_checksum (unsigned short *sromdata)
 {
-    unsigned short sum = 0;
-    unsigned int i;
-
-    for (i = 0; i < (EE_SIZE-1); i++)
-    {
-	sum += sromdata[i];
-    }
-    return (EE_CHECKSUM - sum);
+	unsigned short sum = 0;
+	unsigned int i;
+
+	for (i = 0; i < (EE_SIZE - 1); i++) {
+		sum += sromdata[i];
+	}
+	return (EE_CHECKSUM - sum);
 }
 
 /*----------------------------------------------------------------------------*/
 
 int eepro100_srom_store (unsigned short *source)
 {
-    int count;
-    struct eth_device onboard_dev;
-
-    /* get onboard network iobase */
-    pci_read_config_dword(PCI_BDF(0,0x10,0), PCI_BASE_ADDRESS_0,
-		 (unsigned int *)&onboard_dev.iobase);
-    onboard_dev.iobase &= ~0xf;
-
-    source[63] = eepro100_srom_checksum (source);
-
-    for (count=0; count < EE_SIZE; count++)
-    {
-    if ( eepro100_write_eeprom ((struct eth_device*)&onboard_dev,
-	     count, EE_ADDR_BITS, SROM_SHORT(source)) == -1 )
-	return -1;
-    source++;
-    }
-    return 0;
+	int count;
+	struct eth_device onboard_dev;
+
+	/* get onboard network iobase */
+	pci_read_config_dword (PCI_BDF (0, 0x10, 0), PCI_BASE_ADDRESS_0,
+			       (unsigned int *) &onboard_dev.iobase);
+	onboard_dev.iobase &= ~0xf;
+
+	source[63] = eepro100_srom_checksum (source);
+
+	for (count = 0; count < EE_SIZE; count++) {
+		if (eepro100_write_eeprom ((struct eth_device *) &onboard_dev,
+					   count, EE_ADDR_BITS,
+					   SROM_SHORT (source)) == -1) {
+			return -1;
+		}
+		source++;
+	}
+	return 0;
 }
 
 /*----------------------------------------------------------------------------*/
 
 #ifdef EEPRO100_SROM_CHECK
 
-extern int read_eeprom (struct eth_device* dev, int location, int addr_len);
+extern int read_eeprom (struct eth_device *dev, int location, int addr_len);
 
 void eepro100_srom_load (unsigned short *destination)
 {
-    int count;
-    struct eth_device onboard_dev;
+	int count;
+	struct eth_device onboard_dev;
+
 #ifdef DEBUG
-    int lr = 0;
-    printf ("eepro100_srom_download:\n");
+	int lr = 0;
+
+	printf ("eepro100_srom_download:\n");
 #endif
 
-    /* get onboard network iobase */
-    pci_read_config_dword(PCI_BDF(0,0x10,0), PCI_BASE_ADDRESS_0,
-		 &onboard_dev.iobase);
-    onboard_dev.iobase &= ~0xf;
+	/* get onboard network iobase */
+	pci_read_config_dword (PCI_BDF (0, 0x10, 0), PCI_BASE_ADDRESS_0,
+			       &onboard_dev.iobase);
+	onboard_dev.iobase &= ~0xf;
 
-    memset (destination, 0x65, 128);
+	memset (destination, 0x65, 128);
 
-    for (count=0; count < 0x40; count++)
-    {
-	*destination++ = read_eeprom (struct eth_device*)&onboard_dev,
-		 count, EE_ADDR_BITS);
+	for (count = 0; count < 0x40; count++) {
+		*destination++ = read_eeprom ((struct eth_device *) &onboard_dev,
+					      count, EE_ADDR_BITS);
 #ifdef DEBUG
-	printf ("%04x ", *(destination - 1));
-	if (lr++ == 7)
-	{
-	    printf("\n");
-	    lr = 0;
-	}
+		printf ("%04x ", *(destination - 1));
+		if (lr++ == 7) {
+			printf ("\n");
+			lr = 0;
+		}
 #endif
-    }
+	}
 }
 #endif /* EEPRO100_SROM_CHECK */
 

board/esd/cpci750/sdram_init.c

@@ -1570,8 +1570,8 @@ dram_size(long int *base, long int maxsize)
     for (cnt = STARTVAL/sizeof(long); cnt < maxsize/sizeof(long); cnt <<= 1) {
 	    addr = base + cnt;	/* pointer arith! */
 
-	    save1=*addr;		/* save contents of addr */
-	    save2=*b;		/* save contents of base */
+	    save1 = *addr;		/* save contents of addr */
+	    save2 = *b;		/* save contents of base */
 
 	    *addr=cnt;		/* write cnt to addr */
 	    *b=0;			/* put null at base */

board/esd/pmc440/pmc440.c

@@ -876,24 +876,3 @@ int usb_board_init_fail(void)
 	return 0;
 }
 #endif /* defined(CONFIG_USB_OHCI) && defined(CFG_USB_OHCI_BOARD_INIT) */
-
-#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-void ft_board_setup(void *blob, bd_t *bd)
-{
-	u32 val[4];
-	int rc;
-
-	ft_cpu_setup(blob, bd);
-
-	/* Fixup NOR mapping */
-	val[0] = 0;				/* chip select number */
-	val[1] = 0;				/* always 0 */
-	val[2] = gd->bd->bi_flashstart;
-	val[3] = gd->bd->bi_flashsize;
-	rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
-				  val, sizeof(val), 1);
-	if (rc)
-		printf("Unable to update property NOR mapping, err=%s\n",
-		       fdt_strerror(rc));
-}
-#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */

board/evb64260/eth.c

@@ -163,7 +163,7 @@ gt6426x_eth_receive(struct eth_dev_s *p,unsigned int icr)
 	int eth_len=0;
 	char *eth_data;
 
-	eth0_rx_desc_single *rx=&p->eth_rx_desc[(p->rdn)];
+	eth0_rx_desc_single *rx = &p->eth_rx_desc[(p->rdn)];
 
 	INVALIDATE_DCACHE((unsigned int)rx,(unsigned int)(rx+1));
 
@@ -252,7 +252,7 @@ gt6426x_eth_transmit(void *v, volatile char *p, unsigned int s)
 #ifdef DEBUG
 	unsigned int old_command_stat,old_psr;
 #endif
-	eth0_tx_desc_single *tx=&dev->eth_tx_desc[dev->tdn];
+	eth0_tx_desc_single *tx = &dev->eth_tx_desc[dev->tdn];
 
 	/* wait for tx to be ready */
 	INVALIDATE_DCACHE((unsigned int)tx,(unsigned int)(tx+1));

board/evb64260/mpsc.c

@@ -259,7 +259,7 @@ char mpsc_getchar (void)
 int
 mpsc_test_char(void)
 {
-	volatile unsigned int *p=&rx_desc_base[rx_desc_index*8];
+	volatile unsigned int *p = &rx_desc_base[rx_desc_index*8];
 
 	INVALIDATE_DCACHE(&p[1], &p[2]);
 

board/fads/flash.c

@@ -90,7 +90,7 @@ unsigned long flash_init (void)
 	default:
 		pd_size = 0;
 		or_am = 0xFFE00000;
-		printf("## Unsupported flash detected by BCSR: 0x%08X\n", bcsr[2]);
+		printf("## Unsupported flash detected by BCSR: 0x%08lX\n", bcsr[2]);
 	}
 
 	total_size = 0;

board/freescale/common/sys_eeprom.c

@@ -1,7 +1,8 @@
 /*
- * Copyright 2006 Freescale Semiconductor
+ * Copyright 2006, 2008 Freescale Semiconductor
  * York Sun (yorksun@freescale.com)
  * Haiying Wang (haiying.wang@freescale.com)
+ * Timur Tabi (timur@freescale.com)
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -27,258 +28,441 @@
 #include <i2c.h>
 #include <linux/ctype.h>
 
-typedef struct {
-	u8 id[4];		/* 0x0000 - 0x0003 EEPROM Tag */
-	u8 sn[12];		/* 0x0004 - 0x000F Serial Number */
-	u8 errata[5];		/* 0x0010 - 0x0014 Errata Level */
-	u8 date[6];		/* 0x0015 - 0x001a Build Date */
-	u8 res_0;		/* 0x001b	   Reserved */
-	u8 version[4];		/* 0x001c - 0x001f Version */
-	u8 tempcal[8];		/* 0x0020 - 0x0027 Temperature Calibration Factors*/
-	u8 tempcalsys[2];	/* 0x0028 - 0x0029 System Temperature Calibration Factors*/
-	u8 res_1[22];		/* 0x0020 - 0x003f Reserved */
-	u8 mac_size;		/* 0x0040	   Mac table size */
-	u8 mac_flag;		/* 0x0041	   Mac table flags */
-	u8 mac[8][6];		/* 0x0042 - 0x0071 Mac addresses */
-	u32 crc;		/* 0x0072	   crc32 checksum */
-} EEPROM_data;
-
-static EEPROM_data mac_data;
-
-int mac_show(void)
+#include "../common/eeprom.h"
+
+#if !defined(CFG_I2C_EEPROM_CCID) && !defined(CFG_I2C_EEPROM_NXID)
+#error "Please define either CFG_I2C_EEPROM_CCID or CFG_I2C_EEPROM_NXID"
+#endif
+
+/**
+ * static eeprom: EEPROM layout for CCID or NXID formats
+ *
+ * See application note AN3638 for details.
+ */
+static struct __attribute__ ((__packed__)) eeprom {
+#ifdef CFG_I2C_EEPROM_CCID
+	u8 id[4];         /* 0x00 - 0x03 EEPROM Tag 'CCID' */
+	u8 major;         /* 0x04        Board revision, major */
+	u8 minor;         /* 0x05        Board revision, minor */
+	u8 sn[10];        /* 0x06 - 0x0F Serial Number*/
+	u8 errata[2];     /* 0x10 - 0x11 Errata Level */
+	u8 date[6];       /* 0x12 - 0x17 Build Date */
+	u8 res_0[40];     /* 0x18 - 0x3f Reserved */
+	u8 mac_count;     /* 0x40        Number of MAC addresses */
+	u8 mac_flag;      /* 0x41        MAC table flags */
+	u8 mac[8][6];     /* 0x42 - 0x71 MAC addresses */
+	u32 crc;          /* 0x72        CRC32 checksum */
+#endif
+#ifdef CFG_I2C_EEPROM_NXID
+	u8 id[4];         /* 0x00 - 0x03 EEPROM Tag 'NXID' */
+	u8 sn[12];        /* 0x04 - 0x0F Serial Number */
+	u8 errata[5];     /* 0x10 - 0x14 Errata Level */
+	u8 date[6];       /* 0x15 - 0x1a Build Date */
+	u8 res_0;         /* 0x1b        Reserved */
+	u32 version;      /* 0x1c - 0x1f NXID Version */
+	u8 tempcal[8];    /* 0x20 - 0x27 Temperature Calibration Factors */
+	u8 tempcalsys[2]; /* 0x28 - 0x29 System Temperature Calibration Factors */
+	u8 tempcalflags;  /* 0x2a        Temperature Calibration Flags */
+	u8 res_1[21];     /* 0x2b - 0x3f Reserved */
+	u8 mac_count;     /* 0x40        Number of MAC addresses */
+	u8 mac_flag;      /* 0x41        MAC table flags */
+	u8 mac[8][6];     /* 0x42 - 0x71 MAC addresses */
+	u32 crc;          /* 0x72        CRC32 checksum */
+#endif
+} e;
+
+/* Set to 1 if we've read EEPROM into memory */
+static int has_been_read = 0;
+
+#ifdef CFG_I2C_EEPROM_NXID
+/* Is this a valid NXID EEPROM? */
+#define is_valid (*((u32 *)e.id) == (('N' << 24) | ('X' << 16) | ('I' << 8) | 'D'))
+#endif
+
+#ifdef CFG_I2C_EEPROM_CCID
+/* Is this a valid CCID EEPROM? */
+#define is_valid (*((u32 *)e.id) == (('C' << 24) | ('C' << 16) | ('I' << 8) | 'D'))
+#endif
+
+/**
+ * show_eeprom - display the contents of the EEPROM
+ */
+static void show_eeprom(void)
 {
 	int i;
-	u8 mac_size;
-	unsigned char ethaddr[8][18];
-	unsigned char enetvar[32];
-
-	/* Show EEPROM tagID,
-	 * always the four characters 'NXID'.
-	 */
-	printf("ID ");
-	for (i = 0; i < 4; i++)
-		printf("%c", mac_data.id[i]);
-	printf("\n");
-
-	/* Show Serial number,
-	 * 0 to 11 charaters of errata information.
-	 */
-	printf("SN ");
-	for (i = 0; i < 12; i++)
-		printf("%c", mac_data.sn[i]);
-	printf("\n");
-
-	/* Show Errata Level,
-	 * 0 to 4 characters of errata information.
-	 */
-	printf("Errata ");
-	for (i = 0; i < 5; i++)
-		printf("%c", mac_data.errata[i]);
-	printf("\n");
-
-	/* Show Build Date,
-	 * BCD date values, as YYMMDDhhmmss.
-	 */
-	printf("Date 20%02x/%02x/%02x %02x:%02x:%02x\n",
-	       mac_data.date[0],
-	       mac_data.date[1],
-	       mac_data.date[2],
-	       mac_data.date[3],
-	       mac_data.date[4],
-	       mac_data.date[5]);
-
-	/* Show MAC table size,
-	 * Value from 0 to 7 indicating how many MAC
-	 * addresses are stored in the system EEPROM.
-	 */
-	if((mac_data.mac_size > 0) && (mac_data.mac_size <= 8))
-		mac_size = mac_data.mac_size;
-	else
-		mac_size = 8; /* Set the max size */
-	printf("MACSIZE %x\n", mac_size);
-
-	/* Show Mac addresses */
-	for (i = 0; i < mac_size; i++) {
-		sprintf((char *)ethaddr[i],
-			"%02x:%02x:%02x:%02x:%02x:%02x",
-			mac_data.mac[i][0],
-			mac_data.mac[i][1],
-			mac_data.mac[i][2],
-			mac_data.mac[i][3],
-			mac_data.mac[i][4],
-			mac_data.mac[i][5]);
-		printf("MAC %d %s\n", i, ethaddr[i]);
-
-		sprintf((char *)enetvar,
-			i ? "eth%daddr" : "ethaddr", i);
-		setenv((char *)enetvar, (char *)ethaddr[i]);
+	unsigned int crc;
+
+	/* EEPROM tag ID, either CCID or NXID */
+#ifdef CFG_I2C_EEPROM_NXID
+	printf("ID: %c%c%c%c v%u\n", e.id[0], e.id[1], e.id[2], e.id[3],
+		be32_to_cpu(e.version));
+#else
+	printf("ID: %c%c%c%c\n", e.id[0], e.id[1], e.id[2], e.id[3]);
+#endif
+
+	/* Serial number */
+	printf("SN: %s\n", e.sn);
+
+	/* Errata level. */
+#ifdef CFG_I2C_EEPROM_NXID
+	printf("Errata: %s\n", e.errata);
+#else
+	printf("Errata: %c%c\n",
+		e.errata[0] ? e.errata[0] : '.',
+		e.errata[1] ? e.errata[1] : '.');
+#endif
+
+	/* Build date, BCD date values, as YYMMDDhhmmss */
+	printf("Build date: 20%02x/%02x/%02x %02x:%02x:%02x %s\n",
+		e.date[0], e.date[1], e.date[2],
+		e.date[3] & 0x7F, e.date[4], e.date[5],
+		e.date[3] & 0x80 ? "PM" : "");
+
+	/* Show MAC addresses  */
+	for (i = 0; i < min(e.mac_count, 8); i++) {
+		u8 *p = e.mac[i];
 
+		printf("Eth%u: %02x:%02x:%02x:%02x:%02x:%02x\n", i,
+			p[0], p[1], p[2], p[3],	p[4], p[5]);
 	}
 
-	return 0;
+	crc = crc32(0, (void *)&e, sizeof(e) - 4);
+
+	if (crc == be32_to_cpu(e.crc))
+		printf("CRC: %08x\n", be32_to_cpu(e.crc));
+	else
+		printf("CRC: %08x (should be %08x)\n",
+			be32_to_cpu(e.crc), crc);
+
+#ifdef DEBUG
+	printf("EEPROM dump: (0x%x bytes)\n", sizeof(e));
+	for (i = 0; i < sizeof(e); i++) {
+		if ((i % 16) == 0)
+			printf("%02X: ", i);
+		printf("%02X ", ((u8 *)&e)[i]);
+		if (((i % 16) == 15) || (i == sizeof(e) - 1))
+			printf("\n");
+	}
+#endif
 }
 
-int mac_read(void)
+/**
+ * read_eeprom - read the EEPROM into memory
+ */
+static int read_eeprom(void)
 {
-	int ret, length;
-	unsigned int crc = 0;
-	unsigned char dev = ID_EEPROM_ADDR, *data;
+	int ret;
+#ifdef CFG_EEPROM_BUS_NUM
+	unsigned int bus;
+#endif
 
-	length = sizeof(EEPROM_data);
-	ret = i2c_read(dev, 0, 1, (unsigned char *)(&mac_data), length);
-	if (ret) {
-		printf("Read failed.\n");
-		return -1;
-	}
+	if (has_been_read)
+		return 0;
 
-	data = (unsigned char *)(&mac_data);
-	printf("Check CRC on reading ...");
-	crc = crc32(crc, data, length - 4);
-	if (crc != mac_data.crc) {
-		printf("CRC checksum is invalid, in EEPROM CRC is %x, calculated CRC is %x\n",
-		     mac_data.crc, crc);
-		return -1;
-	} else {
-		printf("CRC OK\n");
-		mac_show();
-	}
-	return 0;
+#ifdef CFG_EEPROM_BUS_NUM
+	bus = i2c_get_bus_num();
+	i2c_set_bus_num(CFG_EEPROM_BUS_NUM);
+#endif
+
+	ret = i2c_read(CFG_I2C_EEPROM_ADDR, 0, CFG_I2C_EEPROM_ADDR_LEN,
+		(void *)&e, sizeof(e));
+
+#ifdef CFG_EEPROM_BUS_NUM
+	i2c_set_bus_num(bus);
+#endif
+
+#ifdef DEBUG
+	show_eeprom();
+#endif
+
+	has_been_read = (ret == 0) ? 1 : 0;
+
+	return ret;
 }
 
-int mac_prog(void)
+/**
+ * prog_eeprom - write the EEPROM from memory
+ */
+static int prog_eeprom(void)
 {
 	int ret, i, length;
-	unsigned int crc = 0;
-	unsigned char dev = ID_EEPROM_ADDR, *ptr;
-	unsigned char *eeprom_data = (unsigned char *)(&mac_data);
-
-	mac_data.res_0 = 0;
-	memset((void *)mac_data.res_1, 0, sizeof(mac_data.res_1));
-
-	length = sizeof(EEPROM_data);
-	crc = crc32(crc, eeprom_data, length - 4);
-	mac_data.crc = crc;
-	for (i = 0, ptr = eeprom_data; i < length; i += 8, ptr += 8) {
-		ret = i2c_write(dev, i, 1, ptr, min((length - i),8));
-		udelay(5000);	/* 5ms write cycle timing */
+	unsigned int crc;
+	void *p;
+#ifdef CFG_EEPROM_BUS_NUM
+	unsigned int bus;
+#endif
+
+	/* Set the reserved values to 0xFF   */
+#ifdef CFG_I2C_EEPROM_NXID
+	e.res_0 = 0xFF;
+	memset(e.res_1, 0xFF, sizeof(e.res_1));
+#else
+	memset(e.res_0, 0xFF, sizeof(e.res_0));
+#endif
+
+	length = sizeof(e);
+	crc = crc32(0, (void *)&e, length - 4);
+	e.crc = cpu_to_be32(crc);
+
+#ifdef CFG_EEPROM_BUS_NUM
+	bus = i2c_get_bus_num();
+	i2c_set_bus_num(CFG_EEPROM_BUS_NUM);
+#endif
+
+	for (i = 0, p = &e; i < length; i += 8, p += 8) {
+		ret = i2c_write(CFG_I2C_EEPROM_ADDR, i, CFG_I2C_EEPROM_ADDR_LEN,
+			p, min((length - i), 8));
 		if (ret)
 			break;
+		udelay(5000);	/* 5ms write cycle timing */
 	}
+
+#ifdef CFG_EEPROM_BUS_NUM
+	i2c_set_bus_num(bus);
+#endif
+
 	if (ret) {
 		printf("Programming failed.\n");
 		return -1;
-	} else {
-		printf("Programming %d bytes. Reading back ...\n", length);
-		mac_read();
 	}
+
+	printf("Programming passed.\n");
 	return 0;
 }
 
-int do_mac(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+/**
+ * h2i - converts hex character into a number
+ *
+ * This function takes a hexadecimal character (e.g. '7' or 'C') and returns
+ * the integer equivalent.
+ */
+static inline u8 h2i(char p)
+{
+	if ((p >= '0') && (p <= '9'))
+		return p - '0';
+
+	if ((p >= 'A') && (p <= 'F'))
+		return (p - 'A') + 10;
+
+	if ((p >= 'a') && (p <= 'f'))
+		return (p - 'a') + 10;
+
+	return 0;
+}
+
+/**
+ * set_date - stores the build date into the EEPROM
+ *
+ * This function takes a pointer to a string in the format "YYMMDDhhmmss"
+ * (2-digit year, 2-digit month, etc), converts it to a 6-byte BCD string,
+ * and stores it in the build date field of the EEPROM local copy.
+ */
+static void set_date(const char *string)
+{
+	unsigned int i;
+
+	if (strlen(string) != 12) {
+		printf("Usage: mac date YYMMDDhhmmss\n");
+		return;
+	}
+
+	for (i = 0; i < 6; i++)
+		e.date[i] = h2i(string[2 * i]) << 4 | h2i(string[2 * i + 1]);
+}
+
+/**
+ * set_mac_address - stores a MAC address into the EEPROM
+ *
+ * This function takes a pointer to MAC address string
+ * (i.e."XX:XX:XX:XX:XX:XX", where "XX" is a two-digit hex number) and
+ * stores it in one of the MAC address fields of the EEPROM local copy.
+ */
+static void set_mac_address(unsigned int index, const char *string)
+{
+	char *p = (char *) string;
+	unsigned int i;
+
+	if (!string) {
+		printf("Usage: mac <n> XX:XX:XX:XX:XX:XX\n");
+		return;
+	}
+
+	for (i = 0; *p && (i < 6); i++) {
+		e.mac[index][i] = simple_strtoul(p, &p, 16);
+		if (*p == ':')
+			p++;
+	}
+}
+
+int do_mac(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
 	int i;
-	char cmd = 's';
-	unsigned long long mac_val;
+	char cmd;
 
-	if (i2c_probe(ID_EEPROM_ADDR) != 0)
-		return -1;
+	if (argc == 1) {
+		show_eeprom();
+		return 0;
+	}
+
+	cmd = argv[1][0];
 
-	if (argc > 1) {
-		cmd = argv[1][0];
+	if (cmd == 'r') {
+		read_eeprom();
+		return 0;
+	}
+
+	if ((cmd == 'i') && (argc > 2)) {
+		for (i = 0; i < 4; i++)
+			e.id[i] = argv[2][i];
+		return 0;
+	}
+
+	if (!is_valid) {
+		printf("Please read the EEPROM ('r') and/or set the ID ('i') first.\n");
+		return 0;
+	}
+
+	if (argc == 2) {
 		switch (cmd) {
-		case 'r':	/* display */
-			mac_read();
-			break;
 		case 's':	/* save */
-			mac_prog();
-			break;
-		case 'i':	/* id */
-			for (i = 0; i < 4; i++) {
-				mac_data.id[i] = argv[2][i];
-			}
+			prog_eeprom();
 			break;
-		case 'n':	/* serial number */
-			for (i = 0; i < 12; i++) {
-				mac_data.sn[i] = argv[2][i];
-			}
-			break;
-		case 'e':	/* errata */
-			for (i = 0; i < 5; i++) {
-				mac_data.errata[i] = argv[2][i];
-			}
-			break;
-		case 'd':	/* date */
-			mac_val = simple_strtoull(argv[2], NULL, 16);
-			for (i = 0; i < 6; i++) {
-				mac_data.date[i] = (mac_val >> (40 - 8 * i));
-			}
-			break;
-		case 'p':	/* mac table size */
-			mac_data.mac_size =
-			    (unsigned char)simple_strtoul(argv[2], NULL, 16);
-			break;
-		case '0':	/* mac 0 */
-		case '1':	/* mac 1 */
-		case '2':	/* mac 2 */
-		case '3':	/* mac 3 */
-		case '4':	/* mac 4 */
-		case '5':	/* mac 5 */
-		case '6':	/* mac 6 */
-		case '7':	/* mac 7 */
-			mac_val = simple_strtoull(argv[2], NULL, 16);
-			for (i = 0; i < 6; i++) {
-				mac_data.mac[cmd - '0'][i] =
-				    *((unsigned char *)
-				      (((unsigned int)(&mac_val)) + i + 2));
-			}
-			break;
-		case 'h':	/* help */
 		default:
 			printf("Usage:\n%s\n", cmdtp->usage);
 			break;
 		}
-	} else {
-		mac_show();
+
+		return 0;
 	}
+
+	/* We know we have at least one parameter  */
+
+	switch (cmd) {
+	case 'n':	/* serial number */
+		memset(e.sn, 0, sizeof(e.sn));
+		strncpy((char *)e.sn, argv[2], sizeof(e.sn) - 1);
+		break;
+	case 'e':	/* errata */
+#ifdef CFG_I2C_EEPROM_NXID
+		memset(e.errata, 0, 5);
+		strncpy((char *)e.errata, argv[2], 4);
+#else
+		e.errata[0] = argv[2][0];
+		e.errata[1] = argv[2][1];
+#endif
+		break;
+	case 'd':	/* date BCD format YYMMDDhhmmss */
+		set_date(argv[2]);
+		break;
+	case 'p':	/* MAC table size */
+		e.mac_count = simple_strtoul(argv[2], NULL, 16);
+		break;
+	case '0' ... '7':	/* "mac 0" through "mac 7" */
+		set_mac_address(cmd - '0', argv[2]);
+		break;
+	case 'h':	/* help */
+	default:
+		printf("Usage:\n%s\n", cmdtp->usage);
+		break;
+	}
+
 	return 0;
 }
 
+/**
+ * mac_read_from_eeprom - read the MAC addresses from EEPROM
+ *
+ * This function reads the MAC addresses from EEPROM and sets the
+ * appropriate environment variables for each one read.
+ *
+ * The environment variables are only set if they haven't been set already.
+ * This ensures that any user-saved variables are never overwritten.
+ *
+ * This function must be called after relocation.
+ */
 int mac_read_from_eeprom(void)
 {
-	int length, i;
-	unsigned char dev = ID_EEPROM_ADDR;
-	unsigned char *data;
-	unsigned char ethaddr[4][18];
-	unsigned char enetvar[32];
-	unsigned int crc = 0;
-
-	length = sizeof(EEPROM_data);
-	if (i2c_read(dev, 0, 1, (unsigned char *)(&mac_data), length)) {
+	unsigned int i;
+
+	if (read_eeprom()) {
 		printf("Read failed.\n");
 		return -1;
 	}
 
-	data = (unsigned char *)(&mac_data);
-	crc = crc32(crc, data, length - 4);
-	if (crc != mac_data.crc) {
+	if (!is_valid) {
+		printf("Invalid ID (%02x %02x %02x %02x)\n", e.id[0], e.id[1], e.id[2], e.id[3]);
 		return -1;
-	} else {
-		for (i = 0; i < 4; i++) {
-			if (memcmp(&mac_data.mac[i], "\0\0\0\0\0\0", 6)) {
-				sprintf((char *)ethaddr[i],
-					"%02x:%02x:%02x:%02x:%02x:%02x",
-					mac_data.mac[i][0],
-					mac_data.mac[i][1],
-					mac_data.mac[i][2],
-					mac_data.mac[i][3],
-					mac_data.mac[i][4],
-					mac_data.mac[i][5]);
-				sprintf((char *)enetvar,
-					i ? "eth%daddr" : "ethaddr",
-					i);
-				setenv((char *)enetvar, (char *)ethaddr[i]);
-			}
+	}
+
+	if (be32_to_cpu(e.crc) != 0xFFFFFFFF) {
+		u32 crc = crc32(0, (void *)&e, sizeof(e) - 4);
+
+		if (crc != be32_to_cpu(e.crc)) {
+			printf("CRC mismatch (%08x != %08x).\n", crc,
+				be32_to_cpu(e.crc));
+			return -1;
+		}
+	}
+
+	for (i = 0; i < min(4, e.mac_count); i++) {
+		if (memcmp(&e.mac[i], "\0\0\0\0\0\0", 6) &&
+		    memcmp(&e.mac[i], "\xFF\xFF\xFF\xFF\xFF\xFF", 6)) {
+			char ethaddr[18];
+			char enetvar[9];
+
+			sprintf(ethaddr, "%02X:%02X:%02X:%02X:%02X:%02X",
+				e.mac[i][0],
+				e.mac[i][1],
+				e.mac[i][2],
+				e.mac[i][3],
+				e.mac[i][4],
+				e.mac[i][5]);
+			sprintf(enetvar, i ? "eth%daddr" : "ethaddr", i);
+			/* Only initialize environment variables that are blank
+			 * (i.e. have not yet been set)
+			 */
+			if (!getenv(enetvar))
+				setenv(enetvar, ethaddr);
 		}
 	}
+
 	return 0;
 }
+
+#ifdef CFG_I2C_EEPROM_CCID
+
+/**
+ * get_cpu_board_revision - get the CPU board revision on 85xx boards
+ *
+ * Read the EEPROM to determine the board revision.
+ *
+ * This function is called before relocation, so we need to read a private
+ * copy of the EEPROM into a local variable on the stack.
+ *
+ * Also, we assume that CFG_EEPROM_BUS_NUM == CFG_SPD_BUS_NUM.  The global
+ * variable i2c_bus_num must be compile-time initialized to CFG_SPD_BUS_NUM,
+ * so that the SPD code will work.  This means that all pre-relocation I2C
+ * operations can only occur on the CFG_SPD_BUS_NUM bus.  So if
+ * CFG_EEPROM_BUS_NUM != CFG_SPD_BUS_NUM, then we can't read the EEPROM when
+ * this function is called.  Oh well.
+ */
+unsigned int get_cpu_board_revision(void)
+{
+	struct board_eeprom {
+		u32 id;           /* 0x00 - 0x03 EEPROM Tag 'CCID' */
+		u8 major;         /* 0x04        Board revision, major */
+		u8 minor;         /* 0x05        Board revision, minor */
+	} be;
+
+	i2c_read(CFG_I2C_EEPROM_ADDR, 0, CFG_I2C_EEPROM_ADDR_LEN,
+		(void *)&be, sizeof(be));
+
+	if (be.id != (('C' << 24) | ('C' << 16) | ('I' << 8) | 'D'))
+		return MPC85XX_CPU_BOARD_REV(0, 0);
+
+	if ((be.major == 0xff) && (be.minor == 0xff))
+		return MPC85XX_CPU_BOARD_REV(0, 0);
+
+	return MPC85XX_CPU_BOARD_REV(e.major, e.minor);
+}
+#endif

board/freescale/m5235evb/m5235evb.c

@@ -75,9 +75,11 @@ phys_size_t initdram(int board_type)
 		sdram->dacr0 =
 		    SDRAMC_DARCn_BA(CFG_SDRAM_BASE) | SDRAMC_DARCn_CASL_C1 |
 		    SDRAMC_DARCn_CBM_CMD20 | SDRAMC_DARCn_PS_32;
+		asm("nop");
 
 		/* Initialize DMR0 */
 		sdram->dmr0 = ((dramsize - 1) & 0xFFFC0000) | SDRAMC_DMRn_V;
+		asm("nop");
 
 		/* Set IP (bit 3) in DACR */
 		sdram->dacr0 |= SDRAMC_DARCn_IP;
@@ -100,6 +102,7 @@ phys_size_t initdram(int board_type)
 
 		/* Finish the configuration by issuing the MRS. */
 		sdram->dacr0 |= SDRAMC_DARCn_IMRS;
+		asm("nop");
 
 		/* Write to the SDRAM Mode Register */
 		*(u32 *) (CFG_SDRAM_BASE + 0x400) = 0xA5A59696;

board/freescale/m5275evb/Makefile

@@ -31,7 +31,7 @@ SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))
 SOBJS	:= $(addprefix $(obj),$(SOBJS))
 
-$(LIB):	.depend $(OBJS)
+$(LIB):	$(obj).depend $(OBJS)
 	$(AR) $(ARFLAGS) $@ $(OBJS)
 
 #########################################################################

board/freescale/mpc7448hpc2/tsi108_init.c

@@ -165,8 +165,8 @@ int board_early_init_f (void)
 		printf ("Invalid DDR2 clock setting\n");
 		return -1;
 	}
-	printf ("BUS: %d MHz\n", get_board_bus_clk() / 1000000);
-	printf ("MEM: %d MHz\n", gd->mem_clk / 1000000);
+	printf ("BUS: %lu MHz\n", get_board_bus_clk() / 1000000);
+	printf ("MEM: %lu MHz\n", gd->mem_clk / 1000000);
 	return 0;
 }
 
@@ -622,8 +622,8 @@ int misc_init_r (void)
 #ifdef CFG_L2
 	l2cache_enable ();
 #endif
-	printf ("BUS:   %d MHz\n", gd->bus_clk / 1000000);
-	printf ("MEM:   %d MHz\n", gd->mem_clk / 1000000);
+	printf ("BUS:   %lu MHz\n", gd->bus_clk / 1000000);
+	printf ("MEM:   %lu MHz\n", gd->mem_clk / 1000000);
 
 	/*
 	 * All the information needed to print the cache details is avaiblable

board/freescale/mpc8544ds/law.c

@@ -30,7 +30,7 @@
 struct law_entry law_table[] = {
 	SET_LAW(CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI),
 	SET_LAW(CFG_PCI1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCI),
-	SET_LAW(CFG_LBC_CACHE_BASE, LAWAR_SIZE_256M, LAW_TRGT_IF_LBC),
+	SET_LAW(CFG_LBC_NONCACHE_BASE, LAWAR_SIZE_128M, LAW_TRGT_IF_LBC),
 	SET_LAW(CFG_PCIE1_MEM_PHYS, LAWAR_SIZE_256M, LAW_TRGT_IF_PCIE_1),
 	SET_LAW(CFG_PCIE1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCIE_1),
 	SET_LAW(CFG_PCIE2_MEM_PHYS, LAWAR_SIZE_512M, LAW_TRGT_IF_PCIE_2),

board/freescale/mpc8544ds/mpc8544ds.c

@@ -47,9 +47,12 @@ int checkboard (void)
 	volatile ccsr_local_ecm_t *ecm = (void *)(CFG_MPC85xx_ECM_ADDR);
 
 	if ((uint)&gur->porpllsr != 0xe00e0000) {
-		printf("immap size error %x\n",&gur->porpllsr);
+		printf("immap size error %lx\n",(ulong)&gur->porpllsr);
 	}
-	printf ("Board: MPC8544DS\n");
+	printf ("Board: MPC8544DS, System ID: 0x%02x, "
+		"System Version: 0x%02x, FPGA Version: 0x%02x\n",
+		in8(PIXIS_BASE + PIXIS_ID), in8(PIXIS_BASE + PIXIS_VER),
+		in8(PIXIS_BASE + PIXIS_PVER));
 
 	lbc->ltesr = 0xffffffff;	/* Clear LBC error interrupts */
 	lbc->lteir = 0xffffffff;	/* Enable LBC error interrupts */

board/freescale/mpc8544ds/tlb.c

@@ -79,21 +79,13 @@ struct fsl_e_tlb_entry tlb_table[] = {
 		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
 		      0, 4, BOOKE_PAGESZ_64M, 1),
 
-#ifdef CFG_LBC_CACHE_BASE
 	/*
-	 * TLB 5:	64M	Cacheable, non-guarded
-	 */
-	SET_TLB_ENTRY(1, CFG_LBC_CACHE_BASE, CFG_LBC_CACHE_BASE,
-		      MAS3_SX|MAS3_SW|MAS3_SR, 0,
-		      0, 5, BOOKE_PAGESZ_64M, 1),
-#endif
-	/*
-	 * TLB 6:	64M	Non-cacheable, guarded
+	 * TLB 5:	64M	Non-cacheable, guarded
 	 * 0xf8000000	64M	PIXIS 0xF8000000 - 0xFBFFFFFF
 	 */
 	SET_TLB_ENTRY(1, CFG_LBC_NONCACHE_BASE, CFG_LBC_NONCACHE_BASE,
 		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
-		      0, 6, BOOKE_PAGESZ_64M, 1),
+		      0, 5, BOOKE_PAGESZ_64M, 1),
 };
 
 int num_tlb_entries = ARRAY_SIZE(tlb_table);

board/freescale/mpc8544ds/u-boot.lds

@@ -71,6 +71,7 @@ SECTIONS
     lib_generic/crc32.o (.text)
     lib_ppc/extable.o (.text)
     lib_generic/zlib.o (.text)
+    drivers/bios_emulator/atibios.o (.text)
     *(.text)
     *(.fixup)
     *(.got1)

board/freescale/mpc8610hpcd/mpc8610hpcd.c

@@ -99,7 +99,10 @@ int checkboard(void)
 	volatile immap_t *immap = (immap_t *)CFG_IMMR;
 	volatile ccsr_local_mcm_t *mcm = &immap->im_local_mcm;
 
-	puts("Board: MPC8610HPCD\n");
+	printf ("Board: MPC8610HPCD, System ID: 0x%02x, "
+		"System Version: 0x%02x, FPGA Version: 0x%02x\n",
+		in8(PIXIS_BASE + PIXIS_ID), in8(PIXIS_BASE + PIXIS_VER),
+		in8(PIXIS_BASE + PIXIS_PVER));
 
 	mcm->abcr |= 0x00010000; /* 0 */
 	mcm->hpmr3 = 0x80000008; /* 4c */

board/freescale/mpc8641hpcn/mpc8641hpcn.c

@@ -47,8 +47,10 @@ int board_early_init_f(void)
 
 int checkboard(void)
 {
-	puts("Board: MPC8641HPCN\n");
-
+	printf ("Board: MPC8641HPCN, System ID: 0x%02x, "
+		"System Version: 0x%02x, FPGA Version: 0x%02x\n",
+		in8(PIXIS_BASE + PIXIS_ID), in8(PIXIS_BASE + PIXIS_VER),
+		in8(PIXIS_BASE + PIXIS_PVER));
 	return 0;
 }
 

board/integratorcp/flash.c

@@ -393,7 +393,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
 						*addr = (FPW) 0x00D000D0;
 					} else {
 #ifdef DEBUG
-						printf ("Timeout,0x%08x\n", status);
+						printf ("Timeout,0x%08lx\n", status);
 #else
 						printf("Timeout\n");
 #endif
@@ -515,7 +515,7 @@ static int write_data (flash_info_t * info, ulong dest, FPW data)
 
 	/* Check if Flash is (sufficiently) erased */
 	if ((*addr & data) != data) {
-		printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
+		printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
 		return (2);
 	}
 
@@ -542,7 +542,7 @@ static int write_data (flash_info_t * info, ulong dest, FPW data)
 #ifdef DEBUG
 			*addr = (FPW) 0x00700070;
 			status = *addr;
-			printf("## status=0x%08x, addr=0x%08x\n", status, addr);
+			printf("## status=0x%08lx, addr=0x%p\n", status, addr);
 #endif
 			*addr = (FPW) 0x00500050; /* clear status register cmd */
 			*addr = (FPW) 0x00FF00FF; /* restore read mode */

board/matrix_vision/mvbc_p/Makefile

@@ -0,0 +1,50 @@
+#
+# (C) Copyright 2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# (C) Copyright 2004-2008
+# Matrix-Vision GmbH, info@matrix-vision.de
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS	:= $(BOARD).o fpga.o
+
+SRCS    := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS    := $(addprefix $(obj),$(COBJS))
+SOBJS   := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+	        $(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend

board/matrix_vision/mvbc_p/config.mk

@@ -0,0 +1,30 @@
+#
+# (C) Copyright 2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
+
+ifndef TEXT_BASE
+TEXT_BASE = 0xFF800000
+endif
+
+PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board

board/matrix_vision/mvbc_p/fpga.c

@@ -0,0 +1,177 @@
+/*
+ * (C) Copyright 2002
+ * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
+ * Keith Outwater, keith_outwater@mvis.com.
+ *
+ * (C) Copyright 2008
+ * Andre Schwarz, Matrix Vision GmbH, andre.schwarz@matrix-vision.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <ACEX1K.h>
+#include <command.h>
+#include "fpga.h"
+#include "mvbc_p.h"
+
+#ifdef FPGA_DEBUG
+#define fpga_debug(fmt, args...)	printf("%s: "fmt, __func__, ##args)
+#else
+#define fpga_debug(fmt, args...)
+#endif
+
+Altera_CYC2_Passive_Serial_fns altera_fns = {
+	fpga_null_fn,
+	fpga_config_fn,
+	fpga_status_fn,
+	fpga_done_fn,
+	fpga_wr_fn,
+	fpga_null_fn,
+	fpga_null_fn,
+	0
+};
+
+Altera_desc cyclone2 = {
+	Altera_CYC2,
+	passive_serial,
+	Altera_EP2C8_SIZE,
+	(void *) &altera_fns,
+	NULL,
+	0
+};
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int mvbc_p_init_fpga(void)
+{
+	fpga_debug("Initialize FPGA interface (reloc 0x%.8lx)\n",
+		gd->reloc_off);
+	fpga_init(gd->reloc_off);
+	fpga_add(fpga_altera, &cyclone2);
+	fpga_config_fn(0, 1, 0);
+	udelay(60);
+
+	return 1;
+}
+
+int fpga_null_fn(int cookie)
+{
+	return 0;
+}
+
+int fpga_config_fn(int assert, int flush, int cookie)
+{
+	struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
+	u32 dvo = gpio->simple_dvo;
+
+	fpga_debug("SET config : %s\n", assert ? "low" : "high");
+	if (assert)
+		dvo |= FPGA_CONFIG;
+	else
+		dvo &= ~FPGA_CONFIG;
+
+	if (flush)
+		gpio->simple_dvo = dvo;
+
+	return assert;
+}
+
+int fpga_done_fn(int cookie)
+{
+	struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
+	int result = 0;
+
+	udelay(10);
+	fpga_debug("CONF_DONE check ... ");
+	if (gpio->simple_ival & FPGA_CONF_DONE) {
+		fpga_debug("high\n");
+		result = 1;
+	} else
+		fpga_debug("low\n");
+
+	return result;
+}
+
+int fpga_status_fn(int cookie)
+{
+	struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
+	int result = 0;
+
+	fpga_debug("STATUS check ... ");
+	if (gpio->sint_ival & FPGA_STATUS) {
+		fpga_debug("high\n");
+		result = 1;
+	} else
+		fpga_debug("low\n");
+
+	return result;
+}
+
+int fpga_clk_fn(int assert_clk, int flush, int cookie)
+{
+	struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
+	u32 dvo = gpio->simple_dvo;
+
+	fpga_debug("CLOCK %s\n", assert_clk ? "high" : "low");
+	if (assert_clk)
+		dvo |= FPGA_CCLK;
+	else
+		dvo &= ~FPGA_CCLK;
+
+	if (flush)
+		gpio->simple_dvo = dvo;
+
+	return assert_clk;
+}
+
+static inline int _write_fpga(u8 val)
+{
+	int i;
+	struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
+	u32 dvo = gpio->simple_dvo;
+
+	for (i=0; i<8; i++) {
+		dvo &= ~FPGA_CCLK;
+		gpio->simple_dvo = dvo;
+		dvo &= ~FPGA_DIN;
+		if (val & 1)
+			dvo |= FPGA_DIN;
+		gpio->simple_dvo = dvo;
+		dvo |= FPGA_CCLK;
+		gpio->simple_dvo = dvo;
+		val >>= 1;
+	}
+
+	return 0;
+}
+
+int fpga_wr_fn(void *buf, size_t len, int flush, int cookie)
+{
+	unsigned char *data = (unsigned char *) buf;
+	int i;
+
+	fpga_debug("fpga_wr: buf %p / size %d\n", buf, len);
+	for (i = 0; i < len; i++)
+		_write_fpga(data[i]);
+	fpga_debug("\n");
+
+	return FPGA_SUCCESS;
+}

include/asm-microblaze/serial_xuartlite.h → board/matrix_vision/mvbc_p/fpga.h

@@ -1,7 +1,7 @@
 /*
- * (C) Copyright 2004 Atmark Techno, Inc.
- *
- * Yasushi SHOJI <yashi@atmark-techno.com>
+ * (C) Copyright 2002
+ * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
+ * Keith Outwater, keith_outwater@mvis.com.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -20,6 +20,15 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  * MA 02111-1307 USA
+ *
  */
 
-#include <asm/arch/xuartlite_l.h>
+extern int mvbc_p_init_fpga(void);
+
+extern int fpga_pgm_fn(int assert_pgm, int flush, int cookie);
+extern int fpga_status_fn(int cookie);
+extern int fpga_config_fn(int assert, int flush, int cookie);
+extern int fpga_done_fn(int cookie);
+extern int fpga_clk_fn(int assert_clk, int flush, int cookie);
+extern int fpga_wr_fn(void *buf, size_t len, int flush, int cookie);
+extern int fpga_null_fn(int cookie);

board/matrix_vision/mvbc_p/mvbc_p.c

@@ -0,0 +1,325 @@
+/*
+ * (C) Copyright 2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2004
+ * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
+ *
+ * (C) Copyright 2005-2007
+ * Andre Schwarz, Matrix Vision GmbH, andre.schwarz@matrix-vision.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <mpc5xxx.h>
+#include <malloc.h>
+#include <pci.h>
+#include <i2c.h>
+#include <environment.h>
+#include <fdt_support.h>
+#include <asm/io.h>
+#include "fpga.h"
+#include "mvbc_p.h"
+
+#define SDRAM_MODE	0x00CD0000
+#define SDRAM_CONTROL	0x504F0000
+#define SDRAM_CONFIG1	0xD2322800
+#define SDRAM_CONFIG2	0x8AD70000
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void sdram_start (int hi_addr)
+{
+	long hi_bit = hi_addr ? 0x01000000 : 0;
+
+	/* unlock mode register */
+	out_be32((u32*)MPC5XXX_SDRAM_CTRL, SDRAM_CONTROL | 0x80000000 | hi_bit);
+
+	/* precharge all banks */
+	out_be32((u32*)MPC5XXX_SDRAM_CTRL, SDRAM_CONTROL | 0x80000002 | hi_bit);
+
+	/* precharge all banks */
+	out_be32((u32*)MPC5XXX_SDRAM_CTRL, SDRAM_CONTROL | 0x80000002 | hi_bit);
+
+	/* auto refresh */
+	out_be32((u32*)MPC5XXX_SDRAM_CTRL, SDRAM_CONTROL | 0x80000004 | hi_bit);
+
+	/* set mode register */
+	out_be32((u32*)MPC5XXX_SDRAM_MODE, SDRAM_MODE);
+
+	/* normal operation */
+	out_be32((u32*)MPC5XXX_SDRAM_CTRL, SDRAM_CONTROL | hi_bit);
+}
+
+phys_addr_t initdram (int board_type)
+{
+	ulong dramsize = 0;
+	ulong test1,
+	      test2;
+
+	/* setup SDRAM chip selects */
+	out_be32((u32*)MPC5XXX_SDRAM_CS0CFG, 0x0000001e);
+
+	/* setup config registers */
+	out_be32((u32*)MPC5XXX_SDRAM_CONFIG1, SDRAM_CONFIG1);
+	out_be32((u32*)MPC5XXX_SDRAM_CONFIG2, SDRAM_CONFIG2);
+
+	/* find RAM size using SDRAM CS0 only */
+	sdram_start(0);
+	test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
+	sdram_start(1);
+	test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
+	if (test1 > test2) {
+		sdram_start(0);
+		dramsize = test1;
+	} else
+		dramsize = test2;
+
+	if (dramsize < (1 << 20))
+		dramsize = 0;
+
+	if (dramsize > 0)
+		out_be32((u32*)MPC5XXX_SDRAM_CS0CFG, 0x13 +
+			__builtin_ffs(dramsize >> 20) - 1);
+	else
+		out_be32((u32*)MPC5XXX_SDRAM_CS0CFG, 0);
+
+	return dramsize;
+}
+
+void mvbc_init_gpio(void)
+{
+	struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
+
+	printf("Ports : 0x%08x\n", gpio->port_config);
+	printf("PORCFG: 0x%08x\n", *(vu_long*)MPC5XXX_CDM_PORCFG);
+
+	out_be32(&gpio->simple_ddr, SIMPLE_DDR);
+	out_be32(&gpio->simple_dvo, SIMPLE_DVO);
+	out_be32(&gpio->simple_ode, SIMPLE_ODE);
+	out_be32(&gpio->simple_gpioe, SIMPLE_GPIOEN);
+
+	out_be32((u32*)&gpio->sint_ode, SINT_ODE);
+	out_be32((u32*)&gpio->sint_ddr, SINT_DDR);
+	out_be32((u32*)&gpio->sint_dvo, SINT_DVO);
+	out_be32((u32*)&gpio->sint_inten, SINT_INTEN);
+	out_be32((u32*)&gpio->sint_itype, SINT_ITYPE);
+	out_be32((u32*)&gpio->sint_gpioe, SINT_GPIOEN);
+
+	out_8((u8*)MPC5XXX_WU_GPIO_ODE, WKUP_ODE);
+	out_8((u8*)MPC5XXX_WU_GPIO_DIR, WKUP_DIR);
+	out_8((u8*)MPC5XXX_WU_GPIO_DATA_O, WKUP_DO);
+	out_8((u8*)MPC5XXX_WU_GPIO_ENABLE, WKUP_EN);
+
+	printf("simple_gpioe: 0x%08x\n", gpio->simple_gpioe);
+	printf("sint_gpioe  : 0x%08x\n", gpio->sint_gpioe);
+}
+
+void reset_environment(void)
+{
+	char *s, sernr[64];
+
+	printf("\n*** RESET ENVIRONMENT ***\n");
+	memset(sernr, 0, sizeof(sernr));
+	s = getenv("serial#");
+	if (s) {
+		printf("found serial# : %s\n", s);
+		strncpy(sernr, s, 64);
+	}
+	gd->env_valid = 0;
+	env_relocate();
+	if (s)
+		setenv("serial#", sernr);
+}
+
+int misc_init_r(void)
+{
+	char *s = getenv("reset_env");
+
+	if (!s) {
+		if (in_8((u8*)MPC5XXX_WU_GPIO_DATA_I) & MPC5XXX_GPIO_WKUP_6)
+			return 0;
+		udelay(50000);
+		if (in_8((u8*)MPC5XXX_WU_GPIO_DATA_I) & MPC5XXX_GPIO_WKUP_6)
+			return 0;
+		udelay(50000);
+		if (in_8((u8*)MPC5XXX_WU_GPIO_DATA_I) & MPC5XXX_GPIO_WKUP_6)
+			return 0;
+	}
+	printf(" === FACTORY RESET ===\n");
+	reset_environment();
+	saveenv();
+
+	return -1;
+}
+
+int checkboard(void)
+{
+	mvbc_init_gpio();
+	printf("Board: Matrix Vision mvBlueCOUGAR-P\n");
+
+	return 0;
+}
+
+void flash_preinit(void)
+{
+	/*
+	 * Now, when we are in RAM, enable flash write
+	 * access for detection process.
+	 * Note that CS_BOOT cannot be cleared when
+	 * executing in flash.
+	 */
+	clrbits_be32((u32*)MPC5XXX_BOOTCS_CFG, 0x1);
+}
+
+void flash_afterinit(ulong size)
+{
+	out_be32((u32*)MPC5XXX_BOOTCS_START, START_REG(CFG_BOOTCS_START |
+		size));
+	out_be32((u32*)MPC5XXX_CS0_START, START_REG(CFG_BOOTCS_START |
+		size));
+	out_be32((u32*)MPC5XXX_BOOTCS_STOP, STOP_REG(CFG_BOOTCS_START | size,
+		size));
+	out_be32((u32*)MPC5XXX_CS0_STOP, STOP_REG(CFG_BOOTCS_START | size,
+		size));
+}
+
+void pci_mvbc_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
+{
+	unsigned char line = 0xff;
+	u32 base;
+
+	if (PCI_BUS(dev) == 0) {
+		switch (PCI_DEV (dev)) {
+		case 0xa: /* FPGA */
+			line = 3;
+			pci_hose_read_config_dword(hose, dev, PCI_BASE_ADDRESS_0, &base);
+			printf("found FPA - enable arbitration\n");
+			writel(0x03, (u32*)(base + 0x80c0));
+			writel(0xf0, (u32*)(base + 0x8080));
+			break;
+		case 0xb: /* LAN */
+			line = 2;
+			break;
+		case 0x1a:
+			break;
+		default:
+			printf ("***pci_scan: illegal dev = 0x%08x\n", PCI_DEV (dev));
+			break;
+		}
+		pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, line);
+	}
+}
+
+struct pci_controller hose = {
+	fixup_irq:pci_mvbc_fixup_irq
+};
+
+int mvbc_p_load_fpga(void)
+{
+	size_t data_size = 0;
+	void *fpga_data = NULL;
+	char *datastr = getenv("fpgadata");
+	char *sizestr = getenv("fpgadatasize");
+
+	if (datastr)
+		fpga_data = (void *)simple_strtoul(datastr, NULL, 16);
+	if (sizestr)
+		data_size = (size_t)simple_strtoul(sizestr, NULL, 16);
+
+	return fpga_load(0, fpga_data, data_size);
+}
+
+extern void pci_mpc5xxx_init(struct pci_controller *);
+
+void pci_init_board(void)
+{
+	char *s;
+	int load_fpga = 1;
+
+	mvbc_p_init_fpga();
+	s = getenv("skip_fpga");
+	if (s) {
+		printf("found 'skip_fpga' -> FPGA _not_ loaded !\n");
+		load_fpga = 0;
+	}
+	if (load_fpga) {
+		printf("loading FPGA ... ");
+		mvbc_p_load_fpga();
+		printf("done\n");
+	}
+	pci_mpc5xxx_init(&hose);
+}
+
+u8 *dhcp_vendorex_prep(u8 *e)
+{
+	char *ptr;
+
+	/* DHCP vendor-class-identifier = 60 */
+	if ((ptr = getenv("dhcp_vendor-class-identifier"))) {
+		*e++ = 60;
+		*e++ = strlen(ptr);
+		while (*ptr)
+			*e++ = *ptr++;
+	}
+	/* DHCP_CLIENT_IDENTIFIER = 61 */
+	if ((ptr = getenv("dhcp_client_id"))) {
+		*e++ = 61;
+		*e++ = strlen(ptr);
+		while (*ptr)
+			*e++ = *ptr++;
+	}
+
+	return e;
+}
+
+u8 *dhcp_vendorex_proc (u8 *popt)
+{
+	return NULL;
+}
+
+void show_boot_progress(int val)
+{
+	struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
+
+	switch(val) {
+	case 0: /* FPGA ok */
+		setbits_be32(&gpio->simple_dvo, 0x80);
+		break;
+	case 1:
+		setbits_be32(&gpio->simple_dvo, 0x40);
+		break;
+	case 12:
+		setbits_be32(&gpio->simple_dvo, 0x20);
+		break;
+	case 15:
+		setbits_be32(&gpio->simple_dvo, 0x10);
+		break;
+	default:
+		break;
+	}
+
+}
+
+void ft_board_setup(void *blob, bd_t *bd)
+{
+	ft_cpu_setup(blob, bd);
+	fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
+}

board/matrix_vision/mvbc_p/mvbc_p.h

@@ -0,0 +1,43 @@
+#ifndef __MVBC_H__
+#define __MVBC_H__
+
+#define LED_G0          MPC5XXX_GPIO_SIMPLE_PSC2_0
+#define LED_G1          MPC5XXX_GPIO_SIMPLE_PSC2_1
+#define LED_Y           MPC5XXX_GPIO_SIMPLE_PSC2_2
+#define LED_R           MPC5XXX_GPIO_SIMPLE_PSC2_3
+#define ARB_X_EN        MPC5XXX_GPIO_WKUP_PSC2_4
+
+#define FPGA_DIN        MPC5XXX_GPIO_SIMPLE_PSC3_0
+#define FPGA_CCLK       MPC5XXX_GPIO_SIMPLE_PSC3_1
+#define FPGA_CONF_DONE  MPC5XXX_GPIO_SIMPLE_PSC3_2
+#define FPGA_CONFIG     MPC5XXX_GPIO_SIMPLE_PSC3_3
+#define FPGA_STATUS     MPC5XXX_GPIO_SINT_PSC3_4
+
+#define MAN_RST         MPC5XXX_GPIO_WKUP_PSC6_0
+#define WD_TS           MPC5XXX_GPIO_WKUP_PSC6_1
+#define WD_WDI          MPC5XXX_GPIO_SIMPLE_PSC6_2
+#define COP_PRESENT     MPC5XXX_GPIO_SIMPLE_PSC6_3
+#define FACT_RST        MPC5XXX_GPIO_WKUP_6
+#define FLASH_RBY       MPC5XXX_GPIO_WKUP_7
+
+#define SIMPLE_DDR      (LED_G0 | LED_G1 | LED_Y | LED_R | \
+			 FPGA_DIN | FPGA_CCLK | FPGA_CONFIG | WD_WDI)
+#define SIMPLE_DVO      (FPGA_CONFIG)
+#define SIMPLE_ODE      (FPGA_CONFIG)
+#define SIMPLE_GPIOEN   (LED_G0 | LED_G1 | LED_Y | LED_R | \
+			 FPGA_DIN | FPGA_CCLK | FPGA_CONF_DONE | FPGA_CONFIG |\
+			 WD_WDI | COP_PRESENT)
+
+#define SINT_ODE        0
+#define SINT_DDR        0
+#define SINT_DVO        0
+#define SINT_INTEN      0
+#define SINT_ITYPE      0
+#define SINT_GPIOEN     (FPGA_STATUS)
+
+#define WKUP_ODE        (MAN_RST)
+#define WKUP_DIR        (ARB_X_EN|MAN_RST|WD_TS)
+#define WKUP_DO         (ARB_X_EN|MAN_RST|WD_TS)
+#define WKUP_EN         (ARB_X_EN|MAN_RST|WD_TS|FACT_RST|FLASH_RBY)
+
+#endif

board/matrix_vision/mvbc_p/mvbc_p_autoscript

@@ -0,0 +1,44 @@
+echo
+echo "==== running autoscript ===="
+echo
+setenv bootdtb bootm \${kernel_boot} \${mv_initrd_addr_ram} \${mv_dtb_addr_ram}
+setenv ramkernel setenv kernel_boot \${loadaddr}
+setenv flashkernel setenv kernel_boot \${mv_kernel_addr}
+setenv cpird cp \${mv_initrd_addr} \${mv_initrd_addr_ram} \${mv_initrd_length}
+setenv bootfromflash run flashkernel cpird ramparam addcons e1000para bootdtb
+setenv getdtb tftp \${mv_dtb_addr_ram} \${dtb_name}
+setenv cpdtb cp \${mv_dtb_addr} \${mv_dtb_addr_ram} 0x2000
+setenv rundtb fdt addr \${mv_dtb_addr_ram}\;fdt boardsetup
+setenv bootfromnet tftp \${mv_initrd_addr_ram} \${initrd_name}\;run ramkernel
+if test ${console} = yes;
+then
+setenv addcons setenv bootargs \${bootargs} console=ttyPSC\${console_nr},\${baudrate}N8
+else
+setenv addcons setenv bootargs \${bootargs} console=tty0
+fi
+setenv e1000para setenv bootargs \${bootargs} e1000.TxDescriptors=1500 e1000.SmartPowerDownEnable=1
+setenv set_static_ip setenv ipaddr \${static_ipaddr}
+setenv set_static_nm setenv netmask \${static_netmask}
+setenv set_static_gw setenv gatewayip \${static_gateway}
+setenv set_ip setenv ip \${ipaddr}::\${gatewayip}:\${netmask}
+setenv ramparam setenv bootargs root=/dev/ram0 ro rootfstype=squashfs
+if test ${autoscr_boot} != no;
+then
+  if test ${netboot} = yes;
+  then
+    bootp
+    if test $? = 0;
+    then
+      echo "=== bootp succeeded -> netboot ==="
+      run set_ip
+      run getdtb rundtb bootfromnet ramparam addcons e1000para bootdtb
+    else
+      echo "=== netboot failed ==="
+    fi
+  fi
+  run set_static_ip set_static_nm set_static_gw set_ip
+  echo "=== bootfromflash ==="
+  run cpdtb rundtb bootfromflash
+else
+  echo "=== boot stopped with autoscr_boot no ==="
+fi

board/mcc200/auto_update.c

@@ -491,7 +491,7 @@ int do_auto_update(void)
 			aufile[i], sz, image_get_header_size ());
 
 		if (sz != ausize[i]) {
-			printf ("%s: size %d read %d?\n", aufile[i], ausize[i], sz);
+			printf ("%s: size %ld read %ld?\n", aufile[i], ausize[i], sz);
 			continue;
 		}
 

board/ml2/flash.c

@@ -222,7 +222,7 @@ static int write_word (flash_info_t *info, ulong dest, unsigned long long data)
 	unsigned long long result;
 	int rc = ERR_OK;
 
-	result=*addr;
+	result = *addr;
 	if ((result & data) != data)
 		return ERR_NOT_ERASED;
 
@@ -234,7 +234,7 @@ static int write_word (flash_info_t *info, ulong dest, unsigned long long data)
 	eieio();
 
 	do {
-		result=*addr;
+		result = *addr;
 	} while(~result & BIT_BUSY);
 
 	*addr=CMD_READ_ARRAY;
@@ -275,7 +275,7 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) {
 	}
 
 	while(cnt>=8) {
-		data=*((unsigned long long *)src);
+		data = *((unsigned long long *)src);
 		if ((rc = write_word(info, wp, data)) != 0)
 			return rc;
 		src+=8;

board/mp2usb/flash.c

@@ -426,7 +426,7 @@ static int write_data (flash_info_t *info, ulong dest, FPW data)
 
 	/* Check if Flash is (sufficiently) erased */
 	if ((*addr & data) != data) {
-		printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
+		printf ("not erased at %08lx (%lx)\n", (ulong) addr, (ulong) *addr);
 		return (2);
 	}
 	/*

board/mpc8540eval/flash.c

@@ -591,7 +591,7 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
 		cnt -= FLASH_BLOCK_SIZE;
 		if (((count-cnt)>>10)>temp) {
 			temp=(count-cnt)>>10;
-			printf("\r%d KB",temp);
+			printf("\r%lu KB",temp);
 		}
 	}
 	printf("\n");
@@ -699,7 +699,8 @@ static int write_block(flash_info_t *info, uchar * src, ulong dest, ulong cnt)
 			}
 		}
 		if (csr & 0x4040) {
-			printf ("CSR indicates write error (%04x) at %08lx\n", csr, (ulong)addr);
+			printf ("CSR indicates write error (%04lx) at %08lx\n",
+				csr, (ulong)addr);
 			flag = 1;
 		}
 		/* Clear Status Registers Command */
@@ -756,7 +757,8 @@ static int write_short (flash_info_t *info, ulong dest, ushort data)
 			}
 		}
 		if (csr & 0x4040) {
-			printf ("CSR indicates write error (%04x) at %08lx\n", csr, (ulong)addr);
+			printf ("CSR indicates write error (%04lx) at %08lx\n",
+				csr, (ulong)addr);
 			flag = 1;
 		}
 		/* Clear Status Registers Command */

board/mpl/common/common_util.c

@@ -357,8 +357,8 @@ void copy_old_env(ulong size)
 	unsigned off;
 	uchar *name, *value;
 
-	name=&name_buf[0];
-	value=&value_buf[0];
+	name = &name_buf[0];
+	value = &value_buf[0];
 	len=size;
 	off = sizeof(long);
 	while (len > off) {
@@ -377,8 +377,8 @@ void copy_old_env(ulong size)
 				if(c == '\0')
 					break;
 			} while(len > off);
-			name=&name_buf[0];
-			value=&value_buf[0];
+			name = &name_buf[0];
+			value = &value_buf[0];
 			if(strncmp((char *)name,"baudrate",8)!=0) {
 				setenv((char *)name,(char *)value);
 			}
@@ -636,12 +636,12 @@ void video_get_info_str (int line_number, char *info)
 					++s;
 					break;
 				}
-				buf[i++]=*s;
+				buf[i++] = *s;
 			}
 			sprintf(&buf[i]," SN ");
 			i+=4;
 			for (; s < e; ++s) {
-				buf[i++]=*s;
+				buf[i++] = *s;
 			}
 			buf[i++]=0;
 		}

board/mpl/common/flash.c

@@ -160,7 +160,7 @@ unsigned long flash_init (void)
 	unsigned long size_b1,flashcr,size_reg;
 	int mode;
 	extern char version_string;
-	char *p=&version_string;
+	char *p = &version_string;
 
 	/* Since we are relocated, we can set-up the CS finally */
 	setup_cs_reloc();

board/mpl/common/kbd.c

@@ -475,7 +475,7 @@ int kbd_read_data(void)
 	int val;
 	unsigned char status;
 
-	val=-1;
+	val = -1;
 	status = kbd_read_status();
 	if (status & KBD_STAT_OBF) {
 		val = kbd_read_input();

board/mpl/common/usb_uhci.c

@@ -536,7 +536,7 @@ void usb_check_int_chain(void)
 	uhci_td_t *td,*prevtd;
 
 	for(i=0;i<8;i++) {
-		prevtd=&td_int[i]; /* the first previous td is the skeleton td */
+		prevtd = &td_int[i]; /* the first previous td is the skeleton td */
 		link=swap_32(td_int[i].link) & 0xfffffff0; /* next in chain */
 		td=(uhci_td_t *)link; /* assign it */
 		/* all interrupt TDs are finally linked to the td_int[0].
@@ -638,7 +638,7 @@ int usb_lowlevel_stop(void)
 		return 1;
 	irq_free_handler(irqvec);
 	reset_hc();
-	irqvec=-1;
+	irqvec = -1;
 	return 0;
 }
 

board/netstal/common/nm_bsp.c

@@ -75,8 +75,8 @@ void set_params_for_sw_install(int install_requested, char *board_name )
 		setenv("install", string);
 		sprintf(string, "setenv bootargs emac(0,0)c:%s/%s_sw_inst "
 			"e=${ipaddr} h=${serverip} f=0x1000; "
-			"bootvx ${loadaddr}\0",
-			board_name, board_name);
+			"bootvx ${loadaddr}%c",
+			board_name, board_name, 0);
 		setenv("boot_sw_inst", string);
 	}
 }
@@ -108,10 +108,12 @@ void common_misc_init_r(void)
 		gd->bd->bi_enetaddr[3] = (serial >> 16) & 0xff;
 		gd->bd->bi_enetaddr[4] = (serial >>  8) & 0xff;
 		gd->bd->bi_enetaddr[5] = hcu_get_slot();
-		sprintf(ethaddr, "%02X:%02X:%02X:%02X:%02X:%02X\0",
+		sprintf(ethaddr, "%02X:%02X:%02X:%02X:%02X:%02X%c",
 			gd->bd->bi_enetaddr[0], gd->bd->bi_enetaddr[1],
 			gd->bd->bi_enetaddr[2], gd->bd->bi_enetaddr[3],
-			gd->bd->bi_enetaddr[4], gd->bd->bi_enetaddr[5]) ;
+			gd->bd->bi_enetaddr[4],
+			gd->bd->bi_enetaddr[5],
+			0) ;
 		printf("%s: Setting eth %s serial 0x%x\n",  __FUNCTION__,
 		       ethaddr, serial);
 		setenv(DEFAULT_ETH_ADDR, ethaddr);

board/netstal/hcu5/sdram.c

@@ -71,7 +71,7 @@ void board_add_ram_info(int use_default)
 	}
 
 	get_sys_info(&board_cfg);
-	printf(", %d MHz", (board_cfg.freqPLB * 2) / 1000000);
+	printf(", %lu MHz", (board_cfg.freqPLB * 2) / 1000000);
 
 	mfsdram(DDR0_03, val);
 	val = DDR0_03_CASLAT_DECODE(val);

board/o2dnt/flash.c

@@ -411,7 +411,7 @@ static int write_data (flash_info_t *info, FPWV *dest, FPW data)
 
 	/* Check if Flash is (sufficiently) erased */
 	if ((*addr & data) != data) {
-		printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
+		printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
 		return (2);
 	}
 	/* Disable interrupts which might cause a timeout here */

board/prodrive/alpr/alpr.c

@@ -287,24 +287,3 @@ int post_hotkeys_pressed(void)
 	return (ctrlc());
 }
 #endif
-
-#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-void ft_board_setup(void *blob, bd_t *bd)
-{
-	u32 val[4];
-	int rc;
-
-	ft_cpu_setup(blob, bd);
-
-	/* Fixup NOR mapping */
-	val[0] = 0;				/* chip select number */
-	val[1] = 0;				/* always 0 */
-	val[2] = gd->bd->bi_flashstart;
-	val[3] = gd->bd->bi_flashsize;
-	rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
-				  val, sizeof(val), 1);
-	if (rc)
-		printf("Unable to update property NOR mapping, err=%s\n",
-		       fdt_strerror(rc));
-}
-#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */

board/sandburst/metrobox/metrobox.c

@@ -270,7 +270,7 @@ int checkboard (void)
 	}
 
 	printf ("OptoFPGA ID:\t0x%02X\tRev:  0x%02X\n", opto_id, opto_rev);
-	printf ("Board Rev:\t0x%02X\tID:  %s\n", brd_rev, board_id_as[brd_id]);
+	printf ("Board Rev:\t0x%02X\tID:  %s\n", brd_rev, board_id_as[brd_id].name);
 
 	/* Fix the ack in the bme 32 */
 	udelay(5000);

board/sbc8560/sbc8560.c

@@ -33,6 +33,8 @@
 #include <ioports.h>
 #include <spd_sdram.h>
 #include <miiphy.h>
+#include <libfdt.h>
+#include <fdt_support.h>
 
 long int fixed_sdram (void);
 
@@ -421,7 +423,11 @@ long int fixed_sdram (void)
   #ifndef CFG_RAMBOOT
 	volatile ccsr_ddr_t *ddr= (void *)(CFG_MPC85xx_DDR_ADDR);
 
+#if (CFG_SDRAM_SIZE == 512)
+	ddr->cs0_bnds		= 0x0000000f;
+#else
 	ddr->cs0_bnds		= 0x00000007;
+#endif
 	ddr->cs1_bnds		= 0x0010001f;
 	ddr->cs2_bnds		= 0x00000000;
 	ddr->cs3_bnds		= 0x00000000;
@@ -452,3 +458,29 @@ long int fixed_sdram (void)
 	return CFG_SDRAM_SIZE * 1024 * 1024;
 }
 #endif	/* !defined(CONFIG_SPD_EEPROM) */
+
+
+#if defined(CONFIG_OF_BOARD_SETUP)
+void
+ft_board_setup(void *blob, bd_t *bd)
+{
+	int node, tmp[2];
+#ifdef CONFIG_PCI
+	const char *path;
+#endif
+
+	ft_cpu_setup(blob, bd);
+
+	node = fdt_path_offset(blob, "/aliases");
+	tmp[0] = 0;
+	if (node >= 0) {
+#ifdef CONFIG_PCI
+		path = fdt_getprop(blob, node, "pci0", NULL);
+		if (path) {
+			tmp[1] = hose.last_busno - hose.first_busno;
+			do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
+		}
+#endif
+	}
+}
+#endif

board/snmc/qs850/qs850.c

@@ -86,6 +86,13 @@ const uint sdram_table[] =
  *
  * Always return 1
  */
+#if defined(CONFIG_QS850)
+#define BOARD_IDENTITY	"QS850"
+#elif defined(CONFIG_QS823)
+#define BOARD_IDENTITY	"QS823"
+#else
+#define	BOARD_IDENTITY	"QS???"
+#endif
 
 int checkboard (void)
 {
@@ -96,14 +103,8 @@ int checkboard (void)
 	i = getenv_r("serial#", buf, sizeof(buf));
 	s = (i>0) ? buf : NULL;
 
-#ifdef CONFIG_QS850
-	if (!s || strncmp(s, "QS850", 5)) {
-		puts ("### No HW ID - assuming QS850");
-#endif
-#ifdef CONFIG_QS823
-	if (!s || strncmp(s, "QS823", 5)) {
-		puts ("### No HW ID - assuming QS823");
-#endif
+	if (!s || strncmp(s, BOARD_IDENTITY, 5)) {
+		puts ("### No HW ID - assuming " BOARD_IDENTITY);
 	} else {
 		for (e=s; *e; ++e) {
 		if (*e == ' ')

board/spc1920/hpi.c

@@ -234,7 +234,8 @@ static int hpi_write_inc(u32 addr, u32 *data, u32 count)
 	HPI_HPIA_1 = addr1;
 	HPI_HPIA_2 = addr2;
 
-	debugX(4, "writing from data=0x%x to 0x%x\n", data, (data+count));
+	debugX(4, "writing from data=0x%lx to 0x%lx\n",
+		(ulong)data, (ulong)(data+count));
 
 	for(i=0; i<count; i++) {
 		HPI_HPID_INC_1 = (u16) ((data[i] >> 16) & 0xffff);

board/total5200/total5200.c

@@ -67,14 +67,14 @@ int checkboard (void)
 	puts ("Board: Total5100 ");
 #endif
 
-/*
- * Retrieve FPGA Revision.
- */
-printf ("(FPGA %08X)\n", *(vu_long *) (CFG_FPGA_BASE + 0x400));
+	/*
+	 * Retrieve FPGA Revision.
+	 */
+	printf ("(FPGA %08lX)\n", *(vu_long *) (CFG_FPGA_BASE + 0x400));
 
-/*
- * Take all peripherals in power-up mode.
- */
+	/*
+	 * Take all peripherals in power-up mode.
+	 */
 #if CONFIG_TOTAL5200_REV==2
 	*(vu_char *) (CFG_CPLD_BASE + 0x46) = 0x70;
 #else

board/tqc/tqm5200/cmd_stk52xx.c

@@ -192,10 +192,10 @@ static int i2s_play_wave(unsigned long addr, unsigned long len)
 	psc->command = (PSC_RX_ENABLE | PSC_TX_ENABLE);
 
 	for(i = 0;i < (len / 4); i++) {
-		swapped[3]=*wave_file++;
-		swapped[2]=*wave_file++;
-		swapped[1]=*wave_file++;
-		swapped[0]=*wave_file++;
+		swapped[3] = *wave_file++;
+		swapped[2] = *wave_file++;
+		swapped[1] = *wave_file++;
+		swapped[0] = *wave_file++;
 		psc->psc_buffer_32 =  *((unsigned long*)swapped);
 		while (psc->tfnum > 400) {
 			if(ctrlc())
@@ -478,7 +478,7 @@ static int cmd_wav(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	}
 	set_attenuation(volume);
 
-	printf("Play wave file at %#p with length %#x\n", addr, length);
+	printf("Play wave file at %lX with length %lX\n", addr, length);
 	rcode = i2s_play_wave(addr, length);
 
 	return rcode;

board/tqc/tqm8272/tqm8272.c

@@ -652,7 +652,7 @@ static int dump_hwib(void)
 		printf ("ethaddr: %s\n", hw->ethaddr);
 		printf ("FLASH	: %x nr:%d\n", hw->flash, hw->flash_nr);
 		printf ("RAM	: %x cs:%d\n", hw->ram, hw->ram_cs);
-		printf ("CPU	: %d\n", hw->cpunr);
+		printf ("CPU	: %lu\n", hw->cpunr);
 		printf ("CAN	: %d\n", hw->can);
 		if (hw->eeprom) printf ("EEprom : %x\n", hw->eeprom);
 		else printf ("No EEprom\n");
@@ -663,7 +663,7 @@ static int dump_hwib(void)
 		printf ("Bus %s mode.\n", (hw->Bus ? "60x" : "Single PQII"));
 		printf ("  real : %s\n", (immr->im_siu_conf.sc_bcr & BCR_EBM ? \
 				 "60x" : "Single PQII"));
-		printf ("Option : %x\n", hw->option);
+		printf ("Option : %lx\n", hw->option);
 		printf ("%s Security Engine\n", (hw->SecEng ? "with" : "no"));
 		printf ("CPM Clk: %d\n", hw->cpmcl);
 		printf ("CPU Clk: %d\n", hw->cpucl);

board/tqc/tqm85xx/tqm85xx.c

@@ -464,7 +464,8 @@ void local_bus_init (void)
 
 	if (lbc_mhz < 66) {
 		lbc->lcrr = CFG_LBC_LCRR | LCRR_DBYP;	/* DLL Bypass */
-		lbc->ltedr = 0xa4c80000;	/* DK: !!! */
+		lbc->ltedr = LTEDR_BMD | LTEDR_PARD | LTEDR_WPD | LTERD_WARA |
+			     LTEDR_RAWA | LTEDR_CSD;	/* Disable all error checking */
 
 	} else if (lbc_mhz >= 133) {
 		lbc->lcrr = CFG_LBC_LCRR & (~LCRR_DBYP);	/* DLL Enabled */

board/versatile/flash.c

@@ -476,7 +476,7 @@ static int write_data (flash_info_t * info, ulong dest, FPW data)
 
 	/* Check if Flash is (sufficiently) erased */
 	if ((*addr & data) != data) {
-		printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
+		printf ("not erased at %08lx (%lx)\n", (ulong) addr, (ulong) *addr);
 		return (2);
 	}
 

board/zylonite/nand.c

@@ -254,7 +254,7 @@ static unsigned long dfc_wait_event(unsigned long event)
 			break;
 		}
 		if(get_delta(start) > timeout) {
-			DFC_DEBUG1("dfc_wait_event: TIMEOUT waiting for event: 0x%x.\n", event);
+			DFC_DEBUG1("dfc_wait_event: TIMEOUT waiting for event: 0x%lx.\n", event);
 			return 0xff000000;
 		}
 

common/cmd_bdinfo.c

@@ -205,7 +205,7 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	puts ("\nip_addr     = ");
 	print_IPaddr (bd->bi_ip_addr);
 #endif
-	printf ("\nbaudrate    = %d bps\n", (ulong)bd->bi_baudrate);
+	printf ("\nbaudrate    = %ld bps\n", (ulong)bd->bi_baudrate);
 	return 0;
 }
 

common/cmd_bootm.c

@@ -36,6 +36,10 @@
 #include <lmb.h>
 #include <asm/byteorder.h>
 
+#if (CONFIG_COMMANDS & CFG_CMD_USB)
+#include <usb.h>
+#endif
+
 #ifdef CFG_HUSH_PARSER
 #include <hush.h>
 #endif
@@ -213,6 +217,20 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	 */
 	iflag = disable_interrupts();
 
+#if (CONFIG_COMMANDS & CFG_CMD_USB)
+	/*
+	 * turn off USB to prevent the host controller from writing to the
+	 * SDRAM while Linux is booting. This could happen (at least for OHCI
+	 * controller), because the HCCA (Host Controller Communication Area)
+	 * lies within the SDRAM and the host controller writes continously to
+	 * this area (as busmaster!). The HccaFrameNumber is for example
+	 * updated every 1 ms within the HCCA structure in SDRAM! For more
+	 * details see the OpenHCI specification.
+	 */
+	usb_stop();
+#endif
+
+
 #ifdef CONFIG_AMIGAONEG3SE
 	/*
 	 * We've possible left the caches enabled during

common/cmd_fdc.c

@@ -512,7 +512,7 @@ int fdc_read_data(unsigned char *buffer, unsigned long blocks,FDC_COMMAND_STRUCT
 	if(readblk>blocks) /* is end within 1st track */
 		readblk=blocks; /* yes, correct it */
 	PRINTF("we read %ld blocks start %ld\n",readblk,pCMD->blnr);
-	bufferw=&buffer[0]; /* setup working buffer */
+	bufferw = &buffer[0]; /* setup working buffer */
 	do {
 retryrw:
 		len=sect_size * readblk;
@@ -566,7 +566,7 @@ retryrw:
 		 * we need to get the results */
 		fdc_terminate(pCMD);
 		offset+=(sect_size*readblk); /* set up buffer pointer */
-		bufferw=&buffer[offset];
+		bufferw = &buffer[offset];
 		pCMD->blnr+=readblk; /* update current block nr */
 		blocks-=readblk; /* update blocks */
 		if(blocks==0)

common/cmd_flash.c

@@ -210,7 +210,7 @@ flash_fill_sect_ranges (ulong addr_first, ulong addr_last,
 		s_last [bank] = -1;	/* last  sector to erase	*/
 	}
 
-	for (bank=0,info=&flash_info[0];
+	for (bank=0,info = &flash_info[0];
 	     (bank < CFG_MAX_FLASH_BANKS) && (addr_first <= addr_last);
 	     ++bank, ++info) {
 		ulong b_end;
@@ -360,7 +360,7 @@ int do_flerase (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 				addr_last = addr_first + part->size - 1;
 
 				printf ("Erase Flash Parition %s, "
-						"bank %d, 0x%08lx - 0x%08lx ",
+						"bank %ld, 0x%08lx - 0x%08lx ",
 						argv[1], bank, addr_first,
 						addr_last);
 
@@ -427,7 +427,7 @@ int flash_sect_erase (ulong addr_first, ulong addr_last)
 					s_first, s_last, &planned );
 
 	if (planned && (rcode == 0)) {
-		for (bank=0,info=&flash_info[0];
+		for (bank=0,info = &flash_info[0];
 		     (bank < CFG_MAX_FLASH_BANKS) && (rcode == 0);
 		     ++bank, ++info) {
 			if (s_first[bank]>=0) {
@@ -566,7 +566,7 @@ int do_protect (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 				addr_last = addr_first + part->size - 1;
 
 				printf ("%sProtect Flash Parition %s, "
-						"bank %d, 0x%08lx - 0x%08lx\n",
+						"bank %ld, 0x%08lx - 0x%08lx\n",
 						p ? "" : "Un", argv[1],
 						bank, addr_first, addr_last);
 
@@ -651,7 +651,7 @@ int flash_sect_protect (int p, ulong addr_first, ulong addr_last)
 	protected = 0;
 
 	if (planned && (rcode == 0)) {
-		for (bank=0,info=&flash_info[0]; bank < CFG_MAX_FLASH_BANKS; ++bank, ++info) {
+		for (bank=0,info = &flash_info[0]; bank < CFG_MAX_FLASH_BANKS; ++bank, ++info) {
 			if (info->flash_id == FLASH_UNKNOWN) {
 				continue;
 			}

common/cmd_fpga.c

@@ -85,7 +85,7 @@ int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size)
 	length = (*dataptr << 8) + *(dataptr+1);
 	dataptr+=2;
 	for(i=0;i<length;i++)
-		buffer[i]=*dataptr++;
+		buffer[i] = *dataptr++;
 
 	printf("  design filename = \"%s\"\n", buffer);
 
@@ -99,7 +99,7 @@ int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size)
 	length = (*dataptr << 8) + *(dataptr+1);
 	dataptr+=2;
 	for(i=0;i<length;i++)
-		buffer[i]=*dataptr++;
+		buffer[i] = *dataptr++;
 	printf("  part number = \"%s\"\n", buffer);
 
 	/* get date (identifier, length, string) */
@@ -112,7 +112,7 @@ int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size)
 	length = (*dataptr << 8) + *(dataptr+1);
 	dataptr+=2;
 	for(i=0;i<length;i++)
-		buffer[i]=*dataptr++;
+		buffer[i] = *dataptr++;
 	printf("  date = \"%s\"\n", buffer);
 
 	/* get time (identifier, length, string) */
@@ -124,7 +124,7 @@ int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size)
 	length = (*dataptr << 8) + *(dataptr+1);
 	dataptr+=2;
 	for(i=0;i<length;i++)
-		buffer[i]=*dataptr++;
+		buffer[i] = *dataptr++;
 	printf("  time = \"%s\"\n", buffer);
 
 	/* get fpga data length (identifier, length) */

common/cmd_ide.c

@@ -298,7 +298,7 @@ int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		ulong addr = simple_strtoul(argv[2], NULL, 16);
 		ulong cnt  = simple_strtoul(argv[4], NULL, 16);
 		ulong n;
-#ifdef CFG_64BIT_STRTOUL
+#ifdef CFG_64BIT_LBA
 		lbaint_t blk  = simple_strtoull(argv[3], NULL, 16);
 
 		printf ("\nIDE read: device %d block # %qd, count %ld ... ",
@@ -327,7 +327,7 @@ int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		ulong addr = simple_strtoul(argv[2], NULL, 16);
 		ulong cnt  = simple_strtoul(argv[4], NULL, 16);
 		ulong n;
-#ifdef CFG_64BIT_STRTOUL
+#ifdef CFG_64BIT_LBA
 		lbaint_t blk  = simple_strtoull(argv[3], NULL, 16);
 
 		printf ("\nIDE write: device %d block # %qd, count %ld ... ",

common/cmd_jffs2.c

@@ -241,13 +241,13 @@ static void memsize_format(char *buf, u32 size)
 #define SIZE_KB ((u32)1024)
 
 	if ((size % SIZE_GB) == 0)
-		sprintf(buf, "%lug", size/SIZE_GB);
+		sprintf(buf, "%ug", size/SIZE_GB);
 	else if ((size % SIZE_MB) == 0)
-		sprintf(buf, "%lum", size/SIZE_MB);
+		sprintf(buf, "%um", size/SIZE_MB);
 	else if (size % SIZE_KB == 0)
-		sprintf(buf, "%luk", size/SIZE_KB);
+		sprintf(buf, "%uk", size/SIZE_KB);
 	else
-		sprintf(buf, "%lu", size);
+		sprintf(buf, "%u", size);
 }
 
 /**
@@ -416,7 +416,7 @@ static int part_validate(struct mtdids *id, struct part_info *part)
 		part->size = id->size - part->offset;
 
 	if (part->offset > id->size) {
-		printf("%s: offset %08lx beyond flash size %08lx\n",
+		printf("%s: offset %08x beyond flash size %08x\n",
 				id->mtd_id, part->offset, id->size);
 		return 1;
 	}
@@ -1288,7 +1288,7 @@ static void list_partitions(void)
 	if (current_dev) {
 		part = jffs2_part_info(current_dev, current_partnum);
 		if (part) {
-			printf("\nactive partition: %s%d,%d - (%s) 0x%08lx @ 0x%08lx\n",
+			printf("\nactive partition: %s%d,%d - (%s) 0x%08x @ 0x%08x\n",
 					MTD_DEV_TYPE(current_dev->id->type),
 					current_dev->id->num, current_partnum,
 					part->name, part->size, part->offset);

common/cmd_mfsl.c

@@ -183,7 +183,7 @@ int do_frd (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 		return 1;
 	}
 
-	printf ("%01x: 0x%08lx - %s %s read\n", fslnum, num,
+	printf ("%01x: 0x%08x - %s %s read\n", fslnum, num,
 		blocking < 2  ? "non blocking" : "blocking",
 		((blocking == 1) || (blocking == 3)) ? "control" : "data" );
 	return 0;
@@ -341,7 +341,7 @@ int do_fwr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 		return 1;
 	}
 
-	printf ("%01x: 0x%08lx - %s %s write\n", fslnum, num,
+	printf ("%01x: 0x%08x - %s %s write\n", fslnum, num,
 		blocking < 2  ? "non blocking" : "blocking",
 		((blocking == 1) || (blocking == 3)) ? "control" : "data" );
 	return 0;
@@ -382,7 +382,7 @@ int do_rspr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 		puts ("Unsupported register\n");
 		return 1;
 	}
-	printf (": 0x%08lx\n", val);
+	printf (": 0x%08x\n", val);
 	return 0;
 }
 

common/cmd_mp.c

@@ -35,7 +35,7 @@ cpu_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 
 	cpuid = simple_strtoul(argv[1], NULL, 10);
 	if (cpuid >= CONFIG_NR_CPUS) {
-		printf ("Core num: %d is out of range[0..%d]\n",
+		printf ("Core num: %lu is out of range[0..%d]\n",
 				cpuid, CONFIG_NR_CPUS - 1);
 		return 1;
 	}

common/cmd_nand.c

@@ -886,9 +886,9 @@ int do_nand (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 				return 1;
 			}
 
-			printf ("\nNAND %s: device %d offset %ld, size %ld ...\n",
+			printf ("\nNAND %s: device %d offset %ld, size %lu ...\n",
 				(cmd & NANDRW_READ) ? "read" : "write",
-				curr_device, off, size);
+				curr_device, off, (ulong)size);
 
 			ret = nand_legacy_rw (nand_dev_desc + curr_device,
 					      cmd, off, size,

common/cmd_nvedit.c

@@ -99,7 +99,8 @@ int do_printenv (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 			}
 		}
 
-		printf("\nEnvironment size: %d/%d bytes\n", i, ENV_SIZE);
+		printf("\nEnvironment size: %d/%ld bytes\n",
+			i, (ulong)ENV_SIZE);
 
 		return 0;
 	}

common/cmd_onenand.c

@@ -70,14 +70,14 @@ int do_onenand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 			if (!end || end < 0)
 				end = start;
 
-			printf("Erase block from %d to %d\n", start, end);
+			printf("Erase block from %lu to %lu\n", start, end);
 
 			for (block = start; block <= end; block++) {
 				instr.addr = block << onenand_chip.erase_shift;
 				instr.len = 1 << onenand_chip.erase_shift;
 				ret = onenand_erase(&onenand_mtd, &instr);
 				if (ret) {
-					printf("erase failed %d\n", block);
+					printf("erase failed %lu\n", block);
 					break;
 				}
 			}

common/cmd_reginfo.c

@@ -282,54 +282,54 @@ int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	puts ("\nMPC5200 registers\n");
 	printf ("MBAR=%08x\n", CFG_MBAR);
 	puts ("Memory map registers\n");
-	printf ("\tCS0: start %08X\tstop %08X\tconfig %08X\ten %d\n",
+	printf ("\tCS0: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n",
 		*(volatile ulong*)MPC5XXX_CS0_START,
 		*(volatile ulong*)MPC5XXX_CS0_STOP,
 		*(volatile ulong*)MPC5XXX_CS0_CFG,
 		(*(volatile ulong*)MPC5XXX_ADDECR & 0x00010000) ? 1 : 0);
-	printf ("\tCS1: start %08X\tstop %08X\tconfig %08X\ten %d\n",
+	printf ("\tCS1: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n",
 		*(volatile ulong*)MPC5XXX_CS1_START,
 		*(volatile ulong*)MPC5XXX_CS1_STOP,
 		*(volatile ulong*)MPC5XXX_CS1_CFG,
 		(*(volatile ulong*)MPC5XXX_ADDECR & 0x00020000) ? 1 : 0);
-	printf ("\tCS2: start %08X\tstop %08X\tconfig %08X\ten %d\n",
+	printf ("\tCS2: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n",
 		*(volatile ulong*)MPC5XXX_CS2_START,
 		*(volatile ulong*)MPC5XXX_CS2_STOP,
 		*(volatile ulong*)MPC5XXX_CS2_CFG,
 		(*(volatile ulong*)MPC5XXX_ADDECR & 0x00040000) ? 1 : 0);
-	printf ("\tCS3: start %08X\tstop %08X\tconfig %08X\ten %d\n",
+	printf ("\tCS3: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n",
 		*(volatile ulong*)MPC5XXX_CS3_START,
 		*(volatile ulong*)MPC5XXX_CS3_STOP,
 		*(volatile ulong*)MPC5XXX_CS3_CFG,
 		(*(volatile ulong*)MPC5XXX_ADDECR & 0x00080000) ? 1 : 0);
-	printf ("\tCS4: start %08X\tstop %08X\tconfig %08X\ten %d\n",
+	printf ("\tCS4: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n",
 		*(volatile ulong*)MPC5XXX_CS4_START,
 		*(volatile ulong*)MPC5XXX_CS4_STOP,
 		*(volatile ulong*)MPC5XXX_CS4_CFG,
 		(*(volatile ulong*)MPC5XXX_ADDECR & 0x00100000) ? 1 : 0);
-	printf ("\tCS5: start %08X\tstop %08X\tconfig %08X\ten %d\n",
+	printf ("\tCS5: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n",
 		*(volatile ulong*)MPC5XXX_CS5_START,
 		*(volatile ulong*)MPC5XXX_CS5_STOP,
 		*(volatile ulong*)MPC5XXX_CS5_CFG,
 		(*(volatile ulong*)MPC5XXX_ADDECR & 0x00200000) ? 1 : 0);
-	printf ("\tCS6: start %08X\tstop %08X\tconfig %08X\ten %d\n",
+	printf ("\tCS6: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n",
 		*(volatile ulong*)MPC5XXX_CS6_START,
 		*(volatile ulong*)MPC5XXX_CS6_STOP,
 		*(volatile ulong*)MPC5XXX_CS6_CFG,
 		(*(volatile ulong*)MPC5XXX_ADDECR & 0x04000000) ? 1 : 0);
-	printf ("\tCS7: start %08X\tstop %08X\tconfig %08X\ten %d\n",
+	printf ("\tCS7: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n",
 		*(volatile ulong*)MPC5XXX_CS7_START,
 		*(volatile ulong*)MPC5XXX_CS7_STOP,
 		*(volatile ulong*)MPC5XXX_CS7_CFG,
 		(*(volatile ulong*)MPC5XXX_ADDECR & 0x08000000) ? 1 : 0);
-	printf ("\tBOOTCS: start %08X\tstop %08X\tconfig %08X\ten %d\n",
+	printf ("\tBOOTCS: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n",
 		*(volatile ulong*)MPC5XXX_BOOTCS_START,
 		*(volatile ulong*)MPC5XXX_BOOTCS_STOP,
 		*(volatile ulong*)MPC5XXX_BOOTCS_CFG,
 		(*(volatile ulong*)MPC5XXX_ADDECR & 0x02000000) ? 1 : 0);
-	printf ("\tSDRAMCS0: %08X\n",
+	printf ("\tSDRAMCS0: %08lX\n",
 		*(volatile ulong*)MPC5XXX_SDRAM_CS0CFG);
-	printf ("\tSDRAMCS1: %08X\n",
+	printf ("\tSDRAMCS1: %08lX\n",
 		*(volatile ulong*)MPC5XXX_SDRAM_CS1CFG);
 #elif defined(CONFIG_MPC86xx)
 	mpc86xx_reginfo();

common/cmd_scsi.c

@@ -171,7 +171,7 @@ removable:
 	if(scsi_max_devs>0)
 		scsi_curr_dev=0;
 	else
-		scsi_curr_dev=-1;
+		scsi_curr_dev = -1;
 }
 
 

common/cmd_usb.c

@@ -32,7 +32,7 @@
 #include <usb.h>
 
 #ifdef CONFIG_USB_STORAGE
-static int usb_stor_curr_dev=-1; /* current device */
+static int usb_stor_curr_dev = -1; /* current device */
 #endif
 
 /* some display routines (info command) */

common/devices.c

@@ -125,7 +125,7 @@ int device_deregister(char *devname)
 	device_t *dev = NULL;
 	char temp_names[3][8];
 
-	dev_index=-1;
+	dev_index = -1;
 	for (i=1; i<=ListNumItems(devlist); i++) {
 		dev = ListGetPtrToItem (devlist, i);
 		if(strcmp(dev->name,devname)==0) {

common/env_onenand.c

@@ -103,7 +103,7 @@ int saveenv(void)
 	instr.addr = env_addr;
 	instr.addr -= (unsigned long)onenand_chip.base;
 	if (onenand_erase(&onenand_mtd, &instr)) {
-		printf("OneNAND: erase failed at 0x%08x\n", env_addr);
+		printf("OneNAND: erase failed at 0x%08lx\n", env_addr);
 		return 1;
 	}