Merge branch 'master' of git://www.denx.de/git/u-boot

board/alaska/flash.c

@@ -670,7 +670,7 @@ static int write_data (flash_info_t * info, ulong dest, FPW data)
 
 	/* Check if Flash is (sufficiently) erased */
 	if ((*addr & data) != data) {
-		printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
+		printf ("not erased at %08lx (%lx)\n", (ulong)addr, (ulong)*addr);
 		return (2);
 	}
 	/* Disable interrupts which might cause a timeout here */
@@ -712,7 +712,7 @@ static int write_data_block (flash_info_t * info, ulong src, ulong dest)
 	for (i = 0; i < WR_BLOCK; i++)
 		if ((*dstaddr++ & 0xff) != 0xff) {
 			printf ("not erased at %08lx (%lx)\n",
-				(ulong) dstaddr, *dstaddr);
+				(ulong)dstaddr, (ulong)*dstaddr);
 			return (2);
 		}
 

board/amcc/katmai/cmd_katmai.c

@@ -176,7 +176,7 @@ static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 #endif
 	}
 #ifdef	DEBUG
-	printf(" pin strap0 to write in i2c  = %x\n", data);
+	printf(" pin strap0 to write in i2c  = %lx\n", data);
 #endif	/* DEBUG */
 
 	if (i2c_write(chip, 0, 1, (uchar *)&data, 4) != 0)
@@ -201,7 +201,7 @@ static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		data |= 0x05A50000;
 
 #ifdef	DEBUG
-	printf(" pin strap1 to write in i2c  = %x\n", data);
+	printf(" pin strap1 to write in i2c  = %lx\n", data);
 #endif	/* DEBUG */
 
 	udelay(1000);

board/barco/barco.c

@@ -177,7 +177,7 @@ unsigned update_flash (unsigned char *buf)
 		write_flash ((char *)buf, (*buf) & 0xFE);
 		*((unsigned char *)0xFF800000) = 0xF0;
 		udelay (100);
-		printf ("buf [%#010x] %#010x\n", buf, (*buf));
+		printf ("buf [%#010x] %#010x\n", (unsigned)buf, (*buf));
 		/* XXX - fall through??? */
 	case BOOT_WORKING :
 		return BOOT_WORKING;
@@ -273,10 +273,10 @@ void barcobcd_boot (void)
 	/* give length of the kernel image to bootm */
 	sprintf (bootm_args[0],"%x",start->size);
 	/* give address of the kernel image to bootm */
-	sprintf (bootm_args[1],"%x",buf);
+	sprintf (bootm_args[1],"%x",(unsigned)buf);
 
 	printf ("flash address: %#10x\n",start->address+8);
-	printf ("buf address: %#10x\n",buf);
+	printf ("buf address: %#10x\n",(unsigned)buf);
 
 	/* aha, we reserve 8 bytes here... */
 	for (cnt = 0; cnt < start->size ; cnt++) {

board/esd/du440/du440.c

@@ -956,9 +956,9 @@ int do_time(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	ret = run_command (cmd, 0);
 	end = get_ticks();
 
-	printf("ticks=%d\n", (ulong)(end - start));
+	printf("ticks=%ld\n", (ulong)(end - start));
 	us = (ulong)((1000L * (end - start)) / (get_tbclk() / 1000));
-	printf("usec=%d\n", us);
+	printf("usec=%ld\n", us);
 
 	return ret;
 }

board/korat/korat.c

@@ -26,12 +26,15 @@
  */
 
 #include <common.h>
+#include <fdt_support.h>
 #include <i2c.h>
+#include <libfdt.h>
 #include <ppc440.h>
+#include <asm/bitops.h>
 #include <asm/gpio.h>
-#include <asm/processor.h>
 #include <asm/io.h>
-#include <asm/bitops.h>
+#include <asm/ppc4xx-intvec.h>
+#include <asm/processor.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -566,43 +569,15 @@ int checkboard(void)
 	return 0;
 }
 
-#if defined(CFG_DRAM_TEST)
-int testdram(void)
+#if defined(CONFIG_PCI) && defined(CONFIG_PCI_PNP)
+/*
+ * Assign interrupts to PCI devices.
+ */
+void korat_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
 {
-	unsigned long *mem = (unsigned long *)0;
-	const unsigned long kend = (1024 / sizeof(unsigned long));
-	unsigned long k, n;
-
-	mtmsr(0);
-
-	/* TODO: find correct size of SDRAM */
-	for (k = 0; k < CFG_MBYTES_SDRAM;
-	     ++k, mem += (1024 / sizeof(unsigned long))) {
-		if ((k & 1023) == 0)
-			printf("%3d MB\r", k / 1024);
-
-		memset(mem, 0xaaaaaaaa, 1024);
-		for (n = 0; n < kend; ++n) {
-			if (mem[n] != 0xaaaaaaaa) {
-				printf("SDRAM test fails at: %08x\n",
-				       (uint) & mem[n]);
-				return 1;
-			}
-		}
-
-		memset(mem, 0x55555555, 1024);
-		for (n = 0; n < kend; ++n) {
-			if (mem[n] != 0x55555555) {
-				printf("SDRAM test fails at: %08x\n",
-				       (uint) & mem[n]);
-				return 1;
-			}
-		}
-	}
-	printf("SDRAM test passes\n");
-	return 0;
+	pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, VECNUM_EIR2);
 }
-#endif /* defined(CFG_DRAM_TEST) */
+#endif
 
 /*
  * pci_pre_init
@@ -654,6 +629,10 @@ int pci_pre_init(struct pci_controller *hose)
 	addr = (addr & ~plb1_acr_wrp_mask) | plb1_acr_wrp_2deep;
 	mtdcr(plb1_acr, addr);
 
+#if defined(CONFIG_PCI_PNP)
+	hose->fixup_irq = korat_pci_fixup_irq;
+#endif
+
 	return 1;
 }
 #endif /* defined(CONFIG_PCI) */
@@ -779,3 +758,24 @@ int post_hotkeys_pressed(void)
 	return 0;	/* No hotkeys supported */
 }
 #endif /* CONFIG_POST */
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+void ft_board_setup(void *blob, bd_t *bd)
+{
+	u32 val[4];
+	int rc;
+
+	ft_cpu_setup(blob, bd);
+
+	/* Fixup NOR mapping */
+	val[0] = 1;				/* chip select number */
+	val[1] = 0;				/* always 0 */
+	val[2] = gd->bd->bi_flashstart;
+	val[3] = gd->bd->bi_flashsize - CFG_FLASH0_SIZE;
+	rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
+				  val, sizeof(val), 1);
+	if (rc)
+		printf("Unable to update property NOR mapping, err=%s\n",
+		       fdt_strerror(rc));
+}
+#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */

board/lwmon5/sdram.c

@@ -84,7 +84,7 @@ void board_add_ram_info(int use_default)
 		puts(" (ECC not");
 
 	get_sys_info(&board_cfg);
-	printf(" enabled, %d MHz", (board_cfg.freqPLB * 2) / 1000000);
+	printf(" enabled, %ld MHz", (board_cfg.freqPLB * 2) / 1000000);
 
 	mfsdram(DDR0_03, val);
 	val = DDR0_03_CASLAT_DECODE(val);

board/zeus/zeus.c

@@ -280,7 +280,7 @@ static int restore_default(void)
 	} else {
 		crc = crc32(0, (u8 *)(buf + 4), FACTORY_RESET_ENV_SIZE - 4);
 		if (crc != *(u32 *)buf) {
-			printf("ERROR: crc mismatch %08lx %08lx\n", crc, *(u32 *)buf);
+			printf("ERROR: crc mismatch %08x %08x\n", crc, *(u32 *)buf);
 			return -1;
 		}
 

common/cmd_bootm.c

@@ -613,7 +613,7 @@ static void *boot_get_kernel (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]
 		return NULL;
 	}
 
-	debug ("   kernel data at 0x%08lx, len = 0x%08lx (%d)\n",
+	debug ("   kernel data at 0x%08lx, len = 0x%08lx (%ld)\n",
 			*os_data, *os_len, *os_len);
 
 	return (void *)img_addr;

common/cmd_nand.c

@@ -55,11 +55,11 @@ static int nand_dump(nand_info_t *nand, ulong off)
 	off &= ~(nand->oobblock - 1);
 	i = nand_read_raw(nand, buf, off, nand->oobblock, nand->oobsize);
 	if (i < 0) {
-		printf("Error (%d) reading page %08x\n", i, off);
+		printf("Error (%d) reading page %08lx\n", i, off);
 		free(buf);
 		return 1;
 	}
-	printf("Page %08x dump:\n", off);
+	printf("Page %08lx dump:\n", off);
 	i = nand->oobblock >> 4; p = buf;
 	while (i--) {
 		printf( "\t%02x %02x %02x %02x %02x %02x %02x %02x"
@@ -149,7 +149,7 @@ out:
 	if (*size == nand->size)
 		puts("whole chip\n");
 	else
-		printf("offset 0x%x, size 0x%x\n", *off, *size);
+		printf("offset 0x%lx, size 0x%x\n", *off, *size);
 	return 0;
 }
 
@@ -181,7 +181,7 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 		putc('\n');
 		for (i = 0; i < CFG_MAX_NAND_DEVICE; i++) {
 			if (nand_info[i].name)
-				printf("Device %d: %s, sector size %lu KiB\n",
+				printf("Device %d: %s, sector size %u KiB\n",
 					i, nand_info[i].name,
 					nand_info[i].erasesize >> 10);
 		}
@@ -238,7 +238,7 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 		printf("\nDevice %d bad blocks:\n", nand_curr_device);
 		for (off = 0; off < nand->size; off += nand->erasesize)
 			if (nand_block_isbad(nand, off))
-				printf("  %08x\n", off);
+				printf("  %08lx\n", off);
 		return 0;
 	}
 
@@ -417,7 +417,7 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 				if (off == nand->size - nand->oobblock
 				    || (s != last_status && off != 0))	{
 
-					printf("%08x - %08x: %8d pages %s%s%s\n",
+					printf("%08lx - %08lx: %8lu pages %s%s%s\n",
 					       block_start,
 					       off-1,
 					       (off-block_start)/nand->oobblock,

common/cmd_usb.c

@@ -554,13 +554,24 @@ int do_usb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	}
 
 	if (strncmp(argv[1],"part",4) == 0) {
-		int devno, ok;
-		for (ok=0, devno=0; devno<USB_MAX_STOR_DEV; ++devno) {
+		int devno, ok = 0;
+		if (argc==2) {
+			for (devno=0; devno<USB_MAX_STOR_DEV; ++devno) {
+				stor_dev=usb_stor_get_dev(devno);
+				if (stor_dev->type!=DEV_TYPE_UNKNOWN) {
+					ok++;
+					if (devno)
+						printf("\n");
+					printf("print_part of %x\n",devno);
+					print_part(stor_dev);
+				}
+			}
+		}
+		else {
+			devno=simple_strtoul(argv[2], NULL, 16);
 			stor_dev=usb_stor_get_dev(devno);
 			if (stor_dev->type!=DEV_TYPE_UNKNOWN) {
 				ok++;
-				if (devno)
-					printf("\n");
 				printf("print_part of %x\n",devno);
 				print_part(stor_dev);
 			}

cpu/ppc4xx/44x_spd_ddr2.c

@@ -137,6 +137,20 @@
 #define MY_TLB_WORD2_I_ENABLE	TLB_WORD2_I_ENABLE	/* disable caching on SDRAM */
 #endif
 
+/*
+ * Newer PPC's like 440SPe, 460EX/GT can be equipped with more than 2GB of SDRAM.
+ * To support such configurations, we "only" map the first 2GB via the TLB's. We
+ * need some free virtual address space for the remaining peripherals like, SoC
+ * devices, FLASH etc.
+ *
+ * Note that ECC is currently not supported on configurations with more than 2GB
+ * SDRAM. This is because we only map the first 2GB on such systems, and therefore
+ * the ECC parity byte of the remaining area can't be written.
+ */
+#ifndef CONFIG_MAX_MEM_MAPPED
+#define CONFIG_MAX_MEM_MAPPED	((phys_size_t)2 << 30)
+#endif
+
 /*
  * Board-specific Platform code can reimplement spd_ddr_init_hang () if needed
  */
@@ -181,7 +195,7 @@ typedef enum ddr_cas_id {
 /*-----------------------------------------------------------------------------+
  * Prototypes
  *-----------------------------------------------------------------------------*/
-static unsigned long sdram_memsize(void);
+static phys_size_t sdram_memsize(void);
 static void get_spd_info(unsigned long *dimm_populated,
 			 unsigned char *iic0_dimm_addr,
 			 unsigned long num_dimm_banks);
@@ -306,9 +320,9 @@ static unsigned char spd_read(uchar chip, uint addr)
 /*-----------------------------------------------------------------------------+
  * sdram_memsize
  *-----------------------------------------------------------------------------*/
-static unsigned long sdram_memsize(void)
+static phys_size_t sdram_memsize(void)
 {
-	unsigned long mem_size;
+	phys_size_t mem_size;
 	unsigned long mcopt2;
 	unsigned long mcstat;
 	unsigned long mb0cf;
@@ -364,6 +378,8 @@ static unsigned long sdram_memsize(void)
 					mem_size+=4096;
 					break;
 				default:
+					printf("WARNING: Unsupported bank size (SDSZ=0x%lx)!\n"
+					       , sdsz);
 					mem_size=0;
 					break;
 				}
@@ -371,8 +387,7 @@ static unsigned long sdram_memsize(void)
 		}
 	}
 
-	mem_size *= 1024 * 1024;
-	return(mem_size);
+	return mem_size << 20;
 }
 
 /*-----------------------------------------------------------------------------+
@@ -400,7 +415,7 @@ phys_size_t initdram(int board_type)
 	unsigned long val;
 	ddr_cas_id_t selected_cas = DDR_CAS_5;	/* preset to silence compiler */
 	int write_recovery;
-	unsigned long dram_size = 0;
+	phys_size_t dram_size = 0;
 
 	num_dimm_banks = sizeof(iic0_dimm_addr);
 
@@ -558,6 +573,12 @@ phys_size_t initdram(int board_type)
 	/* get installed memory size */
 	dram_size = sdram_memsize();
 
+	/*
+	 * Limit size to 2GB
+	 */
+	if (dram_size > CONFIG_MAX_MEM_MAPPED)
+		dram_size = CONFIG_MAX_MEM_MAPPED;
+
 	/* and program tlb entries for this size (dynamic) */
 
 	/*
@@ -595,7 +616,7 @@ phys_size_t initdram(int board_type)
 	 */
 	set_mcsr(get_mcsr());
 
-	return dram_size;
+	return sdram_memsize();
 }
 
 static void get_spd_info(unsigned long *dimm_populated,
@@ -839,8 +860,8 @@ static void check_rank_number(unsigned long *dimm_populated,
 
 
 			if (dimm_rank > MAXRANKS) {
-				printf("ERROR: DRAM DIMM detected with %d ranks in "
-				       "slot %d is not supported.\n", dimm_rank, dimm_num);
+				printf("ERROR: DRAM DIMM detected with %lu ranks in "
+				       "slot %lu is not supported.\n", dimm_rank, dimm_num);
 				printf("Only %d ranks are supported for all DIMM.\n", MAXRANKS);
 				printf("Replace the DIMM module with a supported DIMM.\n\n");
 				spd_ddr_init_hang ();
@@ -1041,7 +1062,7 @@ static void program_copt1(unsigned long *dimm_populated,
 				dimm_32bit = TRUE;
 				break;
 			default:
-				printf("WARNING: Detected a DIMM with a data width of %d bits.\n",
+				printf("WARNING: Detected a DIMM with a data width of %lu bits.\n",
 				       data_width);
 				printf("Only DIMMs with 32 or 64 bit DDR-SDRAM widths are supported.\n");
 				break;
@@ -1594,7 +1615,7 @@ static void program_mode(unsigned long *dimm_populated,
 			printf("Make sure the PLB speed is within the supported range of the DIMMs.\n");
 			printf("cas3=%d cas4=%d cas5=%d\n",
 			       cas_3_0_available, cas_4_0_available, cas_5_0_available);
-			printf("sdram_freq=%d cycle3=%d cycle4=%d cycle5=%d\n\n",
+			printf("sdram_freq=%lu cycle3=%lu cycle4=%lu cycle5=%lu\n\n",
 			       sdram_freq, cycle_3_0_clk, cycle_4_0_clk, cycle_5_0_clk);
 			spd_ddr_init_hang ();
 		}
@@ -2133,15 +2154,15 @@ static void program_memory_queue(unsigned long *dimm_populated,
 				 unsigned long num_dimm_banks)
 {
 	unsigned long dimm_num;
-	unsigned long rank_base_addr;
+	phys_size_t rank_base_addr;
 	unsigned long rank_reg;
-	unsigned long rank_size_bytes;
+	phys_size_t rank_size_bytes;
 	unsigned long rank_size_id;
 	unsigned long num_ranks;
 	unsigned long baseadd_size;
 	unsigned long i;
 	unsigned long bank_0_populated = 0;
-	unsigned long total_size = 0;
+	phys_size_t total_size = 0;
 
 	/*------------------------------------------------------------------
 	 * Reset the rank_base_address.
@@ -2289,6 +2310,11 @@ static void program_ecc(unsigned long *dimm_populated,
 	if (ecc == 0)
 		return;
 
+	if (sdram_memsize() > CONFIG_MAX_MEM_MAPPED) {
+		printf("\nWarning: Can't enable ECC on systems with more than 2GB of SDRAM!\n");
+		return;
+	}
+
 	mfsdram(SDRAM_MCOPT1, mcopt1);
 	mfsdram(SDRAM_MCOPT2, mcopt2);
 
@@ -2441,6 +2467,7 @@ static int short_mem_test(void)
 	u32 bxcf;
 	int i;
 	int j;
+	phys_size_t base_addr;
 	u32 test[NUMMEMTESTS][NUMMEMWORDS] = {
 		{0x00000000, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF,
 		 0x00000000, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF},
@@ -2467,10 +2494,17 @@ static int short_mem_test(void)
 		if ((bxcf & SDRAM_BXCF_M_BE_MASK) == SDRAM_BXCF_M_BE_ENABLE) {
 			/* Bank is enabled */
 
+			/*
+			 * Only run test on accessable memory (below 2GB)
+			 */
+			base_addr = SDRAM_RXBAS_SDBA_DECODE(mfdcr_any(SDRAM_R0BAS+bxcr_num));
+			if (base_addr >= CONFIG_MAX_MEM_MAPPED)
+				continue;
+
 			/*------------------------------------------------------------------
 			 * Run the short memory test.
 			 *-----------------------------------------------------------------*/
-			membase = (u32 *)(SDRAM_RXBAS_SDBA_DECODE(mfdcr_any(SDRAM_R0BAS+bxcr_num)));
+			membase = (u32 *)(u32)base_addr;
 
 			for (i = 0; i < NUMMEMTESTS; i++) {
 				for (j = 0; j < NUMMEMWORDS; j++) {

cpu/ppc4xx/4xx_enet.c

@@ -1076,7 +1076,7 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)
 
 		bd_cached = (u32)malloc_aligned(MAL_ALLOC_SIZE, 4096);
 		if (!bd_cached) {
-			printf("%s: Error allocating MAL descriptor buffers!\n");
+			printf("%s: Error allocating MAL descriptor buffers!\n", __func__);
 			return -1;
 		}
 

cpu/ppc4xx/4xx_pcie.c

@@ -615,22 +615,20 @@ int __ppc4xx_init_pcie_port_hw(int port, int rootport)
 #if defined(CONFIG_460EX) || defined(CONFIG_460GT)
 int __ppc4xx_init_pcie_port_hw(int port, int rootport)
 {
-	u32 val = 1 << 24;
+	u32 val;
 	u32 utlset1;
 
-	if (rootport) {
+	if (rootport)
 		val = PTYPE_ROOT_PORT << 20;
-		utlset1 = 0x21222222;
-	} else {
+	else
 		val = PTYPE_LEGACY_ENDPOINT << 20;
-		utlset1 = 0x20222222;
-	}
 
 	if (port == 0) {
 		val |= LNKW_X1 << 12;
+		utlset1 = 0x20000000;
 	} else {
 		val |= LNKW_X4 << 12;
-		utlset1 |= 0x00101101;
+		utlset1 = 0x20101101;
 	}
 
 	SDR_WRITE(SDRN_PESDR_DLPSET(port), val);

cpu/ppc4xx/denali_spd_ddr2.c

@@ -339,7 +339,7 @@ static void get_spd_info(unsigned long dimm_ranks[],
 			      "\n", dimm_num, ranks_on_dimm);
 			if (ranks_on_dimm > max_ranks_per_dimm) {
 				printf("WARNING: DRAM DIMM in slot %lu has %lu "
-				       "ranks.\n");
+				       "ranks.\n", dimm_num, ranks_on_dimm);
 				if (1 == max_ranks_per_dimm) {
 					printf("Only one rank will be used.\n");
 				} else {
@@ -668,8 +668,8 @@ static void program_ddr0_03(unsigned long dimm_ranks[],
 		       "and 5.0 are supported.\n");
 		printf("Make sure the PLB speed is within the supported range "
 		       "of the DIMMs.\n");
-		printf("sdram_freq=%d cycle2=%d cycle3=%d cycle4=%d "
-		       "cycle5=%d\n\n", sdram_freq, cycle_2_0_clk,
+		printf("sdram_freq=%ld cycle2=%ld cycle3=%ld cycle4=%ld "
+		       "cycle5=%ld\n\n", sdram_freq, cycle_2_0_clk,
 		       cycle_3_0_clk, cycle_4_0_clk, cycle_5_0_clk);
 		spd_ddr_init_hang();
 	}
@@ -1248,7 +1248,7 @@ void board_add_ram_info(int use_default)
 	if (!is_ecc_enabled()) {
 		printf(" not");
 	}
-	printf(" enabled, %d MHz", (2 * get_bus_freq(0)) / 1000000);
+	printf(" enabled, %ld MHz", (2 * get_bus_freq(0)) / 1000000);
 
 	mfsdram(DDR0_03, val);
 	printf(", CL%d)", DDR0_03_CASLAT_LIN_DECODE(val) >> 1);

cpu/ppc4xx/tlb.c

@@ -316,12 +316,12 @@ static void program_tlb_addr(u64 phys_addr,
 				virt_addr += TLB_1KB_SIZE;
 			}
 		} else {
-			printf("ERROR: no TLB size exists for the base address 0x%0X.\n",
+			printf("ERROR: no TLB size exists for the base address 0x%llx.\n",
 				phys_addr);
 		}
 
 		if (rc != 0)
-			printf("ERROR: no TLB entries available for the base addr 0x%0X.\n",
+			printf("ERROR: no TLB entries available for the base addr 0x%llx.\n",
 				phys_addr);
 	}
 

cpu/ppc4xx/traps.c

@@ -214,7 +214,7 @@ MachineCheckException(struct pt_regs *regs)
 	}
 #if defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
 	mfsdram(DDR0_00, val) ;
-	printf("DDR0: DDR0_00 %p\n", val);
+	printf("DDR0: DDR0_00 %lx\n", val);
 	val = (val >> 16) & 0xff;
 	if (val & 0x80)
 		printf("DDR0: At least one interrupt active\n");
@@ -263,44 +263,44 @@ MachineCheckException(struct pt_regs *regs)
 		break;
 	default:
 		mfsdram(DDR0_01, value2);
-		printf("DDR0: No DDR0 error know 0x%x %p\n", val, value2);
+		printf("DDR0: No DDR0 error know 0x%lx %x\n", val, value2);
 	}
 	mfsdram(DDR0_23, val);
 	if (((val >> 16) & 0xff) && corr_ecc)
-		printf("DDR0: Syndrome for correctable ECC event 0x%x\n",
+		printf("DDR0: Syndrome for correctable ECC event 0x%lx\n",
 		       (val >> 16) & 0xff);
 	mfsdram(DDR0_23, val);
 	if (((val >> 8) & 0xff) && uncorr_ecc)
-		printf("DDR0: Syndrome for uncorrectable ECC event 0x%x\n",
+		printf("DDR0: Syndrome for uncorrectable ECC event 0x%lx\n",
 		       (val >> 8) & 0xff);
 	mfsdram(DDR0_33, val);
 	if (val)
 		printf("DDR0: Address of command that caused an "
-		       "Out-of-Range interrupt %p\n", val);
+		       "Out-of-Range interrupt %lx\n", val);
 	mfsdram(DDR0_34, val);
 	if (val && uncorr_ecc)
-		printf("DDR0: Address of uncorrectable ECC event %p\n", val);
+		printf("DDR0: Address of uncorrectable ECC event %lx\n", val);
 	mfsdram(DDR0_35, val);
 	if (val && uncorr_ecc)
-		printf("DDR0: Address of uncorrectable ECC event %p\n", val);
+		printf("DDR0: Address of uncorrectable ECC event %lx\n", val);
 	mfsdram(DDR0_36, val);
 	if (val && uncorr_ecc)
-		printf("DDR0: Data of uncorrectable ECC event 0x%08x\n", val);
+		printf("DDR0: Data of uncorrectable ECC event 0x%08lx\n", val);
 	mfsdram(DDR0_37, val);
 	if (val && uncorr_ecc)
-		printf("DDR0: Data of uncorrectable ECC event 0x%08x\n", val);
+		printf("DDR0: Data of uncorrectable ECC event 0x%08lx\n", val);
 	mfsdram(DDR0_38, val);
 	if (val && corr_ecc)
-		printf("DDR0: Address of correctable ECC event %p\n", val);
+		printf("DDR0: Address of correctable ECC event %lx\n", val);
 	mfsdram(DDR0_39, val);
 	if (val && corr_ecc)
-		printf("DDR0: Address of correctable ECC event %p\n", val);
+		printf("DDR0: Address of correctable ECC event %lx\n", val);
 	mfsdram(DDR0_40, val);
 	if (val && corr_ecc)
-		printf("DDR0: Data of correctable ECC event 0x%08x\n", val);
+		printf("DDR0: Data of correctable ECC event 0x%08lx\n", val);
 	mfsdram(DDR0_41, val);
 	if (val && corr_ecc)
-		printf("DDR0: Data of correctable ECC event 0x%08x\n", val);
+		printf("DDR0: Data of correctable ECC event 0x%08lx\n", val);
 #endif /* CONFIG_440EPX */
 #endif /* CONFIG_440 */
 	show_regs(regs);

drivers/mtd/nand/nand.c

@@ -70,7 +70,7 @@ void nand_init(void)
 		if (nand_curr_device == -1)
 			nand_curr_device = i;
 	}
-	printf("%lu MiB\n", size / (1024 * 1024));
+	printf("%u MiB\n", size / (1024 * 1024));
 
 #ifdef CFG_NAND_SELECT_DEVICE
 	/*

drivers/mtd/nand/nand_util.c

@@ -154,7 +154,7 @@ int nand_erase_opts(nand_info_t *meminfo, const nand_erase_options_t *opts)
 	}
 
 	if (erase_length < meminfo->erasesize) {
-		printf("Warning: Erase size 0x%08x smaller than one "	\
+		printf("Warning: Erase size 0x%08lx smaller than one "	\
 		       "erase block 0x%08x\n",erase_length, meminfo->erasesize);
 		printf("         Erasing 0x%08x instead\n", meminfo->erasesize);
 		erase_length = meminfo->erasesize;
@@ -498,7 +498,7 @@ int nand_write_opts(nand_info_t *meminfo, const nand_write_options_t *opts)
 			 * on (slow) serial consoles
 			 */
 			if (percent != percent_complete) {
-				printf("\rWriting data at 0x%x "
+				printf("\rWriting data at 0x%lx "
 				       "-- %3d%% complete.",
 				       mtdoffset, percent);
 				percent_complete = percent;
@@ -678,7 +678,7 @@ int nand_read_opts(nand_info_t *meminfo, const nand_read_options_t *opts)
 			 */
 			if (percent != percent_complete) {
 			if (!opts->quiet)
-				printf("\rReading data from 0x%x "
+				printf("\rReading data from 0x%lx "
 				       "-- %3d%% complete.",
 				       mtdoffset, percent);
 				percent_complete = percent;

drivers/net/ns8382x.c

@@ -770,14 +770,14 @@ ns8382x_send(struct eth_device *dev, volatile void *packet, int length)
 
 	for (i = 0; (tx_stat = le32_to_cpu(txd.cmdsts)) & DescOwn; i++) {
 		if (i >= TOUT_LOOP) {
-			printf ("%s: tx error buffer not ready: txd.cmdsts %#X\n",
+			printf ("%s: tx error buffer not ready: txd.cmdsts %#lX\n",
 			     dev->name, tx_stat);
 			goto Done;
 		}
 	}
 
 	if (!(tx_stat & DescPktOK)) {
-		printf("ns8382x_send: Transmit error, Tx status %X.\n", tx_stat);
+		printf("ns8382x_send: Transmit error, Tx status %lX.\n", tx_stat);
 		goto Done;
 	}
 #ifdef NS8382X_DEBUG

drivers/net/rtl8169.c

@@ -392,7 +392,7 @@ static int rtl8169_init_board(struct eth_device *dev)
 
 	/* if unknown chip, assume array element #0, original RTL-8169 in this case */
 	printf("PCI device %s: unknown chip version, assuming RTL-8169\n", dev->name);
-	printf("PCI device: TxConfig = 0x%hX\n", (unsigned long) RTL_R32(TxConfig));
+	printf("PCI device: TxConfig = 0x%lX\n", (unsigned long) RTL_R32(TxConfig));
 	tpc->chipset = 0;
 
 match:

drivers/pci/pci.c

@@ -411,6 +411,40 @@ void pci_cfgfunc_do_nothing(struct pci_controller *hose,
 extern int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev);
 extern void pciauto_config_init(struct pci_controller *hose);
 
+int __pci_skip_dev(struct pci_controller *hose, pci_dev_t dev)
+{
+	/*
+	 * Check if pci device should be skipped in configuration
+	 */
+	if (dev == PCI_BDF(hose->first_busno, 0, 0)) {
+#if defined(CONFIG_PCI_CONFIG_HOST_BRIDGE) /* don't skip host bridge */
+		/*
+		 * Only skip configuration if "pciconfighost" is not set
+		 */
+		if (getenv("pciconfighost") == NULL)
+			return 1;
+#else
+		return 1;
+#endif
+	}
+
+	return 0;
+}
+int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev)
+	__attribute__((weak, alias("__pci_skip_dev")));
+
+#ifdef CONFIG_PCI_SCAN_SHOW
+int __pci_print_dev(struct pci_controller *hose, pci_dev_t dev)
+{
+	if (dev == PCI_BDF(hose->first_busno, 0, 0))
+		return 0;
+
+	return 1;
+}
+int pci_print_dev(struct pci_controller *hose, pci_dev_t dev)
+	__attribute__((weak, alias("__pci_print_dev")));
+#endif /* CONFIG_PCI_SCAN_SHOW */
+
 int pci_hose_scan_bus(struct pci_controller *hose, int bus)
 {
 	unsigned int sub_bus, found_multi=0;
@@ -423,21 +457,10 @@ int pci_hose_scan_bus(struct pci_controller *hose, int bus)
 
 	for (dev =  PCI_BDF(bus,0,0);
 	     dev <  PCI_BDF(bus,PCI_MAX_PCI_DEVICES-1,PCI_MAX_PCI_FUNCTIONS-1);
-	     dev += PCI_BDF(0,0,1))
-	{
-		/* Skip our host bridge */
-		if ( dev == PCI_BDF(hose->first_busno,0,0) ) {
-#if defined(CONFIG_PCI_CONFIG_HOST_BRIDGE)              /* don't skip host bridge */
-			/*
-			 * Only skip hostbridge configuration if "pciconfighost" is not set
-			 */
-			if (getenv("pciconfighost") == NULL) {
-				continue; /* Skip our host bridge */
-			}
-#else
-			continue; /* Skip our host bridge */
-#endif
-		}
+	     dev += PCI_BDF(0,0,1)) {
+
+		if (pci_skip_dev(hose, dev))
+			continue;
 
 		if (PCI_FUNC(dev) && !found_multi)
 			continue;
@@ -473,15 +496,14 @@ int pci_hose_scan_bus(struct pci_controller *hose, int bus)
 				hose->fixup_irq(hose, dev);
 
 #ifdef CONFIG_PCI_SCAN_SHOW
-			/* Skip our host bridge */
-			if ( dev != PCI_BDF(hose->first_busno,0,0) ) {
-			    unsigned char int_line;
-
-			    pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_LINE,
-						      &int_line);
-			    printf("        %02x  %02x  %04x  %04x  %04x  %02x\n",
-				   PCI_BUS(dev), PCI_DEV(dev), vendor, device, class,
-				   int_line);
+			if (pci_print_dev(hose, dev)) {
+				unsigned char int_line;
+
+				pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_LINE,
+							  &int_line);
+				printf("        %02x  %02x  %04x  %04x  %04x  %02x\n",
+				       PCI_BUS(dev), PCI_DEV(dev), vendor, device, class,
+				       int_line);
 			}
 #endif
 		}

drivers/rtc/m41t60.c

@@ -241,7 +241,7 @@ void rtc_reset(void)
 
 		if (l <= 0x3F) {
 			if ((data[RTC_CTRL] & 0x3F) != l) {
-				printf("Setting RTC calibration to 0x%02X\n",
+				printf("Setting RTC calibration to 0x%02lX\n",
 				       l);
 				data[RTC_CTRL] &= 0xC0;
 				data[RTC_CTRL] |= (uchar) l;

drivers/usb/usbdcore.c

@@ -146,12 +146,9 @@ struct usb_string_descriptor *usbd_get_string (__u8 index)
 static struct usb_configuration_instance *usbd_device_configuration_instance (struct usb_device_instance *device,
 		unsigned int port, unsigned int configuration)
 {
-	/* XXX */
-	configuration = configuration ? configuration - 1 : 0;
-
-	if (configuration >= device->configurations) {
+	if (configuration >= device->configurations)
 		return NULL;
-	}
+
 	return device->configuration_instance_array + configuration;
 }
 

drivers/usb/usbdcore_ep0.c

@@ -235,8 +235,8 @@ static int ep0_get_descriptor (struct usb_device_instance *device,
 				return -1;
 			}
 			/*dbg_ep0(2, "%d %d", index, device_descriptor->bNumConfigurations); */
-			if (index > device_descriptor->bNumConfigurations) {
-				dbg_ep0 (0, "index too large: %d > %d", index,
+			if (index >= device_descriptor->bNumConfigurations) {
+				dbg_ep0 (0, "index too large: %d >= %d", index,
 					 device_descriptor->
 					 bNumConfigurations);
 				return -1;
@@ -571,14 +571,8 @@ int ep0_recv_setup (struct urb *urb)
 
 		case USB_REQ_SET_CONFIGURATION:
 			/* c.f. 9.4.7 - the top half of wValue is reserved */
-			/* */
-			if ((device->configuration =
-				le16_to_cpu (request->wValue) & 0xFF80) != 0) {
-				/* c.f. 9.4.7 - zero is the default or addressed state, in our case this */
-				/* is the same is configuration zero */
-				serial_printf("error setting dev->config to zero!\n");
-				device->configuration = 0;	/* TBR - ?????? */
-			}
+			device->configuration = le16_to_cpu(request->wValue) & 0xff;
+
 			/* reset interface and alternate settings */
 			device->interface = device->alternate = 0;
 

examples/test_burst.c

@@ -173,7 +173,7 @@ static int test_burst_start (unsigned long size, unsigned long pattern)
 	int i, n;
 	int res = 1;
 
-	printf ("Test pattern %08x ...", pattern);
+	printf ("Test pattern %08lx ...", pattern);
 
 	n = size / 4;
 
@@ -248,7 +248,7 @@ static void test_desc(unsigned long size)
 {
 	printf(
 	"The following tests will be conducted:\n"
-	"1)  Map %d-byte region of physical RAM at 0x%08x\n"
+	"1)  Map %ld-byte region of physical RAM at 0x%08x\n"
 	"    into two virtual regions:\n"
 	"    one cached at 0x%08x and\n"
 	"    the the other uncached at 0x%08x.\n",
@@ -277,8 +277,8 @@ static void test_error(
 	p[1] = val;
 	p[2] = pattern;
 
-	printf ("\nError at step %s, addr %08x: read %08x, pattern %08x",
-		step, addr, val, pattern);
+	printf ("\nError at step %s, addr %08lx: read %08lx, pattern %08lx",
+		(unsigned long)step, addr, val, pattern);
 }
 
 static void signal_init(void)

include/asm-ppc/ppc4xx-sdram.h

@@ -284,8 +284,8 @@
 #if defined(CONFIG_440SPE) || \
     defined(CONFIG_460EX) || defined(CONFIG_460GT)
 #define SDRAM_RXBAS_SDBA_MASK		0xFFE00000	/* Base address	*/
-#define SDRAM_RXBAS_SDBA_ENCODE(n)	((((u32)(n))&0xFFE00000)>>2)
-#define SDRAM_RXBAS_SDBA_DECODE(n)	((((u32)(n))&0xFFE00000)<<2)
+#define SDRAM_RXBAS_SDBA_ENCODE(n)	((u32)(((phys_size_t)(n) >> 2) & 0xFFE00000))
+#define SDRAM_RXBAS_SDBA_DECODE(n)	((((phys_size_t)(n)) & 0xFFE00000) << 2)
 #endif /* CONFIG_440SPE */
 #if defined(CONFIG_440SP)
 #define SDRAM_RXBAS_SDBA_MASK		0xFF800000	/* Base address	*/

include/configs/katmai.h

@@ -40,6 +40,13 @@
 #define CONFIG_SYS_CLK_FREQ	33333333	/* external freq to pll	*/
 #define CFG_4xx_RESET_TYPE	0x2	/* use chip reset on this board	*/
 
+/*
+ * Enable this board for more than 2GB of SDRAM
+ */
+#define CONFIG_PHYS_64BIT
+#define	CONFIG_VERY_BIG_RAM
+#define CONFIG_MAX_MEM_MAPPED	((phys_size_t)2 << 30)
+
 /*
  * Include common defines/options for all AMCC eval boards
  */

include/configs/korat.h

@@ -129,7 +129,7 @@
 
 #define CFG_ENV_SECT_SIZE	0x20000	/* size of one complete sector	      */
 #define CFG_ENV_ADDR		(CFG_FLASH1_TOP - CFG_ENV_SECT_SIZE)
-#define	CFG_ENV_SIZE		0x2000	/* Total Size of Environment Sector   */
+#define CFG_ENV_SIZE		0x2000	/* Total Size of Environment Sector   */
 
 /* Address and size of Redundant Environment Sector */
 #define CFG_ENV_ADDR_REDUND	(CFG_ENV_ADDR - CFG_ENV_SECT_SIZE)
@@ -145,7 +145,6 @@
 #define CONFIG_DDR_ECC			/* Use ECC when available	*/
 #define SPD_EEPROM_ADDRESS	{0x50}
 #define CONFIG_PROG_SDRAM_TLB
-#define CFG_DRAM_TEST
 #define CFG_MEM_TOP_HIDE	(4 << 10) /* don't use last 4kbytes	*/
 					/* 440EPx errata CHIP 11	*/
 
@@ -185,7 +184,7 @@
 #define CFG_ROOTPATH		"rootpath=/opt/eldk/ppc_4xxFP\0"
 
 /* Note: kernel_addr and ramdisk_addr assume that FLASH1 is 64 MiB. */
-#define	CONFIG_EXTRA_ENV_SETTINGS					\
+#define CONFIG_EXTRA_ENV_SETTINGS					\
 	CFG_BOOTFILE							\
 	CFG_ROOTPATH							\
 	"netdev=eth0\0"							\
@@ -216,7 +215,7 @@
 #define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/
 #define CFG_LOADS_BAUD_CHANGE	1	/* allow baudrate change	*/
 
-#define	CONFIG_IBM_EMAC4_V4	1
+#define CONFIG_IBM_EMAC4_V4	1
 #define CONFIG_MII		1	/* MII PHY management		*/
 #define CONFIG_PHY_ADDR		2	/* PHY address, See schematics	*/
 #define CONFIG_PHY_DYNAMIC_ANEG	1
@@ -548,4 +547,8 @@
 #define CONFIG_KGDB_SER_INDEX	2	/* which serial port to use	*/
 #endif
 
+/* Pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT	1
+#define CONFIG_OF_BOARD_SETUP	1
+
 #endif /* __CONFIG_H */

lib_ppc/board.c

@@ -786,7 +786,7 @@ void board_init_r (gd_t *id, ulong dest_addr)
 		 */
 		s = getenv ("flashchecksum");
 		if (s && (*s == 'y')) {
-			printf ("  CRC: %08lX",
+			printf ("  CRC: %08X",
 				crc32 (0, (const unsigned char *) CFG_FLASH_BASE, flash_size)
 			);
 		}