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@@ -274,8 +274,7 @@ static void emac_loopback_disable(EMAC_4XX_HW_PST hw_p)
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static void ppc_4xx_eth_halt (struct eth_device *dev)
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static void ppc_4xx_eth_halt (struct eth_device *dev)
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{
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{
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EMAC_4XX_HW_PST hw_p = dev->priv;
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EMAC_4XX_HW_PST hw_p = dev->priv;
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- uint32_t failsafe = 10000;
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- u32 eth_cfg = 0;
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+ u32 val = 10000;
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out_be32((void *)EMAC_IER + hw_p->hw_addr, 0x00000000); /* disable emac interrupts */
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out_be32((void *)EMAC_IER + hw_p->hw_addr, 0x00000000); /* disable emac interrupts */
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@@ -291,8 +290,8 @@ static void ppc_4xx_eth_halt (struct eth_device *dev)
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/* wait for reset */
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/* wait for reset */
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while (mfdcr (malrxcasr) & (MAL_CR_MMSR >> hw_p->devnum)) {
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while (mfdcr (malrxcasr) & (MAL_CR_MMSR >> hw_p->devnum)) {
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udelay (1000); /* Delay 1 MS so as not to hammer the register */
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udelay (1000); /* Delay 1 MS so as not to hammer the register */
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- failsafe--;
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- if (failsafe == 0)
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+ val--;
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+ if (val == 0)
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break;
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break;
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}
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}
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@@ -311,9 +310,9 @@ static void ppc_4xx_eth_halt (struct eth_device *dev)
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#if defined(CONFIG_460EX) || defined(CONFIG_460GT)
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#if defined(CONFIG_460EX) || defined(CONFIG_460GT)
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/* don't bypass the TAHOE0/TAHOE1 cores for Linux */
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/* don't bypass the TAHOE0/TAHOE1 cores for Linux */
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- mfsdr(SDR0_ETH_CFG, eth_cfg);
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- eth_cfg &= ~(SDR0_ETH_CFG_TAHOE0_BYPASS | SDR0_ETH_CFG_TAHOE1_BYPASS);
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- mtsdr(SDR0_ETH_CFG, eth_cfg);
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+ mfsdr(SDR0_ETH_CFG, val);
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+ val &= ~(SDR0_ETH_CFG_TAHOE0_BYPASS | SDR0_ETH_CFG_TAHOE1_BYPASS);
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+ mtsdr(SDR0_ETH_CFG, val);
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#endif
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#endif
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return;
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return;
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