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@@ -74,6 +74,20 @@ flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
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#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
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#endif
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+/*
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+ * 0xffff is an undefined value for the configuration register. When
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+ * this value is returned, the configuration register shall not be
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+ * written at all (default mode).
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+ */
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+static u16 cfi_flash_config_reg(int i)
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+{
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+#ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
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+ return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
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+#else
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+ return 0xffff;
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+#endif
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+}
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+
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#if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
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int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
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#endif
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@@ -2033,6 +2047,31 @@ void flash_set_verbose(uint v)
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flash_verbose = v;
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}
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+static void cfi_flash_set_config_reg(u32 base, u16 val)
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+{
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+#ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
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+ /*
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+ * Only set this config register if really defined
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+ * to a valid value (0xffff is invalid)
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+ */
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+ if (val == 0xffff)
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+ return;
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+
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+ /*
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+ * Set configuration register. Data is "encrypted" in the 16 lower
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+ * address bits.
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+ */
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+ flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
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+ flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
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+
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+ /*
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+ * Finally issue reset-command to bring device back to
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+ * read-array mode
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+ */
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+ flash_write16(FLASH_CMD_RESET, (void *)base);
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+#endif
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+}
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+
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/*-----------------------------------------------------------------------
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*/
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unsigned long flash_init (void)
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@@ -2056,6 +2095,10 @@ unsigned long flash_init (void)
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for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
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flash_info[i].flash_id = FLASH_UNKNOWN;
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+ /* Optionally write flash configuration register */
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+ cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
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+ cfi_flash_config_reg(i));
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+
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if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
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flash_get_size(cfi_flash_bank_addr(i), i);
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size += flash_info[i].size;
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