cfi_flash.c 57 KB

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  1. /*
  2. * (C) Copyright 2002-2004
  3. * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
  4. *
  5. * Copyright (C) 2003 Arabella Software Ltd.
  6. * Yuli Barcohen <yuli@arabellasw.com>
  7. *
  8. * Copyright (C) 2004
  9. * Ed Okerson
  10. *
  11. * Copyright (C) 2006
  12. * Tolunay Orkun <listmember@orkun.us>
  13. *
  14. * See file CREDITS for list of people who contributed to this
  15. * project.
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License as
  19. * published by the Free Software Foundation; either version 2 of
  20. * the License, or (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30. * MA 02111-1307 USA
  31. *
  32. */
  33. /* The DEBUG define must be before common to enable debugging */
  34. /* #define DEBUG */
  35. #include <common.h>
  36. #include <asm/processor.h>
  37. #include <asm/io.h>
  38. #include <asm/byteorder.h>
  39. #include <environment.h>
  40. #include <mtd/cfi_flash.h>
  41. /*
  42. * This file implements a Common Flash Interface (CFI) driver for
  43. * U-Boot.
  44. *
  45. * The width of the port and the width of the chips are determined at
  46. * initialization. These widths are used to calculate the address for
  47. * access CFI data structures.
  48. *
  49. * References
  50. * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  51. * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  52. * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  53. * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  54. * AMD CFI Specification, Release 2.0 December 1, 2001
  55. * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  56. * Device IDs, Publication Number 25538 Revision A, November 8, 2001
  57. *
  58. * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
  59. * reading and writing ... (yes there is such a Hardware).
  60. */
  61. static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
  62. static uint flash_verbose = 1;
  63. flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
  64. /*
  65. * Check if chip width is defined. If not, start detecting with 8bit.
  66. */
  67. #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
  68. #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
  69. #endif
  70. /*
  71. * 0xffff is an undefined value for the configuration register. When
  72. * this value is returned, the configuration register shall not be
  73. * written at all (default mode).
  74. */
  75. static u16 cfi_flash_config_reg(int i)
  76. {
  77. #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
  78. return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
  79. #else
  80. return 0xffff;
  81. #endif
  82. }
  83. #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
  84. int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
  85. #endif
  86. static phys_addr_t __cfi_flash_bank_addr(int i)
  87. {
  88. return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
  89. }
  90. phys_addr_t cfi_flash_bank_addr(int i)
  91. __attribute__((weak, alias("__cfi_flash_bank_addr")));
  92. static unsigned long __cfi_flash_bank_size(int i)
  93. {
  94. #ifdef CONFIG_SYS_FLASH_BANKS_SIZES
  95. return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
  96. #else
  97. return 0;
  98. #endif
  99. }
  100. unsigned long cfi_flash_bank_size(int i)
  101. __attribute__((weak, alias("__cfi_flash_bank_size")));
  102. static void __flash_write8(u8 value, void *addr)
  103. {
  104. __raw_writeb(value, addr);
  105. }
  106. static void __flash_write16(u16 value, void *addr)
  107. {
  108. __raw_writew(value, addr);
  109. }
  110. static void __flash_write32(u32 value, void *addr)
  111. {
  112. __raw_writel(value, addr);
  113. }
  114. static void __flash_write64(u64 value, void *addr)
  115. {
  116. /* No architectures currently implement __raw_writeq() */
  117. *(volatile u64 *)addr = value;
  118. }
  119. static u8 __flash_read8(void *addr)
  120. {
  121. return __raw_readb(addr);
  122. }
  123. static u16 __flash_read16(void *addr)
  124. {
  125. return __raw_readw(addr);
  126. }
  127. static u32 __flash_read32(void *addr)
  128. {
  129. return __raw_readl(addr);
  130. }
  131. static u64 __flash_read64(void *addr)
  132. {
  133. /* No architectures currently implement __raw_readq() */
  134. return *(volatile u64 *)addr;
  135. }
  136. #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
  137. void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
  138. void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
  139. void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
  140. void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
  141. u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
  142. u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
  143. u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
  144. u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
  145. #else
  146. #define flash_write8 __flash_write8
  147. #define flash_write16 __flash_write16
  148. #define flash_write32 __flash_write32
  149. #define flash_write64 __flash_write64
  150. #define flash_read8 __flash_read8
  151. #define flash_read16 __flash_read16
  152. #define flash_read32 __flash_read32
  153. #define flash_read64 __flash_read64
  154. #endif
  155. /*-----------------------------------------------------------------------
  156. */
  157. #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
  158. flash_info_t *flash_get_info(ulong base)
  159. {
  160. int i;
  161. flash_info_t *info = NULL;
  162. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
  163. info = & flash_info[i];
  164. if (info->size && info->start[0] <= base &&
  165. base <= info->start[0] + info->size - 1)
  166. break;
  167. }
  168. return info;
  169. }
  170. #endif
  171. unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
  172. {
  173. if (sect != (info->sector_count - 1))
  174. return info->start[sect + 1] - info->start[sect];
  175. else
  176. return info->start[0] + info->size - info->start[sect];
  177. }
  178. /*-----------------------------------------------------------------------
  179. * create an address based on the offset and the port width
  180. */
  181. static inline void *
  182. flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
  183. {
  184. unsigned int byte_offset = offset * info->portwidth;
  185. return (void *)(info->start[sect] + byte_offset);
  186. }
  187. static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
  188. unsigned int offset, void *addr)
  189. {
  190. }
  191. /*-----------------------------------------------------------------------
  192. * make a proper sized command based on the port and chip widths
  193. */
  194. static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
  195. {
  196. int i;
  197. int cword_offset;
  198. int cp_offset;
  199. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  200. u32 cmd_le = cpu_to_le32(cmd);
  201. #endif
  202. uchar val;
  203. uchar *cp = (uchar *) cmdbuf;
  204. for (i = info->portwidth; i > 0; i--){
  205. cword_offset = (info->portwidth-i)%info->chipwidth;
  206. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  207. cp_offset = info->portwidth - i;
  208. val = *((uchar*)&cmd_le + cword_offset);
  209. #else
  210. cp_offset = i - 1;
  211. val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
  212. #endif
  213. cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
  214. }
  215. }
  216. #ifdef DEBUG
  217. /*-----------------------------------------------------------------------
  218. * Debug support
  219. */
  220. static void print_longlong (char *str, unsigned long long data)
  221. {
  222. int i;
  223. char *cp;
  224. cp = (char *) &data;
  225. for (i = 0; i < 8; i++)
  226. sprintf (&str[i * 2], "%2.2x", *cp++);
  227. }
  228. static void flash_printqry (struct cfi_qry *qry)
  229. {
  230. u8 *p = (u8 *)qry;
  231. int x, y;
  232. for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
  233. debug("%02x : ", x);
  234. for (y = 0; y < 16; y++)
  235. debug("%2.2x ", p[x + y]);
  236. debug(" ");
  237. for (y = 0; y < 16; y++) {
  238. unsigned char c = p[x + y];
  239. if (c >= 0x20 && c <= 0x7e)
  240. debug("%c", c);
  241. else
  242. debug(".");
  243. }
  244. debug("\n");
  245. }
  246. }
  247. #endif
  248. /*-----------------------------------------------------------------------
  249. * read a character at a port width address
  250. */
  251. static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
  252. {
  253. uchar *cp;
  254. uchar retval;
  255. cp = flash_map (info, 0, offset);
  256. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  257. retval = flash_read8(cp);
  258. #else
  259. retval = flash_read8(cp + info->portwidth - 1);
  260. #endif
  261. flash_unmap (info, 0, offset, cp);
  262. return retval;
  263. }
  264. /*-----------------------------------------------------------------------
  265. * read a word at a port width address, assume 16bit bus
  266. */
  267. static inline ushort flash_read_word (flash_info_t * info, uint offset)
  268. {
  269. ushort *addr, retval;
  270. addr = flash_map (info, 0, offset);
  271. retval = flash_read16 (addr);
  272. flash_unmap (info, 0, offset, addr);
  273. return retval;
  274. }
  275. /*-----------------------------------------------------------------------
  276. * read a long word by picking the least significant byte of each maximum
  277. * port size word. Swap for ppc format.
  278. */
  279. static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
  280. uint offset)
  281. {
  282. uchar *addr;
  283. ulong retval;
  284. #ifdef DEBUG
  285. int x;
  286. #endif
  287. addr = flash_map (info, sect, offset);
  288. #ifdef DEBUG
  289. debug ("long addr is at %p info->portwidth = %d\n", addr,
  290. info->portwidth);
  291. for (x = 0; x < 4 * info->portwidth; x++) {
  292. debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
  293. }
  294. #endif
  295. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  296. retval = ((flash_read8(addr) << 16) |
  297. (flash_read8(addr + info->portwidth) << 24) |
  298. (flash_read8(addr + 2 * info->portwidth)) |
  299. (flash_read8(addr + 3 * info->portwidth) << 8));
  300. #else
  301. retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
  302. (flash_read8(addr + info->portwidth - 1) << 16) |
  303. (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
  304. (flash_read8(addr + 3 * info->portwidth - 1)));
  305. #endif
  306. flash_unmap(info, sect, offset, addr);
  307. return retval;
  308. }
  309. /*
  310. * Write a proper sized command to the correct address
  311. */
  312. void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
  313. uint offset, u32 cmd)
  314. {
  315. void *addr;
  316. cfiword_t cword;
  317. addr = flash_map (info, sect, offset);
  318. flash_make_cmd (info, cmd, &cword);
  319. switch (info->portwidth) {
  320. case FLASH_CFI_8BIT:
  321. debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
  322. cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  323. flash_write8(cword.c, addr);
  324. break;
  325. case FLASH_CFI_16BIT:
  326. debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
  327. cmd, cword.w,
  328. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  329. flash_write16(cword.w, addr);
  330. break;
  331. case FLASH_CFI_32BIT:
  332. debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
  333. cmd, cword.l,
  334. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  335. flash_write32(cword.l, addr);
  336. break;
  337. case FLASH_CFI_64BIT:
  338. #ifdef DEBUG
  339. {
  340. char str[20];
  341. print_longlong (str, cword.ll);
  342. debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
  343. addr, cmd, str,
  344. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  345. }
  346. #endif
  347. flash_write64(cword.ll, addr);
  348. break;
  349. }
  350. /* Ensure all the instructions are fully finished */
  351. sync();
  352. flash_unmap(info, sect, offset, addr);
  353. }
  354. static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
  355. {
  356. flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
  357. flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
  358. }
  359. /*-----------------------------------------------------------------------
  360. */
  361. static int flash_isequal (flash_info_t * info, flash_sect_t sect,
  362. uint offset, uchar cmd)
  363. {
  364. void *addr;
  365. cfiword_t cword;
  366. int retval;
  367. addr = flash_map (info, sect, offset);
  368. flash_make_cmd (info, cmd, &cword);
  369. debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
  370. switch (info->portwidth) {
  371. case FLASH_CFI_8BIT:
  372. debug ("is= %x %x\n", flash_read8(addr), cword.c);
  373. retval = (flash_read8(addr) == cword.c);
  374. break;
  375. case FLASH_CFI_16BIT:
  376. debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
  377. retval = (flash_read16(addr) == cword.w);
  378. break;
  379. case FLASH_CFI_32BIT:
  380. debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
  381. retval = (flash_read32(addr) == cword.l);
  382. break;
  383. case FLASH_CFI_64BIT:
  384. #ifdef DEBUG
  385. {
  386. char str1[20];
  387. char str2[20];
  388. print_longlong (str1, flash_read64(addr));
  389. print_longlong (str2, cword.ll);
  390. debug ("is= %s %s\n", str1, str2);
  391. }
  392. #endif
  393. retval = (flash_read64(addr) == cword.ll);
  394. break;
  395. default:
  396. retval = 0;
  397. break;
  398. }
  399. flash_unmap(info, sect, offset, addr);
  400. return retval;
  401. }
  402. /*-----------------------------------------------------------------------
  403. */
  404. static int flash_isset (flash_info_t * info, flash_sect_t sect,
  405. uint offset, uchar cmd)
  406. {
  407. void *addr;
  408. cfiword_t cword;
  409. int retval;
  410. addr = flash_map (info, sect, offset);
  411. flash_make_cmd (info, cmd, &cword);
  412. switch (info->portwidth) {
  413. case FLASH_CFI_8BIT:
  414. retval = ((flash_read8(addr) & cword.c) == cword.c);
  415. break;
  416. case FLASH_CFI_16BIT:
  417. retval = ((flash_read16(addr) & cword.w) == cword.w);
  418. break;
  419. case FLASH_CFI_32BIT:
  420. retval = ((flash_read32(addr) & cword.l) == cword.l);
  421. break;
  422. case FLASH_CFI_64BIT:
  423. retval = ((flash_read64(addr) & cword.ll) == cword.ll);
  424. break;
  425. default:
  426. retval = 0;
  427. break;
  428. }
  429. flash_unmap(info, sect, offset, addr);
  430. return retval;
  431. }
  432. /*-----------------------------------------------------------------------
  433. */
  434. static int flash_toggle (flash_info_t * info, flash_sect_t sect,
  435. uint offset, uchar cmd)
  436. {
  437. void *addr;
  438. cfiword_t cword;
  439. int retval;
  440. addr = flash_map (info, sect, offset);
  441. flash_make_cmd (info, cmd, &cword);
  442. switch (info->portwidth) {
  443. case FLASH_CFI_8BIT:
  444. retval = flash_read8(addr) != flash_read8(addr);
  445. break;
  446. case FLASH_CFI_16BIT:
  447. retval = flash_read16(addr) != flash_read16(addr);
  448. break;
  449. case FLASH_CFI_32BIT:
  450. retval = flash_read32(addr) != flash_read32(addr);
  451. break;
  452. case FLASH_CFI_64BIT:
  453. retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
  454. (flash_read32(addr+4) != flash_read32(addr+4)) );
  455. break;
  456. default:
  457. retval = 0;
  458. break;
  459. }
  460. flash_unmap(info, sect, offset, addr);
  461. return retval;
  462. }
  463. /*
  464. * flash_is_busy - check to see if the flash is busy
  465. *
  466. * This routine checks the status of the chip and returns true if the
  467. * chip is busy.
  468. */
  469. static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
  470. {
  471. int retval;
  472. switch (info->vendor) {
  473. case CFI_CMDSET_INTEL_PROG_REGIONS:
  474. case CFI_CMDSET_INTEL_STANDARD:
  475. case CFI_CMDSET_INTEL_EXTENDED:
  476. retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
  477. break;
  478. case CFI_CMDSET_AMD_STANDARD:
  479. case CFI_CMDSET_AMD_EXTENDED:
  480. #ifdef CONFIG_FLASH_CFI_LEGACY
  481. case CFI_CMDSET_AMD_LEGACY:
  482. #endif
  483. retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
  484. break;
  485. default:
  486. retval = 0;
  487. }
  488. debug ("flash_is_busy: %d\n", retval);
  489. return retval;
  490. }
  491. /*-----------------------------------------------------------------------
  492. * wait for XSR.7 to be set. Time out with an error if it does not.
  493. * This routine does not set the flash to read-array mode.
  494. */
  495. static int flash_status_check (flash_info_t * info, flash_sect_t sector,
  496. ulong tout, char *prompt)
  497. {
  498. ulong start;
  499. #if CONFIG_SYS_HZ != 1000
  500. if ((ulong)CONFIG_SYS_HZ > 100000)
  501. tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
  502. else
  503. tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
  504. #endif
  505. /* Wait for command completion */
  506. reset_timer();
  507. start = get_timer (0);
  508. while (flash_is_busy (info, sector)) {
  509. if (get_timer (start) > tout) {
  510. printf ("Flash %s timeout at address %lx data %lx\n",
  511. prompt, info->start[sector],
  512. flash_read_long (info, sector, 0));
  513. flash_write_cmd (info, sector, 0, info->cmd_reset);
  514. return ERR_TIMOUT;
  515. }
  516. udelay (1); /* also triggers watchdog */
  517. }
  518. return ERR_OK;
  519. }
  520. /*-----------------------------------------------------------------------
  521. * Wait for XSR.7 to be set, if it times out print an error, otherwise
  522. * do a full status check.
  523. *
  524. * This routine sets the flash to read-array mode.
  525. */
  526. static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
  527. ulong tout, char *prompt)
  528. {
  529. int retcode;
  530. retcode = flash_status_check (info, sector, tout, prompt);
  531. switch (info->vendor) {
  532. case CFI_CMDSET_INTEL_PROG_REGIONS:
  533. case CFI_CMDSET_INTEL_EXTENDED:
  534. case CFI_CMDSET_INTEL_STANDARD:
  535. if ((retcode != ERR_OK)
  536. && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
  537. retcode = ERR_INVAL;
  538. printf ("Flash %s error at address %lx\n", prompt,
  539. info->start[sector]);
  540. if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
  541. FLASH_STATUS_PSLBS)) {
  542. puts ("Command Sequence Error.\n");
  543. } else if (flash_isset (info, sector, 0,
  544. FLASH_STATUS_ECLBS)) {
  545. puts ("Block Erase Error.\n");
  546. retcode = ERR_NOT_ERASED;
  547. } else if (flash_isset (info, sector, 0,
  548. FLASH_STATUS_PSLBS)) {
  549. puts ("Locking Error\n");
  550. }
  551. if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
  552. puts ("Block locked.\n");
  553. retcode = ERR_PROTECTED;
  554. }
  555. if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
  556. puts ("Vpp Low Error.\n");
  557. }
  558. flash_write_cmd (info, sector, 0, info->cmd_reset);
  559. break;
  560. default:
  561. break;
  562. }
  563. return retcode;
  564. }
  565. static int use_flash_status_poll(flash_info_t *info)
  566. {
  567. #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
  568. if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
  569. info->vendor == CFI_CMDSET_AMD_STANDARD)
  570. return 1;
  571. #endif
  572. return 0;
  573. }
  574. static int flash_status_poll(flash_info_t *info, void *src, void *dst,
  575. ulong tout, char *prompt)
  576. {
  577. #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
  578. ulong start;
  579. int ready;
  580. #if CONFIG_SYS_HZ != 1000
  581. if ((ulong)CONFIG_SYS_HZ > 100000)
  582. tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
  583. else
  584. tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
  585. #endif
  586. /* Wait for command completion */
  587. reset_timer();
  588. start = get_timer(0);
  589. while (1) {
  590. switch (info->portwidth) {
  591. case FLASH_CFI_8BIT:
  592. ready = flash_read8(dst) == flash_read8(src);
  593. break;
  594. case FLASH_CFI_16BIT:
  595. ready = flash_read16(dst) == flash_read16(src);
  596. break;
  597. case FLASH_CFI_32BIT:
  598. ready = flash_read32(dst) == flash_read32(src);
  599. break;
  600. case FLASH_CFI_64BIT:
  601. ready = flash_read64(dst) == flash_read64(src);
  602. break;
  603. default:
  604. ready = 0;
  605. break;
  606. }
  607. if (ready)
  608. break;
  609. if (get_timer(start) > tout) {
  610. printf("Flash %s timeout at address %lx data %lx\n",
  611. prompt, (ulong)dst, (ulong)flash_read8(dst));
  612. return ERR_TIMOUT;
  613. }
  614. udelay(1); /* also triggers watchdog */
  615. }
  616. #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
  617. return ERR_OK;
  618. }
  619. /*-----------------------------------------------------------------------
  620. */
  621. static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
  622. {
  623. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  624. unsigned short w;
  625. unsigned int l;
  626. unsigned long long ll;
  627. #endif
  628. switch (info->portwidth) {
  629. case FLASH_CFI_8BIT:
  630. cword->c = c;
  631. break;
  632. case FLASH_CFI_16BIT:
  633. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  634. w = c;
  635. w <<= 8;
  636. cword->w = (cword->w >> 8) | w;
  637. #else
  638. cword->w = (cword->w << 8) | c;
  639. #endif
  640. break;
  641. case FLASH_CFI_32BIT:
  642. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  643. l = c;
  644. l <<= 24;
  645. cword->l = (cword->l >> 8) | l;
  646. #else
  647. cword->l = (cword->l << 8) | c;
  648. #endif
  649. break;
  650. case FLASH_CFI_64BIT:
  651. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  652. ll = c;
  653. ll <<= 56;
  654. cword->ll = (cword->ll >> 8) | ll;
  655. #else
  656. cword->ll = (cword->ll << 8) | c;
  657. #endif
  658. break;
  659. }
  660. }
  661. /*
  662. * Loop through the sector table starting from the previously found sector.
  663. * Searches forwards or backwards, dependent on the passed address.
  664. */
  665. static flash_sect_t find_sector (flash_info_t * info, ulong addr)
  666. {
  667. static flash_sect_t saved_sector = 0; /* previously found sector */
  668. flash_sect_t sector = saved_sector;
  669. while ((info->start[sector] < addr)
  670. && (sector < info->sector_count - 1))
  671. sector++;
  672. while ((info->start[sector] > addr) && (sector > 0))
  673. /*
  674. * also decrements the sector in case of an overshot
  675. * in the first loop
  676. */
  677. sector--;
  678. saved_sector = sector;
  679. return sector;
  680. }
  681. /*-----------------------------------------------------------------------
  682. */
  683. static int flash_write_cfiword (flash_info_t * info, ulong dest,
  684. cfiword_t cword)
  685. {
  686. void *dstaddr = (void *)dest;
  687. int flag;
  688. flash_sect_t sect = 0;
  689. char sect_found = 0;
  690. /* Check if Flash is (sufficiently) erased */
  691. switch (info->portwidth) {
  692. case FLASH_CFI_8BIT:
  693. flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
  694. break;
  695. case FLASH_CFI_16BIT:
  696. flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
  697. break;
  698. case FLASH_CFI_32BIT:
  699. flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
  700. break;
  701. case FLASH_CFI_64BIT:
  702. flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
  703. break;
  704. default:
  705. flag = 0;
  706. break;
  707. }
  708. if (!flag)
  709. return ERR_NOT_ERASED;
  710. /* Disable interrupts which might cause a timeout here */
  711. flag = disable_interrupts ();
  712. switch (info->vendor) {
  713. case CFI_CMDSET_INTEL_PROG_REGIONS:
  714. case CFI_CMDSET_INTEL_EXTENDED:
  715. case CFI_CMDSET_INTEL_STANDARD:
  716. flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
  717. flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
  718. break;
  719. case CFI_CMDSET_AMD_EXTENDED:
  720. case CFI_CMDSET_AMD_STANDARD:
  721. sect = find_sector(info, dest);
  722. flash_unlock_seq (info, sect);
  723. flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
  724. sect_found = 1;
  725. break;
  726. #ifdef CONFIG_FLASH_CFI_LEGACY
  727. case CFI_CMDSET_AMD_LEGACY:
  728. sect = find_sector(info, dest);
  729. flash_unlock_seq (info, 0);
  730. flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
  731. sect_found = 1;
  732. break;
  733. #endif
  734. }
  735. switch (info->portwidth) {
  736. case FLASH_CFI_8BIT:
  737. flash_write8(cword.c, dstaddr);
  738. break;
  739. case FLASH_CFI_16BIT:
  740. flash_write16(cword.w, dstaddr);
  741. break;
  742. case FLASH_CFI_32BIT:
  743. flash_write32(cword.l, dstaddr);
  744. break;
  745. case FLASH_CFI_64BIT:
  746. flash_write64(cword.ll, dstaddr);
  747. break;
  748. }
  749. /* re-enable interrupts if necessary */
  750. if (flag)
  751. enable_interrupts ();
  752. if (!sect_found)
  753. sect = find_sector (info, dest);
  754. if (use_flash_status_poll(info))
  755. return flash_status_poll(info, &cword, dstaddr,
  756. info->write_tout, "write");
  757. else
  758. return flash_full_status_check(info, sect,
  759. info->write_tout, "write");
  760. }
  761. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  762. static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
  763. int len)
  764. {
  765. flash_sect_t sector;
  766. int cnt;
  767. int retcode;
  768. void *src = cp;
  769. void *dst = (void *)dest;
  770. void *dst2 = dst;
  771. int flag = 0;
  772. uint offset = 0;
  773. unsigned int shift;
  774. uchar write_cmd;
  775. switch (info->portwidth) {
  776. case FLASH_CFI_8BIT:
  777. shift = 0;
  778. break;
  779. case FLASH_CFI_16BIT:
  780. shift = 1;
  781. break;
  782. case FLASH_CFI_32BIT:
  783. shift = 2;
  784. break;
  785. case FLASH_CFI_64BIT:
  786. shift = 3;
  787. break;
  788. default:
  789. retcode = ERR_INVAL;
  790. goto out_unmap;
  791. }
  792. cnt = len >> shift;
  793. while ((cnt-- > 0) && (flag == 0)) {
  794. switch (info->portwidth) {
  795. case FLASH_CFI_8BIT:
  796. flag = ((flash_read8(dst2) & flash_read8(src)) ==
  797. flash_read8(src));
  798. src += 1, dst2 += 1;
  799. break;
  800. case FLASH_CFI_16BIT:
  801. flag = ((flash_read16(dst2) & flash_read16(src)) ==
  802. flash_read16(src));
  803. src += 2, dst2 += 2;
  804. break;
  805. case FLASH_CFI_32BIT:
  806. flag = ((flash_read32(dst2) & flash_read32(src)) ==
  807. flash_read32(src));
  808. src += 4, dst2 += 4;
  809. break;
  810. case FLASH_CFI_64BIT:
  811. flag = ((flash_read64(dst2) & flash_read64(src)) ==
  812. flash_read64(src));
  813. src += 8, dst2 += 8;
  814. break;
  815. }
  816. }
  817. if (!flag) {
  818. retcode = ERR_NOT_ERASED;
  819. goto out_unmap;
  820. }
  821. src = cp;
  822. sector = find_sector (info, dest);
  823. switch (info->vendor) {
  824. case CFI_CMDSET_INTEL_PROG_REGIONS:
  825. case CFI_CMDSET_INTEL_STANDARD:
  826. case CFI_CMDSET_INTEL_EXTENDED:
  827. write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
  828. FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
  829. flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  830. flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
  831. flash_write_cmd (info, sector, 0, write_cmd);
  832. retcode = flash_status_check (info, sector,
  833. info->buffer_write_tout,
  834. "write to buffer");
  835. if (retcode == ERR_OK) {
  836. /* reduce the number of loops by the width of
  837. * the port */
  838. cnt = len >> shift;
  839. flash_write_cmd (info, sector, 0, cnt - 1);
  840. while (cnt-- > 0) {
  841. switch (info->portwidth) {
  842. case FLASH_CFI_8BIT:
  843. flash_write8(flash_read8(src), dst);
  844. src += 1, dst += 1;
  845. break;
  846. case FLASH_CFI_16BIT:
  847. flash_write16(flash_read16(src), dst);
  848. src += 2, dst += 2;
  849. break;
  850. case FLASH_CFI_32BIT:
  851. flash_write32(flash_read32(src), dst);
  852. src += 4, dst += 4;
  853. break;
  854. case FLASH_CFI_64BIT:
  855. flash_write64(flash_read64(src), dst);
  856. src += 8, dst += 8;
  857. break;
  858. default:
  859. retcode = ERR_INVAL;
  860. goto out_unmap;
  861. }
  862. }
  863. flash_write_cmd (info, sector, 0,
  864. FLASH_CMD_WRITE_BUFFER_CONFIRM);
  865. retcode = flash_full_status_check (
  866. info, sector, info->buffer_write_tout,
  867. "buffer write");
  868. }
  869. break;
  870. case CFI_CMDSET_AMD_STANDARD:
  871. case CFI_CMDSET_AMD_EXTENDED:
  872. flash_unlock_seq(info,0);
  873. #ifdef CONFIG_FLASH_SPANSION_S29WS_N
  874. offset = ((unsigned long)dst - info->start[sector]) >> shift;
  875. #endif
  876. flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
  877. cnt = len >> shift;
  878. flash_write_cmd(info, sector, offset, cnt - 1);
  879. switch (info->portwidth) {
  880. case FLASH_CFI_8BIT:
  881. while (cnt-- > 0) {
  882. flash_write8(flash_read8(src), dst);
  883. src += 1, dst += 1;
  884. }
  885. break;
  886. case FLASH_CFI_16BIT:
  887. while (cnt-- > 0) {
  888. flash_write16(flash_read16(src), dst);
  889. src += 2, dst += 2;
  890. }
  891. break;
  892. case FLASH_CFI_32BIT:
  893. while (cnt-- > 0) {
  894. flash_write32(flash_read32(src), dst);
  895. src += 4, dst += 4;
  896. }
  897. break;
  898. case FLASH_CFI_64BIT:
  899. while (cnt-- > 0) {
  900. flash_write64(flash_read64(src), dst);
  901. src += 8, dst += 8;
  902. }
  903. break;
  904. default:
  905. retcode = ERR_INVAL;
  906. goto out_unmap;
  907. }
  908. flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
  909. if (use_flash_status_poll(info))
  910. retcode = flash_status_poll(info, src - (1 << shift),
  911. dst - (1 << shift),
  912. info->buffer_write_tout,
  913. "buffer write");
  914. else
  915. retcode = flash_full_status_check(info, sector,
  916. info->buffer_write_tout,
  917. "buffer write");
  918. break;
  919. default:
  920. debug ("Unknown Command Set\n");
  921. retcode = ERR_INVAL;
  922. break;
  923. }
  924. out_unmap:
  925. return retcode;
  926. }
  927. #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
  928. /*-----------------------------------------------------------------------
  929. */
  930. int flash_erase (flash_info_t * info, int s_first, int s_last)
  931. {
  932. int rcode = 0;
  933. int prot;
  934. flash_sect_t sect;
  935. int st;
  936. if (info->flash_id != FLASH_MAN_CFI) {
  937. puts ("Can't erase unknown flash type - aborted\n");
  938. return 1;
  939. }
  940. if ((s_first < 0) || (s_first > s_last)) {
  941. puts ("- no sectors to erase\n");
  942. return 1;
  943. }
  944. prot = 0;
  945. for (sect = s_first; sect <= s_last; ++sect) {
  946. if (info->protect[sect]) {
  947. prot++;
  948. }
  949. }
  950. if (prot) {
  951. printf ("- Warning: %d protected sectors will not be erased!\n",
  952. prot);
  953. } else if (flash_verbose) {
  954. putc ('\n');
  955. }
  956. for (sect = s_first; sect <= s_last; sect++) {
  957. if (info->protect[sect] == 0) { /* not protected */
  958. switch (info->vendor) {
  959. case CFI_CMDSET_INTEL_PROG_REGIONS:
  960. case CFI_CMDSET_INTEL_STANDARD:
  961. case CFI_CMDSET_INTEL_EXTENDED:
  962. flash_write_cmd (info, sect, 0,
  963. FLASH_CMD_CLEAR_STATUS);
  964. flash_write_cmd (info, sect, 0,
  965. FLASH_CMD_BLOCK_ERASE);
  966. flash_write_cmd (info, sect, 0,
  967. FLASH_CMD_ERASE_CONFIRM);
  968. break;
  969. case CFI_CMDSET_AMD_STANDARD:
  970. case CFI_CMDSET_AMD_EXTENDED:
  971. flash_unlock_seq (info, sect);
  972. flash_write_cmd (info, sect,
  973. info->addr_unlock1,
  974. AMD_CMD_ERASE_START);
  975. flash_unlock_seq (info, sect);
  976. flash_write_cmd (info, sect, 0,
  977. AMD_CMD_ERASE_SECTOR);
  978. break;
  979. #ifdef CONFIG_FLASH_CFI_LEGACY
  980. case CFI_CMDSET_AMD_LEGACY:
  981. flash_unlock_seq (info, 0);
  982. flash_write_cmd (info, 0, info->addr_unlock1,
  983. AMD_CMD_ERASE_START);
  984. flash_unlock_seq (info, 0);
  985. flash_write_cmd (info, sect, 0,
  986. AMD_CMD_ERASE_SECTOR);
  987. break;
  988. #endif
  989. default:
  990. debug ("Unkown flash vendor %d\n",
  991. info->vendor);
  992. break;
  993. }
  994. if (use_flash_status_poll(info)) {
  995. cfiword_t cword = (cfiword_t)0xffffffffffffffffULL;
  996. void *dest;
  997. dest = flash_map(info, sect, 0);
  998. st = flash_status_poll(info, &cword, dest,
  999. info->erase_blk_tout, "erase");
  1000. flash_unmap(info, sect, 0, dest);
  1001. } else
  1002. st = flash_full_status_check(info, sect,
  1003. info->erase_blk_tout,
  1004. "erase");
  1005. if (st)
  1006. rcode = 1;
  1007. else if (flash_verbose)
  1008. putc ('.');
  1009. }
  1010. }
  1011. if (flash_verbose)
  1012. puts (" done\n");
  1013. return rcode;
  1014. }
  1015. #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
  1016. static int sector_erased(flash_info_t *info, int i)
  1017. {
  1018. int k;
  1019. int size;
  1020. u32 *flash;
  1021. /*
  1022. * Check if whole sector is erased
  1023. */
  1024. size = flash_sector_size(info, i);
  1025. flash = (u32 *)info->start[i];
  1026. /* divide by 4 for longword access */
  1027. size = size >> 2;
  1028. for (k = 0; k < size; k++) {
  1029. if (flash_read32(flash++) != 0xffffffff)
  1030. return 0; /* not erased */
  1031. }
  1032. return 1; /* erased */
  1033. }
  1034. #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
  1035. void flash_print_info (flash_info_t * info)
  1036. {
  1037. int i;
  1038. if (info->flash_id != FLASH_MAN_CFI) {
  1039. puts ("missing or unknown FLASH type\n");
  1040. return;
  1041. }
  1042. printf ("%s FLASH (%d x %d)",
  1043. info->name,
  1044. (info->portwidth << 3), (info->chipwidth << 3));
  1045. if (info->size < 1024*1024)
  1046. printf (" Size: %ld kB in %d Sectors\n",
  1047. info->size >> 10, info->sector_count);
  1048. else
  1049. printf (" Size: %ld MB in %d Sectors\n",
  1050. info->size >> 20, info->sector_count);
  1051. printf (" ");
  1052. switch (info->vendor) {
  1053. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1054. printf ("Intel Prog Regions");
  1055. break;
  1056. case CFI_CMDSET_INTEL_STANDARD:
  1057. printf ("Intel Standard");
  1058. break;
  1059. case CFI_CMDSET_INTEL_EXTENDED:
  1060. printf ("Intel Extended");
  1061. break;
  1062. case CFI_CMDSET_AMD_STANDARD:
  1063. printf ("AMD Standard");
  1064. break;
  1065. case CFI_CMDSET_AMD_EXTENDED:
  1066. printf ("AMD Extended");
  1067. break;
  1068. #ifdef CONFIG_FLASH_CFI_LEGACY
  1069. case CFI_CMDSET_AMD_LEGACY:
  1070. printf ("AMD Legacy");
  1071. break;
  1072. #endif
  1073. default:
  1074. printf ("Unknown (%d)", info->vendor);
  1075. break;
  1076. }
  1077. printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
  1078. info->manufacturer_id);
  1079. printf (info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
  1080. info->device_id);
  1081. if (info->device_id == 0x7E) {
  1082. printf("%04X", info->device_id2);
  1083. }
  1084. printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
  1085. info->erase_blk_tout,
  1086. info->write_tout);
  1087. if (info->buffer_size > 1) {
  1088. printf (" Buffer write timeout: %ld ms, "
  1089. "buffer size: %d bytes\n",
  1090. info->buffer_write_tout,
  1091. info->buffer_size);
  1092. }
  1093. puts ("\n Sector Start Addresses:");
  1094. for (i = 0; i < info->sector_count; ++i) {
  1095. if (ctrlc())
  1096. break;
  1097. if ((i % 5) == 0)
  1098. putc('\n');
  1099. #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
  1100. /* print empty and read-only info */
  1101. printf (" %08lX %c %s ",
  1102. info->start[i],
  1103. sector_erased(info, i) ? 'E' : ' ',
  1104. info->protect[i] ? "RO" : " ");
  1105. #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
  1106. printf (" %08lX %s ",
  1107. info->start[i],
  1108. info->protect[i] ? "RO" : " ");
  1109. #endif
  1110. }
  1111. putc ('\n');
  1112. return;
  1113. }
  1114. /*-----------------------------------------------------------------------
  1115. * This is used in a few places in write_buf() to show programming
  1116. * progress. Making it a function is nasty because it needs to do side
  1117. * effect updates to digit and dots. Repeated code is nasty too, so
  1118. * we define it once here.
  1119. */
  1120. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1121. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
  1122. if (flash_verbose) { \
  1123. dots -= dots_sub; \
  1124. if ((scale > 0) && (dots <= 0)) { \
  1125. if ((digit % 5) == 0) \
  1126. printf ("%d", digit / 5); \
  1127. else \
  1128. putc ('.'); \
  1129. digit--; \
  1130. dots += scale; \
  1131. } \
  1132. }
  1133. #else
  1134. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
  1135. #endif
  1136. /*-----------------------------------------------------------------------
  1137. * Copy memory to flash, returns:
  1138. * 0 - OK
  1139. * 1 - write timeout
  1140. * 2 - Flash not erased
  1141. */
  1142. int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
  1143. {
  1144. ulong wp;
  1145. uchar *p;
  1146. int aln;
  1147. cfiword_t cword;
  1148. int i, rc;
  1149. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  1150. int buffered_size;
  1151. #endif
  1152. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1153. int digit = CONFIG_FLASH_SHOW_PROGRESS;
  1154. int scale = 0;
  1155. int dots = 0;
  1156. /*
  1157. * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
  1158. */
  1159. if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
  1160. scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
  1161. CONFIG_FLASH_SHOW_PROGRESS);
  1162. }
  1163. #endif
  1164. /* get lower aligned address */
  1165. wp = (addr & ~(info->portwidth - 1));
  1166. /* handle unaligned start */
  1167. if ((aln = addr - wp) != 0) {
  1168. cword.l = 0;
  1169. p = (uchar *)wp;
  1170. for (i = 0; i < aln; ++i)
  1171. flash_add_byte (info, &cword, flash_read8(p + i));
  1172. for (; (i < info->portwidth) && (cnt > 0); i++) {
  1173. flash_add_byte (info, &cword, *src++);
  1174. cnt--;
  1175. }
  1176. for (; (cnt == 0) && (i < info->portwidth); ++i)
  1177. flash_add_byte (info, &cword, flash_read8(p + i));
  1178. rc = flash_write_cfiword (info, wp, cword);
  1179. if (rc != 0)
  1180. return rc;
  1181. wp += i;
  1182. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1183. }
  1184. /* handle the aligned part */
  1185. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  1186. buffered_size = (info->portwidth / info->chipwidth);
  1187. buffered_size *= info->buffer_size;
  1188. while (cnt >= info->portwidth) {
  1189. /* prohibit buffer write when buffer_size is 1 */
  1190. if (info->buffer_size == 1) {
  1191. cword.l = 0;
  1192. for (i = 0; i < info->portwidth; i++)
  1193. flash_add_byte (info, &cword, *src++);
  1194. if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
  1195. return rc;
  1196. wp += info->portwidth;
  1197. cnt -= info->portwidth;
  1198. continue;
  1199. }
  1200. /* write buffer until next buffered_size aligned boundary */
  1201. i = buffered_size - (wp % buffered_size);
  1202. if (i > cnt)
  1203. i = cnt;
  1204. if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
  1205. return rc;
  1206. i -= i & (info->portwidth - 1);
  1207. wp += i;
  1208. src += i;
  1209. cnt -= i;
  1210. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1211. }
  1212. #else
  1213. while (cnt >= info->portwidth) {
  1214. cword.l = 0;
  1215. for (i = 0; i < info->portwidth; i++) {
  1216. flash_add_byte (info, &cword, *src++);
  1217. }
  1218. if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
  1219. return rc;
  1220. wp += info->portwidth;
  1221. cnt -= info->portwidth;
  1222. FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
  1223. }
  1224. #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
  1225. if (cnt == 0) {
  1226. return (0);
  1227. }
  1228. /*
  1229. * handle unaligned tail bytes
  1230. */
  1231. cword.l = 0;
  1232. p = (uchar *)wp;
  1233. for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
  1234. flash_add_byte (info, &cword, *src++);
  1235. --cnt;
  1236. }
  1237. for (; i < info->portwidth; ++i)
  1238. flash_add_byte (info, &cword, flash_read8(p + i));
  1239. return flash_write_cfiword (info, wp, cword);
  1240. }
  1241. /*-----------------------------------------------------------------------
  1242. */
  1243. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1244. int flash_real_protect (flash_info_t * info, long sector, int prot)
  1245. {
  1246. int retcode = 0;
  1247. switch (info->vendor) {
  1248. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1249. case CFI_CMDSET_INTEL_STANDARD:
  1250. case CFI_CMDSET_INTEL_EXTENDED:
  1251. /*
  1252. * see errata called
  1253. * "Numonyx Axcell P33/P30 Specification Update" :)
  1254. */
  1255. flash_write_cmd (info, sector, 0, FLASH_CMD_READ_ID);
  1256. if (!flash_isequal (info, sector, FLASH_OFFSET_PROTECT,
  1257. prot)) {
  1258. /*
  1259. * cmd must come before FLASH_CMD_PROTECT + 20us
  1260. * Disable interrupts which might cause a timeout here.
  1261. */
  1262. int flag = disable_interrupts ();
  1263. unsigned short cmd;
  1264. if (prot)
  1265. cmd = FLASH_CMD_PROTECT_SET;
  1266. else
  1267. cmd = FLASH_CMD_PROTECT_CLEAR;
  1268. flash_write_cmd (info, sector, 0,
  1269. FLASH_CMD_PROTECT);
  1270. flash_write_cmd (info, sector, 0, cmd);
  1271. /* re-enable interrupts if necessary */
  1272. if (flag)
  1273. enable_interrupts ();
  1274. }
  1275. break;
  1276. case CFI_CMDSET_AMD_EXTENDED:
  1277. case CFI_CMDSET_AMD_STANDARD:
  1278. /* U-Boot only checks the first byte */
  1279. if (info->manufacturer_id == (uchar)ATM_MANUFACT) {
  1280. if (prot) {
  1281. flash_unlock_seq (info, 0);
  1282. flash_write_cmd (info, 0,
  1283. info->addr_unlock1,
  1284. ATM_CMD_SOFTLOCK_START);
  1285. flash_unlock_seq (info, 0);
  1286. flash_write_cmd (info, sector, 0,
  1287. ATM_CMD_LOCK_SECT);
  1288. } else {
  1289. flash_write_cmd (info, 0,
  1290. info->addr_unlock1,
  1291. AMD_CMD_UNLOCK_START);
  1292. if (info->device_id == ATM_ID_BV6416)
  1293. flash_write_cmd (info, sector,
  1294. 0, ATM_CMD_UNLOCK_SECT);
  1295. }
  1296. }
  1297. break;
  1298. #ifdef CONFIG_FLASH_CFI_LEGACY
  1299. case CFI_CMDSET_AMD_LEGACY:
  1300. flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  1301. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
  1302. if (prot)
  1303. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
  1304. else
  1305. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
  1306. #endif
  1307. };
  1308. /*
  1309. * Flash needs to be in status register read mode for
  1310. * flash_full_status_check() to work correctly
  1311. */
  1312. flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
  1313. if ((retcode =
  1314. flash_full_status_check (info, sector, info->erase_blk_tout,
  1315. prot ? "protect" : "unprotect")) == 0) {
  1316. info->protect[sector] = prot;
  1317. /*
  1318. * On some of Intel's flash chips (marked via legacy_unlock)
  1319. * unprotect unprotects all locking.
  1320. */
  1321. if ((prot == 0) && (info->legacy_unlock)) {
  1322. flash_sect_t i;
  1323. for (i = 0; i < info->sector_count; i++) {
  1324. if (info->protect[i])
  1325. flash_real_protect (info, i, 1);
  1326. }
  1327. }
  1328. }
  1329. return retcode;
  1330. }
  1331. /*-----------------------------------------------------------------------
  1332. * flash_read_user_serial - read the OneTimeProgramming cells
  1333. */
  1334. void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
  1335. int len)
  1336. {
  1337. uchar *src;
  1338. uchar *dst;
  1339. dst = buffer;
  1340. src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
  1341. flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
  1342. memcpy (dst, src + offset, len);
  1343. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1344. flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
  1345. }
  1346. /*
  1347. * flash_read_factory_serial - read the device Id from the protection area
  1348. */
  1349. void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
  1350. int len)
  1351. {
  1352. uchar *src;
  1353. src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
  1354. flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
  1355. memcpy (buffer, src + offset, len);
  1356. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1357. flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
  1358. }
  1359. #endif /* CONFIG_SYS_FLASH_PROTECTION */
  1360. /*-----------------------------------------------------------------------
  1361. * Reverse the order of the erase regions in the CFI QRY structure.
  1362. * This is needed for chips that are either a) correctly detected as
  1363. * top-boot, or b) buggy.
  1364. */
  1365. static void cfi_reverse_geometry(struct cfi_qry *qry)
  1366. {
  1367. unsigned int i, j;
  1368. u32 tmp;
  1369. for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
  1370. tmp = qry->erase_region_info[i];
  1371. qry->erase_region_info[i] = qry->erase_region_info[j];
  1372. qry->erase_region_info[j] = tmp;
  1373. }
  1374. }
  1375. /*-----------------------------------------------------------------------
  1376. * read jedec ids from device and set corresponding fields in info struct
  1377. *
  1378. * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
  1379. *
  1380. */
  1381. static void cmdset_intel_read_jedec_ids(flash_info_t *info)
  1382. {
  1383. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1384. flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
  1385. udelay(1000); /* some flash are slow to respond */
  1386. info->manufacturer_id = flash_read_uchar (info,
  1387. FLASH_OFFSET_MANUFACTURER_ID);
  1388. info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
  1389. flash_read_word (info, FLASH_OFFSET_DEVICE_ID) :
  1390. flash_read_uchar (info, FLASH_OFFSET_DEVICE_ID);
  1391. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1392. }
  1393. static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
  1394. {
  1395. info->cmd_reset = FLASH_CMD_RESET;
  1396. cmdset_intel_read_jedec_ids(info);
  1397. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1398. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1399. /* read legacy lock/unlock bit from intel flash */
  1400. if (info->ext_addr) {
  1401. info->legacy_unlock = flash_read_uchar (info,
  1402. info->ext_addr + 5) & 0x08;
  1403. }
  1404. #endif
  1405. return 0;
  1406. }
  1407. static void cmdset_amd_read_jedec_ids(flash_info_t *info)
  1408. {
  1409. ushort bankId = 0;
  1410. uchar manuId;
  1411. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1412. flash_unlock_seq(info, 0);
  1413. flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
  1414. udelay(1000); /* some flash are slow to respond */
  1415. manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID);
  1416. /* JEDEC JEP106Z specifies ID codes up to bank 7 */
  1417. while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
  1418. bankId += 0x100;
  1419. manuId = flash_read_uchar (info,
  1420. bankId | FLASH_OFFSET_MANUFACTURER_ID);
  1421. }
  1422. info->manufacturer_id = manuId;
  1423. switch (info->chipwidth){
  1424. case FLASH_CFI_8BIT:
  1425. info->device_id = flash_read_uchar (info,
  1426. FLASH_OFFSET_DEVICE_ID);
  1427. if (info->device_id == 0x7E) {
  1428. /* AMD 3-byte (expanded) device ids */
  1429. info->device_id2 = flash_read_uchar (info,
  1430. FLASH_OFFSET_DEVICE_ID2);
  1431. info->device_id2 <<= 8;
  1432. info->device_id2 |= flash_read_uchar (info,
  1433. FLASH_OFFSET_DEVICE_ID3);
  1434. }
  1435. break;
  1436. case FLASH_CFI_16BIT:
  1437. info->device_id = flash_read_word (info,
  1438. FLASH_OFFSET_DEVICE_ID);
  1439. break;
  1440. default:
  1441. break;
  1442. }
  1443. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1444. }
  1445. static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
  1446. {
  1447. info->cmd_reset = AMD_CMD_RESET;
  1448. cmdset_amd_read_jedec_ids(info);
  1449. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1450. return 0;
  1451. }
  1452. #ifdef CONFIG_FLASH_CFI_LEGACY
  1453. static void flash_read_jedec_ids (flash_info_t * info)
  1454. {
  1455. info->manufacturer_id = 0;
  1456. info->device_id = 0;
  1457. info->device_id2 = 0;
  1458. switch (info->vendor) {
  1459. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1460. case CFI_CMDSET_INTEL_STANDARD:
  1461. case CFI_CMDSET_INTEL_EXTENDED:
  1462. cmdset_intel_read_jedec_ids(info);
  1463. break;
  1464. case CFI_CMDSET_AMD_STANDARD:
  1465. case CFI_CMDSET_AMD_EXTENDED:
  1466. cmdset_amd_read_jedec_ids(info);
  1467. break;
  1468. default:
  1469. break;
  1470. }
  1471. }
  1472. /*-----------------------------------------------------------------------
  1473. * Call board code to request info about non-CFI flash.
  1474. * board_flash_get_legacy needs to fill in at least:
  1475. * info->portwidth, info->chipwidth and info->interface for Jedec probing.
  1476. */
  1477. static int flash_detect_legacy(phys_addr_t base, int banknum)
  1478. {
  1479. flash_info_t *info = &flash_info[banknum];
  1480. if (board_flash_get_legacy(base, banknum, info)) {
  1481. /* board code may have filled info completely. If not, we
  1482. use JEDEC ID probing. */
  1483. if (!info->vendor) {
  1484. int modes[] = {
  1485. CFI_CMDSET_AMD_STANDARD,
  1486. CFI_CMDSET_INTEL_STANDARD
  1487. };
  1488. int i;
  1489. for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
  1490. info->vendor = modes[i];
  1491. info->start[0] =
  1492. (ulong)map_physmem(base,
  1493. info->portwidth,
  1494. MAP_NOCACHE);
  1495. if (info->portwidth == FLASH_CFI_8BIT
  1496. && info->interface == FLASH_CFI_X8X16) {
  1497. info->addr_unlock1 = 0x2AAA;
  1498. info->addr_unlock2 = 0x5555;
  1499. } else {
  1500. info->addr_unlock1 = 0x5555;
  1501. info->addr_unlock2 = 0x2AAA;
  1502. }
  1503. flash_read_jedec_ids(info);
  1504. debug("JEDEC PROBE: ID %x %x %x\n",
  1505. info->manufacturer_id,
  1506. info->device_id,
  1507. info->device_id2);
  1508. if (jedec_flash_match(info, info->start[0]))
  1509. break;
  1510. else
  1511. unmap_physmem((void *)info->start[0],
  1512. MAP_NOCACHE);
  1513. }
  1514. }
  1515. switch(info->vendor) {
  1516. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1517. case CFI_CMDSET_INTEL_STANDARD:
  1518. case CFI_CMDSET_INTEL_EXTENDED:
  1519. info->cmd_reset = FLASH_CMD_RESET;
  1520. break;
  1521. case CFI_CMDSET_AMD_STANDARD:
  1522. case CFI_CMDSET_AMD_EXTENDED:
  1523. case CFI_CMDSET_AMD_LEGACY:
  1524. info->cmd_reset = AMD_CMD_RESET;
  1525. break;
  1526. }
  1527. info->flash_id = FLASH_MAN_CFI;
  1528. return 1;
  1529. }
  1530. return 0; /* use CFI */
  1531. }
  1532. #else
  1533. static inline int flash_detect_legacy(phys_addr_t base, int banknum)
  1534. {
  1535. return 0; /* use CFI */
  1536. }
  1537. #endif
  1538. /*-----------------------------------------------------------------------
  1539. * detect if flash is compatible with the Common Flash Interface (CFI)
  1540. * http://www.jedec.org/download/search/jesd68.pdf
  1541. */
  1542. static void flash_read_cfi (flash_info_t *info, void *buf,
  1543. unsigned int start, size_t len)
  1544. {
  1545. u8 *p = buf;
  1546. unsigned int i;
  1547. for (i = 0; i < len; i++)
  1548. p[i] = flash_read_uchar(info, start + i);
  1549. }
  1550. void __flash_cmd_reset(flash_info_t *info)
  1551. {
  1552. /*
  1553. * We do not yet know what kind of commandset to use, so we issue
  1554. * the reset command in both Intel and AMD variants, in the hope
  1555. * that AMD flash roms ignore the Intel command.
  1556. */
  1557. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1558. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1559. }
  1560. void flash_cmd_reset(flash_info_t *info)
  1561. __attribute__((weak,alias("__flash_cmd_reset")));
  1562. static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
  1563. {
  1564. int cfi_offset;
  1565. /* Issue FLASH reset command */
  1566. flash_cmd_reset(info);
  1567. for (cfi_offset=0;
  1568. cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
  1569. cfi_offset++) {
  1570. flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
  1571. FLASH_CMD_CFI);
  1572. if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
  1573. && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
  1574. && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
  1575. flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
  1576. sizeof(struct cfi_qry));
  1577. info->interface = le16_to_cpu(qry->interface_desc);
  1578. info->cfi_offset = flash_offset_cfi[cfi_offset];
  1579. debug ("device interface is %d\n",
  1580. info->interface);
  1581. debug ("found port %d chip %d ",
  1582. info->portwidth, info->chipwidth);
  1583. debug ("port %d bits chip %d bits\n",
  1584. info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1585. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1586. /* calculate command offsets as in the Linux driver */
  1587. info->addr_unlock1 = 0x555;
  1588. info->addr_unlock2 = 0x2aa;
  1589. /*
  1590. * modify the unlock address if we are
  1591. * in compatibility mode
  1592. */
  1593. if ( /* x8/x16 in x8 mode */
  1594. ((info->chipwidth == FLASH_CFI_BY8) &&
  1595. (info->interface == FLASH_CFI_X8X16)) ||
  1596. /* x16/x32 in x16 mode */
  1597. ((info->chipwidth == FLASH_CFI_BY16) &&
  1598. (info->interface == FLASH_CFI_X16X32)))
  1599. {
  1600. info->addr_unlock1 = 0xaaa;
  1601. info->addr_unlock2 = 0x555;
  1602. }
  1603. info->name = "CFI conformant";
  1604. return 1;
  1605. }
  1606. }
  1607. return 0;
  1608. }
  1609. static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
  1610. {
  1611. debug ("flash detect cfi\n");
  1612. for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
  1613. info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
  1614. for (info->chipwidth = FLASH_CFI_BY8;
  1615. info->chipwidth <= info->portwidth;
  1616. info->chipwidth <<= 1)
  1617. if (__flash_detect_cfi(info, qry))
  1618. return 1;
  1619. }
  1620. debug ("not found\n");
  1621. return 0;
  1622. }
  1623. /*
  1624. * Manufacturer-specific quirks. Add workarounds for geometry
  1625. * reversal, etc. here.
  1626. */
  1627. static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
  1628. {
  1629. /* check if flash geometry needs reversal */
  1630. if (qry->num_erase_regions > 1) {
  1631. /* reverse geometry if top boot part */
  1632. if (info->cfi_version < 0x3131) {
  1633. /* CFI < 1.1, try to guess from device id */
  1634. if ((info->device_id & 0x80) != 0)
  1635. cfi_reverse_geometry(qry);
  1636. } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
  1637. /* CFI >= 1.1, deduct from top/bottom flag */
  1638. /* note: ext_addr is valid since cfi_version > 0 */
  1639. cfi_reverse_geometry(qry);
  1640. }
  1641. }
  1642. }
  1643. static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
  1644. {
  1645. int reverse_geometry = 0;
  1646. /* Check the "top boot" bit in the PRI */
  1647. if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
  1648. reverse_geometry = 1;
  1649. /* AT49BV6416(T) list the erase regions in the wrong order.
  1650. * However, the device ID is identical with the non-broken
  1651. * AT49BV642D they differ in the high byte.
  1652. */
  1653. if (info->device_id == 0xd6 || info->device_id == 0xd2)
  1654. reverse_geometry = !reverse_geometry;
  1655. if (reverse_geometry)
  1656. cfi_reverse_geometry(qry);
  1657. }
  1658. static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
  1659. {
  1660. /* check if flash geometry needs reversal */
  1661. if (qry->num_erase_regions > 1) {
  1662. /* reverse geometry if top boot part */
  1663. if (info->cfi_version < 0x3131) {
  1664. /* CFI < 1.1, guess by device id (M29W320{DT,ET} only) */
  1665. if (info->device_id == 0x22CA ||
  1666. info->device_id == 0x2256) {
  1667. cfi_reverse_geometry(qry);
  1668. }
  1669. }
  1670. }
  1671. }
  1672. /*
  1673. * The following code cannot be run from FLASH!
  1674. *
  1675. */
  1676. ulong flash_get_size (phys_addr_t base, int banknum)
  1677. {
  1678. flash_info_t *info = &flash_info[banknum];
  1679. int i, j;
  1680. flash_sect_t sect_cnt;
  1681. phys_addr_t sector;
  1682. unsigned long tmp;
  1683. int size_ratio;
  1684. uchar num_erase_regions;
  1685. int erase_region_size;
  1686. int erase_region_count;
  1687. struct cfi_qry qry;
  1688. unsigned long max_size;
  1689. memset(&qry, 0, sizeof(qry));
  1690. info->ext_addr = 0;
  1691. info->cfi_version = 0;
  1692. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1693. info->legacy_unlock = 0;
  1694. #endif
  1695. info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
  1696. if (flash_detect_cfi (info, &qry)) {
  1697. info->vendor = le16_to_cpu(qry.p_id);
  1698. info->ext_addr = le16_to_cpu(qry.p_adr);
  1699. num_erase_regions = qry.num_erase_regions;
  1700. if (info->ext_addr) {
  1701. info->cfi_version = (ushort) flash_read_uchar (info,
  1702. info->ext_addr + 3) << 8;
  1703. info->cfi_version |= (ushort) flash_read_uchar (info,
  1704. info->ext_addr + 4);
  1705. }
  1706. #ifdef DEBUG
  1707. flash_printqry (&qry);
  1708. #endif
  1709. switch (info->vendor) {
  1710. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1711. case CFI_CMDSET_INTEL_STANDARD:
  1712. case CFI_CMDSET_INTEL_EXTENDED:
  1713. cmdset_intel_init(info, &qry);
  1714. break;
  1715. case CFI_CMDSET_AMD_STANDARD:
  1716. case CFI_CMDSET_AMD_EXTENDED:
  1717. cmdset_amd_init(info, &qry);
  1718. break;
  1719. default:
  1720. printf("CFI: Unknown command set 0x%x\n",
  1721. info->vendor);
  1722. /*
  1723. * Unfortunately, this means we don't know how
  1724. * to get the chip back to Read mode. Might
  1725. * as well try an Intel-style reset...
  1726. */
  1727. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1728. return 0;
  1729. }
  1730. /* Do manufacturer-specific fixups */
  1731. switch (info->manufacturer_id) {
  1732. case 0x0001:
  1733. flash_fixup_amd(info, &qry);
  1734. break;
  1735. case 0x001f:
  1736. flash_fixup_atmel(info, &qry);
  1737. break;
  1738. case 0x0020:
  1739. flash_fixup_stm(info, &qry);
  1740. break;
  1741. }
  1742. debug ("manufacturer is %d\n", info->vendor);
  1743. debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
  1744. debug ("device id is 0x%x\n", info->device_id);
  1745. debug ("device id2 is 0x%x\n", info->device_id2);
  1746. debug ("cfi version is 0x%04x\n", info->cfi_version);
  1747. size_ratio = info->portwidth / info->chipwidth;
  1748. /* if the chip is x8/x16 reduce the ratio by half */
  1749. if ((info->interface == FLASH_CFI_X8X16)
  1750. && (info->chipwidth == FLASH_CFI_BY8)) {
  1751. size_ratio >>= 1;
  1752. }
  1753. debug ("size_ratio %d port %d bits chip %d bits\n",
  1754. size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1755. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1756. info->size = 1 << qry.dev_size;
  1757. /* multiply the size by the number of chips */
  1758. info->size *= size_ratio;
  1759. max_size = cfi_flash_bank_size(banknum);
  1760. if (max_size && (info->size > max_size)) {
  1761. debug("[truncated from %ldMiB]", info->size >> 20);
  1762. info->size = max_size;
  1763. }
  1764. debug ("found %d erase regions\n", num_erase_regions);
  1765. sect_cnt = 0;
  1766. sector = base;
  1767. for (i = 0; i < num_erase_regions; i++) {
  1768. if (i > NUM_ERASE_REGIONS) {
  1769. printf ("%d erase regions found, only %d used\n",
  1770. num_erase_regions, NUM_ERASE_REGIONS);
  1771. break;
  1772. }
  1773. tmp = le32_to_cpu(qry.erase_region_info[i]);
  1774. debug("erase region %u: 0x%08lx\n", i, tmp);
  1775. erase_region_count = (tmp & 0xffff) + 1;
  1776. tmp >>= 16;
  1777. erase_region_size =
  1778. (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
  1779. debug ("erase_region_count = %d erase_region_size = %d\n",
  1780. erase_region_count, erase_region_size);
  1781. for (j = 0; j < erase_region_count; j++) {
  1782. if (sector - base >= info->size)
  1783. break;
  1784. if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
  1785. printf("ERROR: too many flash sectors\n");
  1786. break;
  1787. }
  1788. info->start[sect_cnt] =
  1789. (ulong)map_physmem(sector,
  1790. info->portwidth,
  1791. MAP_NOCACHE);
  1792. sector += (erase_region_size * size_ratio);
  1793. /*
  1794. * Only read protection status from
  1795. * supported devices (intel...)
  1796. */
  1797. switch (info->vendor) {
  1798. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1799. case CFI_CMDSET_INTEL_EXTENDED:
  1800. case CFI_CMDSET_INTEL_STANDARD:
  1801. /*
  1802. * Set flash to read-id mode. Otherwise
  1803. * reading protected status is not
  1804. * guaranteed.
  1805. */
  1806. flash_write_cmd(info, sect_cnt, 0,
  1807. FLASH_CMD_READ_ID);
  1808. info->protect[sect_cnt] =
  1809. flash_isset (info, sect_cnt,
  1810. FLASH_OFFSET_PROTECT,
  1811. FLASH_STATUS_PROTECT);
  1812. break;
  1813. default:
  1814. /* default: not protected */
  1815. info->protect[sect_cnt] = 0;
  1816. }
  1817. sect_cnt++;
  1818. }
  1819. }
  1820. info->sector_count = sect_cnt;
  1821. info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
  1822. tmp = 1 << qry.block_erase_timeout_typ;
  1823. info->erase_blk_tout = tmp *
  1824. (1 << qry.block_erase_timeout_max);
  1825. tmp = (1 << qry.buf_write_timeout_typ) *
  1826. (1 << qry.buf_write_timeout_max);
  1827. /* round up when converting to ms */
  1828. info->buffer_write_tout = (tmp + 999) / 1000;
  1829. tmp = (1 << qry.word_write_timeout_typ) *
  1830. (1 << qry.word_write_timeout_max);
  1831. /* round up when converting to ms */
  1832. info->write_tout = (tmp + 999) / 1000;
  1833. info->flash_id = FLASH_MAN_CFI;
  1834. if ((info->interface == FLASH_CFI_X8X16) &&
  1835. (info->chipwidth == FLASH_CFI_BY8)) {
  1836. /* XXX - Need to test on x8/x16 in parallel. */
  1837. info->portwidth >>= 1;
  1838. }
  1839. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1840. }
  1841. return (info->size);
  1842. }
  1843. void flash_set_verbose(uint v)
  1844. {
  1845. flash_verbose = v;
  1846. }
  1847. static void cfi_flash_set_config_reg(u32 base, u16 val)
  1848. {
  1849. #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
  1850. /*
  1851. * Only set this config register if really defined
  1852. * to a valid value (0xffff is invalid)
  1853. */
  1854. if (val == 0xffff)
  1855. return;
  1856. /*
  1857. * Set configuration register. Data is "encrypted" in the 16 lower
  1858. * address bits.
  1859. */
  1860. flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
  1861. flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
  1862. /*
  1863. * Finally issue reset-command to bring device back to
  1864. * read-array mode
  1865. */
  1866. flash_write16(FLASH_CMD_RESET, (void *)base);
  1867. #endif
  1868. }
  1869. /*-----------------------------------------------------------------------
  1870. */
  1871. unsigned long flash_init (void)
  1872. {
  1873. unsigned long size = 0;
  1874. int i;
  1875. #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
  1876. struct apl_s {
  1877. ulong start;
  1878. ulong size;
  1879. } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
  1880. #endif
  1881. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1882. /* read environment from EEPROM */
  1883. char s[64];
  1884. getenv_f("unlock", s, sizeof(s));
  1885. #endif
  1886. /* Init: no FLASHes known */
  1887. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
  1888. flash_info[i].flash_id = FLASH_UNKNOWN;
  1889. /* Optionally write flash configuration register */
  1890. cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
  1891. cfi_flash_config_reg(i));
  1892. if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
  1893. flash_get_size(cfi_flash_bank_addr(i), i);
  1894. size += flash_info[i].size;
  1895. if (flash_info[i].flash_id == FLASH_UNKNOWN) {
  1896. #ifndef CONFIG_SYS_FLASH_QUIET_TEST
  1897. printf ("## Unknown FLASH on Bank %d "
  1898. "- Size = 0x%08lx = %ld MB\n",
  1899. i+1, flash_info[i].size,
  1900. flash_info[i].size >> 20);
  1901. #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
  1902. }
  1903. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1904. else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
  1905. /*
  1906. * Only the U-Boot image and it's environment
  1907. * is protected, all other sectors are
  1908. * unprotected (unlocked) if flash hardware
  1909. * protection is used (CONFIG_SYS_FLASH_PROTECTION)
  1910. * and the environment variable "unlock" is
  1911. * set to "yes".
  1912. */
  1913. if (flash_info[i].legacy_unlock) {
  1914. int k;
  1915. /*
  1916. * Disable legacy_unlock temporarily,
  1917. * since flash_real_protect would
  1918. * relock all other sectors again
  1919. * otherwise.
  1920. */
  1921. flash_info[i].legacy_unlock = 0;
  1922. /*
  1923. * Legacy unlocking (e.g. Intel J3) ->
  1924. * unlock only one sector. This will
  1925. * unlock all sectors.
  1926. */
  1927. flash_real_protect (&flash_info[i], 0, 0);
  1928. flash_info[i].legacy_unlock = 1;
  1929. /*
  1930. * Manually mark other sectors as
  1931. * unlocked (unprotected)
  1932. */
  1933. for (k = 1; k < flash_info[i].sector_count; k++)
  1934. flash_info[i].protect[k] = 0;
  1935. } else {
  1936. /*
  1937. * No legancy unlocking -> unlock all sectors
  1938. */
  1939. flash_protect (FLAG_PROTECT_CLEAR,
  1940. flash_info[i].start[0],
  1941. flash_info[i].start[0]
  1942. + flash_info[i].size - 1,
  1943. &flash_info[i]);
  1944. }
  1945. }
  1946. #endif /* CONFIG_SYS_FLASH_PROTECTION */
  1947. }
  1948. /* Monitor protection ON by default */
  1949. #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
  1950. (!defined(CONFIG_MONITOR_IS_IN_RAM))
  1951. flash_protect (FLAG_PROTECT_SET,
  1952. CONFIG_SYS_MONITOR_BASE,
  1953. CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
  1954. flash_get_info(CONFIG_SYS_MONITOR_BASE));
  1955. #endif
  1956. /* Environment protection ON by default */
  1957. #ifdef CONFIG_ENV_IS_IN_FLASH
  1958. flash_protect (FLAG_PROTECT_SET,
  1959. CONFIG_ENV_ADDR,
  1960. CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
  1961. flash_get_info(CONFIG_ENV_ADDR));
  1962. #endif
  1963. /* Redundant environment protection ON by default */
  1964. #ifdef CONFIG_ENV_ADDR_REDUND
  1965. flash_protect (FLAG_PROTECT_SET,
  1966. CONFIG_ENV_ADDR_REDUND,
  1967. CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
  1968. flash_get_info(CONFIG_ENV_ADDR_REDUND));
  1969. #endif
  1970. #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
  1971. for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
  1972. debug("autoprotecting from %08x to %08x\n",
  1973. apl[i].start, apl[i].start + apl[i].size - 1);
  1974. flash_protect (FLAG_PROTECT_SET,
  1975. apl[i].start,
  1976. apl[i].start + apl[i].size - 1,
  1977. flash_get_info(apl[i].start));
  1978. }
  1979. #endif
  1980. #ifdef CONFIG_FLASH_CFI_MTD
  1981. cfi_mtd_init();
  1982. #endif
  1983. return (size);
  1984. }