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@@ -18,11 +18,6 @@ get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
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i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
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i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
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}
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}
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-unsigned int fsl_ddr_get_mem_data_rate(void)
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-{
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- return get_bus_freq(0);
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-}
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-
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void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
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void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
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unsigned int ctrl_num)
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unsigned int ctrl_num)
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{
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{
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@@ -144,7 +139,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
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/* Get clk_adjust, cpo, write_data_delay, according to the board ddr
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/* Get clk_adjust, cpo, write_data_delay, according to the board ddr
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* freqency and n_banks specified in board_specific_parameters table.
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* freqency and n_banks specified in board_specific_parameters table.
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*/
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*/
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- ddr_freq = fsl_ddr_get_mem_data_rate() / 1000000;
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+ ddr_freq = get_ddr_freq(0) / 1000000;
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for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) {
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for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) {
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if (pdimm[j].n_ranks > 0) {
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if (pdimm[j].n_ranks > 0) {
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for (i = 0; i < num_params; i++) {
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for (i = 0; i < num_params; i++) {
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