Commit be0bd8234b9777ecd63c4c686f72af070d886517 changed SPD EEPROM address to 0x51 and DDR SDRAM detection stopped working. Change this address back to 0x50. Signed-off-by: Anatolij Gustschin <agust@denx.de>
@@ -117,7 +117,7 @@
#define CONFIG_CHIP_SELECTS_PER_CTRL 2
/* I2C addresses of SPD EEPROMs */
-#define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */
+#define SPD_EEPROM_ADDRESS 0x50 /* CTLR 0 DIMM 0 */
#define CONFIG_DDR_DEFAULT_CL 30 /* CAS latency 3 */