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@@ -117,7 +117,7 @@
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#define CONFIG_CHIP_SELECTS_PER_CTRL 2
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#define CONFIG_CHIP_SELECTS_PER_CTRL 2
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/* I2C addresses of SPD EEPROMs */
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/* I2C addresses of SPD EEPROMs */
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-#define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */
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+#define SPD_EEPROM_ADDRESS 0x50 /* CTLR 0 DIMM 0 */
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#define CONFIG_DDR_DEFAULT_CL 30 /* CAS latency 3 */
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#define CONFIG_DDR_DEFAULT_CL 30 /* CAS latency 3 */
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