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OMAP3: fix DRAM size for IGEP-based boards.

The total RAM size of the IGEP-based boards is 512MiB not 1GiB, the
LPDDR memory consist on two dies of 256MiB.

Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Tested-by: Javier Martinez Canillas <javier@dowhile0.org>
Enric Balletbò i Serra 12 years ago
parent
commit
4833b0939a
2 changed files with 6 additions and 6 deletions
  1. 3 3
      board/isee/igep0020/igep0020.c
  2. 3 3
      board/isee/igep0030/igep0030.c

+ 3 - 3
board/isee/igep0020/igep0020.c

@@ -77,19 +77,19 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl,
 {
 	*mr = MICRON_V_MR_165;
 #ifdef CONFIG_BOOT_NAND
-	*mcfg = MICRON_V_MCFG_200(512 << 20);
+	*mcfg = MICRON_V_MCFG_200(256 << 20);
 	*ctrla = MICRON_V_ACTIMA_200;
 	*ctrlb = MICRON_V_ACTIMB_200;
 	*rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
 #else
 	if (get_cpu_family() == CPU_OMAP34XX) {
-		*mcfg = NUMONYX_V_MCFG_165(512 << 20);
+		*mcfg = NUMONYX_V_MCFG_165(256 << 20);
 		*ctrla = NUMONYX_V_ACTIMA_165;
 		*ctrlb = NUMONYX_V_ACTIMB_165;
 		*rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
 
 	} else {
-		*mcfg = NUMONYX_V_MCFG_200(512 << 20);
+		*mcfg = NUMONYX_V_MCFG_200(256 << 20);
 		*ctrla = NUMONYX_V_ACTIMA_200;
 		*ctrlb = NUMONYX_V_ACTIMB_200;
 		*rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;

+ 3 - 3
board/isee/igep0030/igep0030.c

@@ -64,19 +64,19 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl,
 {
 	*mr = MICRON_V_MR_165;
 #ifdef CONFIG_BOOT_NAND
-	*mcfg = MICRON_V_MCFG_200(512 << 20);
+	*mcfg = MICRON_V_MCFG_200(256 << 20);
 	*ctrla = MICRON_V_ACTIMA_200;
 	*ctrlb = MICRON_V_ACTIMB_200;
 	*rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
 #else
 	if (get_cpu_family() == CPU_OMAP34XX) {
-		*mcfg = NUMONYX_V_MCFG_165(512 << 20);
+		*mcfg = NUMONYX_V_MCFG_165(256 << 20);
 		*ctrla = NUMONYX_V_ACTIMA_165;
 		*ctrlb = NUMONYX_V_ACTIMB_165;
 		*rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
 
 	} else {
-		*mcfg = NUMONYX_V_MCFG_200(512 << 20);
+		*mcfg = NUMONYX_V_MCFG_200(256 << 20);
 		*ctrla = NUMONYX_V_ACTIMA_200;
 		*ctrlb = NUMONYX_V_ACTIMB_200;
 		*rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;