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@@ -146,12 +146,13 @@ that maps in a single PCI I/O space and PCI memory space. The I/O
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space begins at PCI I/O address 0 and the PCI memory space is
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256 MB starting at PCI address CFG_PCI_TARGBASE. After the
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pci_controller structure is initialized, the cpu-specific code will
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-call the routine pci_pre_init() if the CFG_PCI_PRE_INIT flag is
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-defined. This routine is implemented by board-specific code & is where
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-the board can over-ride/extend the default pci_controller structure
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-settings and do other pre-initialization tasks. If pci_pre_init()
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-returns a value of zero, PCI initialization is aborted; otherwise the
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-controller structure is registered and initialization continues.
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+call the routine pci_pre_init(). This routine is implemented by
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+board-specific code & is where the board can over-ride/extend the
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+default pci_controller structure settings and exspecially provide
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+a routine to map the PCI interrupts and do other pre-initialization
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+tasks. If pci_pre_init() returns a value of zero, PCI initialization
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+is aborted; otherwise the controller structure is registered and
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+initialization continues.
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The default 440GP PCI target configuration is minimal -- it assumes that
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the strapping registers are set as necessary. Since the strapping bits
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