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@@ -50,50 +50,41 @@
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#define CONFIG_SYS_BCSR 0xFA000000
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-/*
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- * Select ethernet configuration
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- *
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- * If either CONFIG_ETHER_ON_SCC or CONFIG_ETHER_ON_FCC is selected,
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- * then CONFIG_ETHER_INDEX must be set to the channel number (1-4 for
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- * SCC, 1-3 for FCC)
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- *
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- * If CONFIG_ETHER_NONE is defined, then either the ethernet routines
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- * must be defined elsewhere (as for the console), or CONFIG_CMD_NET
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- * must be unset.
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- */
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+/* Pass open firmware flat device tree */
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+#define CONFIG_OF_LIBFDT 1
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+#define CONFIG_OF_BOARD_SETUP 1
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+
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+#define OF_TBCLK (bd->bi_busfreq / 4)
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+#define OF_STDOUT_PATH "/soc/cpm/serial <at> 11a80"
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+
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+/* Select ethernet configuration */
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#undef CONFIG_ETHER_ON_SCC /* Ethernet is not on SCC */
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#define CONFIG_ETHER_ON_FCC /* Ethernet is on FCC */
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#undef CONFIG_ETHER_NONE /* No external Ethernet */
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-#ifdef CONFIG_ETHER_ON_FCC
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-
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-#define CONFIG_ETHER_INDEX 1 /* FCC1 is used for Ethernet */
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-
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-#if (CONFIG_ETHER_INDEX == 1)
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+#define CONFIG_NET_MULTI
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+#define CONFIG_SYS_CPMFCR_RAMTYPE 0
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+#define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB)
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+#define CONFIG_HAS_ETH0
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+#define CONFIG_ETHER_ON_FCC1 1
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/* - Rx clock is CLK10
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* - Tx clock is CLK11
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* - BDs/buffers on 60x bus
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* - Full duplex
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*/
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-#define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC1 | CMXFCR_RF1CS_MSK | CMXFCR_TF1CS_MSK)
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-#define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF1CS_CLK10 | CMXFCR_TF1CS_CLK11)
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-#define CONFIG_SYS_CPMFCR_RAMTYPE 0
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-#define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB)
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-
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-#elif (CONFIG_ETHER_INDEX == 2)
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+#define CONFIG_SYS_CMXFCR_MASK1 (CMXFCR_FC1 | CMXFCR_RF1CS_MSK | CMXFCR_TF1CS_MSK)
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+#define CONFIG_SYS_CMXFCR_VALUE1 (CMXFCR_RF1CS_CLK10 | CMXFCR_TF1CS_CLK11)
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+#define CONFIG_HAS_ETH1
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+#define CONFIG_ETHER_ON_FCC2 1
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/* - Rx clock is CLK13
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* - Tx clock is CLK14
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* - BDs/buffers on 60x bus
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* - Full duplex
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*/
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-#define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
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-#define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
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-#define CONFIG_SYS_CPMFCR_RAMTYPE 0
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-#define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB)
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-
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-#endif /* CONFIG_ETHER_INDEX */
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+#define CONFIG_SYS_CMXFCR_MASK2 (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
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+#define CONFIG_SYS_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
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#define CONFIG_MII /* MII PHY management */
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#define CONFIG_BITBANGMII /* Bit-banged MDIO interface */
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@@ -113,8 +104,6 @@
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#define MIIDELAY udelay(1)
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-#endif /* CONFIG_ETHER_ON_FCC */
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-
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#ifndef CONFIG_8260_CLKIN
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#define CONFIG_8260_CLKIN 66000000 /* in Hz */
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#endif
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