powerpc/85xx: Add support for 2nd USB controller on p1_p2_rdb

Second USB controller only works for SPI and SD boot because of pin muxing

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>

arch/powerpc/include/asm/immap_85xx.h

@@ -1969,6 +1969,7 @@ typedef struct ccsr_gur {
 #define MPC85xx_PMUXCR_SD_DATA		0x80000000
 #define MPC85xx_PMUXCR_SDHC_CD		0x40000000
 #define MPC85xx_PMUXCR_SDHC_WP		0x20000000
+#define MPC85xx_PMUXCR_ELBC_OFF_USB2_ON	0x01000000
 #define MPC85xx_PMUXCR_TDM_ENA		0x00800000
 #define MPC85xx_PMUXCR_QE0		0x00008000
 #define MPC85xx_PMUXCR_QE1		0x00004000

board/freescale/p1_p2_rdb/p1_p2_rdb.c

@@ -47,6 +47,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define RGMII_PHY_RST_SET	0x02000000
 
 #define USB_RST_CLR		0x04000000
+#define USB2_PORT_OUT_EN        0x01000000
 
 #define GPIO_DIR		0x060f0000
 
@@ -128,6 +129,19 @@ int checkboard (void)
 	return 0;
 }
 
+int misc_init_r(void)
+{
+#if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
+	ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+	ccsr_gpio_t *gpio = (void *)CONFIG_SYS_MPC85xx_GPIO_ADDR;
+
+	setbits_be32(&gpio->gpdir, USB2_PORT_OUT_EN);
+	setbits_be32(&gpio->gpdat, USB2_PORT_OUT_EN);
+	setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_ELBC_OFF_USB2_ON);
+#endif
+	return 0;
+}
+
 int board_early_init_r(void)
 {
 	const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;

include/configs/P1_P2_RDB.h

@@ -244,6 +244,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_FLASH_AMD_CHECK_DQ7
 
 #define CONFIG_BOARD_EARLY_INIT_R	/* call board_early_init_r function */
+#define CONFIG_MISC_INIT_R
 #define CONFIG_HWCONFIG
 
 #define CONFIG_SYS_INIT_RAM_LOCK	1