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@@ -38,6 +38,7 @@ DECLARE_GLOBAL_DATA_PTR;
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PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
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PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
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+#define USDHC3_CD_GPIO IMX_GPIO_NR(3, 9)
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#define ETH_PHY_RESET IMX_GPIO_NR(3, 29)
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int dram_init(void)
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@@ -59,6 +60,8 @@ static iomux_v3_cfg_t const usdhc3_pads[] = {
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MX6_PAD_SD3_DAT1__USDHC3_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD3_DAT2__USDHC3_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD3_DAT3__USDHC3_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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+ /* SOM MicroSD Card Detect */
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+ MX6_PAD_EIM_DA9__GPIO_3_9 | MUX_PAD_CTRL(NO_PAD_CTRL),
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};
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static iomux_v3_cfg_t const enet_pads[] = {
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@@ -100,12 +103,27 @@ static struct fsl_esdhc_cfg usdhc_cfg[1] = {
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{USDHC3_BASE_ADDR},
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};
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+int board_mmc_getcd(struct mmc *mmc)
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+{
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+ struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
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+ int ret = 0;
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+
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+ switch (cfg->esdhc_base) {
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+ case USDHC3_BASE_ADDR:
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+ ret = !gpio_get_value(USDHC3_CD_GPIO);
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+ break;
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+ }
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+
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+ return ret;
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+}
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+
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int board_mmc_init(bd_t *bis)
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{
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imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
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usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
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usdhc_cfg[0].max_bus_width = 4;
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+ gpio_direction_input(USDHC3_CD_GPIO);
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return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
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}
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