Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
@@ -175,7 +175,7 @@
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_SP_ADDR (GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1)
+#define CONFIG_SYS_INIT_SP_ADDR 0xfffff800
#define FPGA_REGS_BASE_PHYSICAL 0x08000000
@@ -157,7 +157,7 @@
#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_DRAM_BASE
/*
* NOR FLASH
@@ -291,7 +291,7 @@
* GPIO settings
@@ -168,7 +168,7 @@
* FLASH and environment organization