bitops.h 10 KB

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  1. /*
  2. * PowerPC64 atomic bit operations.
  3. * Dave Engebretsen, Todd Inglett, Don Reed, Pat McCarthy, Peter Bergner,
  4. * Anton Blanchard
  5. *
  6. * Originally taken from the 32b PPC code. Modified to use 64b values for
  7. * the various counters & memory references.
  8. *
  9. * Bitops are odd when viewed on big-endian systems. They were designed
  10. * on little endian so the size of the bitset doesn't matter (low order bytes
  11. * come first) as long as the bit in question is valid.
  12. *
  13. * Bits are "tested" often using the C expression (val & (1<<nr)) so we do
  14. * our best to stay compatible with that. The assumption is that val will
  15. * be unsigned long for such tests. As such, we assume the bits are stored
  16. * as an array of unsigned long (the usual case is a single unsigned long,
  17. * of course). Here's an example bitset with bit numbering:
  18. *
  19. * |63..........0|127........64|195.......128|255.......196|
  20. *
  21. * This leads to a problem. If an int, short or char is passed as a bitset
  22. * it will be a bad memory reference since we want to store in chunks
  23. * of unsigned long (64 bits here) size.
  24. *
  25. * There are a few little-endian macros used mostly for filesystem bitmaps,
  26. * these work on similar bit arrays layouts, but byte-oriented:
  27. *
  28. * |7...0|15...8|23...16|31...24|39...32|47...40|55...48|63...56|
  29. *
  30. * The main difference is that bit 3-5 in the bit number field needs to be
  31. * reversed compared to the big-endian bit fields. This can be achieved
  32. * by XOR with 0b111000 (0x38).
  33. *
  34. * This program is free software; you can redistribute it and/or
  35. * modify it under the terms of the GNU General Public License
  36. * as published by the Free Software Foundation; either version
  37. * 2 of the License, or (at your option) any later version.
  38. */
  39. #ifndef _PPC64_BITOPS_H
  40. #define _PPC64_BITOPS_H
  41. #ifdef __KERNEL__
  42. #include <asm/memory.h>
  43. /*
  44. * clear_bit doesn't imply a memory barrier
  45. */
  46. #define smp_mb__before_clear_bit() smp_mb()
  47. #define smp_mb__after_clear_bit() smp_mb()
  48. static __inline__ int test_bit(unsigned long nr, __const__ volatile unsigned long *addr)
  49. {
  50. return (1UL & (addr[nr >> 6] >> (nr & 63)));
  51. }
  52. static __inline__ void set_bit(unsigned long nr, volatile unsigned long *addr)
  53. {
  54. unsigned long old;
  55. unsigned long mask = 1UL << (nr & 0x3f);
  56. unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
  57. __asm__ __volatile__(
  58. "1: ldarx %0,0,%3 # set_bit\n\
  59. or %0,%0,%2\n\
  60. stdcx. %0,0,%3\n\
  61. bne- 1b"
  62. : "=&r" (old), "=m" (*p)
  63. : "r" (mask), "r" (p), "m" (*p)
  64. : "cc");
  65. }
  66. static __inline__ void clear_bit(unsigned long nr, volatile unsigned long *addr)
  67. {
  68. unsigned long old;
  69. unsigned long mask = 1UL << (nr & 0x3f);
  70. unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
  71. __asm__ __volatile__(
  72. "1: ldarx %0,0,%3 # clear_bit\n\
  73. andc %0,%0,%2\n\
  74. stdcx. %0,0,%3\n\
  75. bne- 1b"
  76. : "=&r" (old), "=m" (*p)
  77. : "r" (mask), "r" (p), "m" (*p)
  78. : "cc");
  79. }
  80. static __inline__ void change_bit(unsigned long nr, volatile unsigned long *addr)
  81. {
  82. unsigned long old;
  83. unsigned long mask = 1UL << (nr & 0x3f);
  84. unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
  85. __asm__ __volatile__(
  86. "1: ldarx %0,0,%3 # change_bit\n\
  87. xor %0,%0,%2\n\
  88. stdcx. %0,0,%3\n\
  89. bne- 1b"
  90. : "=&r" (old), "=m" (*p)
  91. : "r" (mask), "r" (p), "m" (*p)
  92. : "cc");
  93. }
  94. static __inline__ int test_and_set_bit(unsigned long nr, volatile unsigned long *addr)
  95. {
  96. unsigned long old, t;
  97. unsigned long mask = 1UL << (nr & 0x3f);
  98. unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
  99. __asm__ __volatile__(
  100. EIEIO_ON_SMP
  101. "1: ldarx %0,0,%3 # test_and_set_bit\n\
  102. or %1,%0,%2 \n\
  103. stdcx. %1,0,%3 \n\
  104. bne- 1b"
  105. ISYNC_ON_SMP
  106. : "=&r" (old), "=&r" (t)
  107. : "r" (mask), "r" (p)
  108. : "cc", "memory");
  109. return (old & mask) != 0;
  110. }
  111. static __inline__ int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)
  112. {
  113. unsigned long old, t;
  114. unsigned long mask = 1UL << (nr & 0x3f);
  115. unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
  116. __asm__ __volatile__(
  117. EIEIO_ON_SMP
  118. "1: ldarx %0,0,%3 # test_and_clear_bit\n\
  119. andc %1,%0,%2\n\
  120. stdcx. %1,0,%3\n\
  121. bne- 1b"
  122. ISYNC_ON_SMP
  123. : "=&r" (old), "=&r" (t)
  124. : "r" (mask), "r" (p)
  125. : "cc", "memory");
  126. return (old & mask) != 0;
  127. }
  128. static __inline__ int test_and_change_bit(unsigned long nr, volatile unsigned long *addr)
  129. {
  130. unsigned long old, t;
  131. unsigned long mask = 1UL << (nr & 0x3f);
  132. unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
  133. __asm__ __volatile__(
  134. EIEIO_ON_SMP
  135. "1: ldarx %0,0,%3 # test_and_change_bit\n\
  136. xor %1,%0,%2\n\
  137. stdcx. %1,0,%3\n\
  138. bne- 1b"
  139. ISYNC_ON_SMP
  140. : "=&r" (old), "=&r" (t)
  141. : "r" (mask), "r" (p)
  142. : "cc", "memory");
  143. return (old & mask) != 0;
  144. }
  145. static __inline__ void set_bits(unsigned long mask, unsigned long *addr)
  146. {
  147. unsigned long old;
  148. __asm__ __volatile__(
  149. "1: ldarx %0,0,%3 # set_bit\n\
  150. or %0,%0,%2\n\
  151. stdcx. %0,0,%3\n\
  152. bne- 1b"
  153. : "=&r" (old), "=m" (*addr)
  154. : "r" (mask), "r" (addr), "m" (*addr)
  155. : "cc");
  156. }
  157. /*
  158. * non-atomic versions
  159. */
  160. static __inline__ void __set_bit(unsigned long nr, volatile unsigned long *addr)
  161. {
  162. unsigned long mask = 1UL << (nr & 0x3f);
  163. unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
  164. *p |= mask;
  165. }
  166. static __inline__ void __clear_bit(unsigned long nr, volatile unsigned long *addr)
  167. {
  168. unsigned long mask = 1UL << (nr & 0x3f);
  169. unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
  170. *p &= ~mask;
  171. }
  172. static __inline__ void __change_bit(unsigned long nr, volatile unsigned long *addr)
  173. {
  174. unsigned long mask = 1UL << (nr & 0x3f);
  175. unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
  176. *p ^= mask;
  177. }
  178. static __inline__ int __test_and_set_bit(unsigned long nr, volatile unsigned long *addr)
  179. {
  180. unsigned long mask = 1UL << (nr & 0x3f);
  181. unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
  182. unsigned long old = *p;
  183. *p = old | mask;
  184. return (old & mask) != 0;
  185. }
  186. static __inline__ int __test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)
  187. {
  188. unsigned long mask = 1UL << (nr & 0x3f);
  189. unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
  190. unsigned long old = *p;
  191. *p = old & ~mask;
  192. return (old & mask) != 0;
  193. }
  194. static __inline__ int __test_and_change_bit(unsigned long nr, volatile unsigned long *addr)
  195. {
  196. unsigned long mask = 1UL << (nr & 0x3f);
  197. unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
  198. unsigned long old = *p;
  199. *p = old ^ mask;
  200. return (old & mask) != 0;
  201. }
  202. /*
  203. * Return the zero-based bit position (from RIGHT TO LEFT, 63 -> 0) of the
  204. * most significant (left-most) 1-bit in a double word.
  205. */
  206. static __inline__ int __ilog2(unsigned long x)
  207. {
  208. int lz;
  209. asm ("cntlzd %0,%1" : "=r" (lz) : "r" (x));
  210. return 63 - lz;
  211. }
  212. /*
  213. * Determines the bit position of the least significant (rightmost) 0 bit
  214. * in the specified double word. The returned bit position will be zero-based,
  215. * starting from the right side (63 - 0).
  216. */
  217. static __inline__ unsigned long ffz(unsigned long x)
  218. {
  219. /* no zero exists anywhere in the 8 byte area. */
  220. if ((x = ~x) == 0)
  221. return 64;
  222. /*
  223. * Calculate the bit position of the least signficant '1' bit in x
  224. * (since x has been changed this will actually be the least signficant
  225. * '0' bit in * the original x). Note: (x & -x) gives us a mask that
  226. * is the least significant * (RIGHT-most) 1-bit of the value in x.
  227. */
  228. return __ilog2(x & -x);
  229. }
  230. static __inline__ int __ffs(unsigned long x)
  231. {
  232. return __ilog2(x & -x);
  233. }
  234. /*
  235. * ffs: find first bit set. This is defined the same way as
  236. * the libc and compiler builtin ffs routines, therefore
  237. * differs in spirit from the above ffz (man ffs).
  238. */
  239. static __inline__ int ffs(int x)
  240. {
  241. unsigned long i = (unsigned long)x;
  242. return __ilog2(i & -i) + 1;
  243. }
  244. /*
  245. * fls: find last (most-significant) bit set.
  246. * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
  247. */
  248. #define fls(x) generic_fls(x)
  249. /*
  250. * hweightN: returns the hamming weight (i.e. the number
  251. * of bits set) of a N-bit word
  252. */
  253. #define hweight64(x) generic_hweight64(x)
  254. #define hweight32(x) generic_hweight32(x)
  255. #define hweight16(x) generic_hweight16(x)
  256. #define hweight8(x) generic_hweight8(x)
  257. extern unsigned long find_next_zero_bit(const unsigned long *addr, unsigned long size, unsigned long offset);
  258. #define find_first_zero_bit(addr, size) \
  259. find_next_zero_bit((addr), (size), 0)
  260. extern unsigned long find_next_bit(const unsigned long *addr, unsigned long size, unsigned long offset);
  261. #define find_first_bit(addr, size) \
  262. find_next_bit((addr), (size), 0)
  263. extern unsigned long find_next_zero_le_bit(const unsigned long *addr, unsigned long size, unsigned long offset);
  264. #define find_first_zero_le_bit(addr, size) \
  265. find_next_zero_le_bit((addr), (size), 0)
  266. static __inline__ int test_le_bit(unsigned long nr, __const__ unsigned long * addr)
  267. {
  268. __const__ unsigned char *ADDR = (__const__ unsigned char *) addr;
  269. return (ADDR[nr >> 3] >> (nr & 7)) & 1;
  270. }
  271. #define test_and_clear_le_bit(nr, addr) \
  272. test_and_clear_bit((nr) ^ 0x38, (addr))
  273. #define test_and_set_le_bit(nr, addr) \
  274. test_and_set_bit((nr) ^ 0x38, (addr))
  275. /*
  276. * non-atomic versions
  277. */
  278. #define __set_le_bit(nr, addr) \
  279. __set_bit((nr) ^ 0x38, (addr))
  280. #define __clear_le_bit(nr, addr) \
  281. __clear_bit((nr) ^ 0x38, (addr))
  282. #define __test_and_clear_le_bit(nr, addr) \
  283. __test_and_clear_bit((nr) ^ 0x38, (addr))
  284. #define __test_and_set_le_bit(nr, addr) \
  285. __test_and_set_bit((nr) ^ 0x38, (addr))
  286. #define ext2_set_bit(nr,addr) \
  287. __test_and_set_le_bit((nr), (unsigned long*)addr)
  288. #define ext2_clear_bit(nr, addr) \
  289. __test_and_clear_le_bit((nr), (unsigned long*)addr)
  290. #define ext2_set_bit_atomic(lock, nr, addr) \
  291. test_and_set_le_bit((nr), (unsigned long*)addr)
  292. #define ext2_clear_bit_atomic(lock, nr, addr) \
  293. test_and_clear_le_bit((nr), (unsigned long*)addr)
  294. #define ext2_test_bit(nr, addr) test_le_bit((nr),(unsigned long*)addr)
  295. #define ext2_find_first_zero_bit(addr, size) \
  296. find_first_zero_le_bit((unsigned long*)addr, size)
  297. #define ext2_find_next_zero_bit(addr, size, off) \
  298. find_next_zero_le_bit((unsigned long*)addr, size, off)
  299. #define minix_test_and_set_bit(nr,addr) test_and_set_bit(nr,addr)
  300. #define minix_set_bit(nr,addr) set_bit(nr,addr)
  301. #define minix_test_and_clear_bit(nr,addr) test_and_clear_bit(nr,addr)
  302. #define minix_test_bit(nr,addr) test_bit(nr,addr)
  303. #define minix_find_first_zero_bit(addr,size) find_first_zero_bit(addr,size)
  304. #endif /* __KERNEL__ */
  305. #endif /* _PPC64_BITOPS_H */