Историја ревизија

Аутор SHA1 Порука Датум
  Ville Syrjälä fb03ac0106 drm/i915: Use DIV_ROUND_CLOSEST() to calculate dot/vco пре 11 година
  Daniel Vetter 0632fef669 drm/i915: rename intel_fb.c to intel_fbdev.c пре 11 година
  Daniel Vetter 4520f53a15 drm/i915: Kconfig option to disable the legacy fbdev support пре 11 година
  Ville Syrjälä fbf49ea21b drm/i915: Fix pipe off timeout handling for pre-gen4 пре 11 година
  Ville Syrjälä 4c445e0ebc drm/i915: Rename primary_disabled to primary_enabled пре 11 година
  Ville Syrjälä e5b611fd44 drm/i915: Populate primary_disabled in intel_modeset_readout_hw_state() пре 11 година
  Paulo Zanoni 5ade2c2f58 drm/i915: wait for IPS_ENABLE when enabling IPS пре 12 година
  Chris Wilson a4945f9522 drm/i915: Undo the PIPEA quirk for i845 пре 11 година
  Ville Syrjälä 0037f71c4b drm/i915: WARN if primary plane state doesn't match expectations пре 11 година
  Ville Syrjälä d1de00efcb drm/i915: Rename intel_{enable, disable}_plane to intel_{enable, disable}_primary_plane пре 11 година
  Ville Syrjälä 1dba99f495 drm/i915: Rename intel_flush_display_plane to intel_flush_primary_plane пре 11 година
  Ville Syrjälä 20bc86739b drm/i915: Enable/disable IPS when primary is enabled/disabled пре 11 година
  Ville Syrjälä 939c2fe8bd drm/i915: Set primary_disabled in intel_{enable, disable}_plane пре 11 година
  Ville Syrjälä e1553faa90 drm/i915: Fix VGA_DISP_DISABLE check пре 11 година
  Ville Syrjälä f01b796283 drm/i915: Use intel_PLL_is_valid() in vlv_find_best_dpll() пре 11 година
  Ville Syrjälä 49e497ef43 drm/i915: Don't lie about findind suitable PLL settings on VLV пре 12 година
  Ville Syrjälä dc730512be drm/i915: intel_limits_vlv_dac and intel_limits_vlv_hdmi are the same пре 12 година
  Ville Syrjälä 5fdc9c49f6 drm/i915: Remove unused dot_limit from VLV PLL limits пре 12 година
  Ville Syrjälä 41504046e9 drm/i915: Remove the unused p and m limits for VLV пре 12 година
  Ville Syrjälä 889059d8f0 drm/i915: Respect p2 divider minimum limit on VLV пре 12 година
  Ville Syrjälä b99ab66301 drm/i915: Allow p1 divider 2 on VLV пре 12 година
  Ville Syrjälä 811bbf0544 drm/i915: Clarify VLV PLL p1 limits пре 12 година
  Ville Syrjälä 27e639bf02 drm/i915: Make sure we respect n.max on VLV пре 12 година
  Ville Syrjälä c1a9ae4388 drm/i915: De-magic the VLV p2 divider step size пре 12 година
  Ville Syrjälä 6b4bf1c495 drm/i915: Rewrite vlv_find_best_dpll() пре 11 година
  Ville Syrjälä c686122c63 drm/i915: Don't underflow bestppm пре 12 година
  Ville Syrjälä 69e4f900be drm/i915: Make vlv_find_best_dpll() ppm calculation safe пре 12 година
  Damien Lespiau d7bf63f246 drm/i915: Use adjusted_mode in the fastboot hack to disable pfit пре 11 година
  Damien Lespiau bb2043de02 drm/i915: Add a more detailed comment about the set_base() fastboot hack пре 11 година
  Jesse Barnes 40e9cf649a drm/i915/vlv: reset DPIO on load and resume v2 пре 11 година