Commit History

Author SHA1 Message Date
  Ben Widawsky f343c5f647 drm/i915: Getter/setter for object attributes 12 years ago
  Daniel Vetter 190d6cd5cd drm/i915: less magic for stolen preallocated objects w/o gtt offset 12 years ago
  Ville Syrjälä e8474409d7 drm/i915: Use wait_for() to wait for Punit to change GPU freq on VLV 12 years ago
  Ben Widawsky 5c3fe8b03e drm/i915: Move fbc members out of line 12 years ago
  Damien Lespiau f4db9321a7 drm/i915: Fix a couple of "should it be static?" sparse warnings 12 years ago
  Damien Lespiau 8a5729a373 drm/i915: Fix reason for per-chip disabling of FBC 12 years ago
  Damien Lespiau b63fb44c65 drm/i915: Make intel_enable_fbc() static 12 years ago
  Paulo Zanoni 6cdcb5e73f drm/i915: invert the verbosity of intel_enable_fbc 12 years ago
  Ville Syrjälä 6dc5848899 drm/i915: Don't increase the GPU frequency from the delayed VLV rps timer 12 years ago
  Ville Syrjälä 7a67092a25 drm/i915: GEN6_RP_INTERRUPT_LIMITS doesn't seem to exist on VLV 12 years ago
  Ville Syrjälä 80814ae4da drm/i915: Don't wait for Punit after each freq change on VLV 12 years ago
  Ville Syrjälä 73008b989f drm/i915: Clean up VLV rps code a bit 12 years ago
  Ville Syrjälä e4e9222d4b drm/i915: Remove duplicated WaForceL3Serialization:vlv 12 years ago
  Ville Syrjälä e0d8d59b08 drm/i915: Try harder to disable trickle feed on VLV 12 years ago
  Rodrigo Vivi fd3da6c95b drm/i915: WA: FBC Render Nuke. 12 years ago
  Ville Syrjälä 0e088b8f33 drm/i915: Refactor ctg+ trickle feed disable 12 years ago
  Ville Syrjälä bdad2b2f31 drm/i915: Disable trickle feed in ironlake_init_clock_gating() 12 years ago
  Ville Syrjälä 20f949670f drm/i915: Disable trickle feed via MI_ARB_STATE for the gen4 12 years ago
  Ville Syrjälä de1aa629aa drm/i915: Disable primary plane trickle feed for g4x 12 years ago
  Wang Xingchao a38911a3fe i915/drm: Add private api for power well usage 12 years ago
  Paulo Zanoni f85da868e3 drm/i915: update FBC maximum fb sizes 12 years ago
  Ville Syrjälä d7fe0cc0f2 drm/i915: Fix DSPCLK_GATE_D for VLV 12 years ago
  Ville Syrjälä 4548feb1fe drm/i915: VLV doesn't have the ILK+ style LP watermark registers 12 years ago
  Daniel Vetter ff9a6750ac drm/i915: store adjusted dotclock in adjusted_mode->clock 12 years ago
  Ben Widawsky 4848405cce drm/i915: make PM interrupt writes non-destructive 12 years ago
  Ben Widawsky eda63ffb90 drm/i915: Add PM regs to pre/post install 12 years ago
  Paulo Zanoni 861f3389c6 drm/i915: add support for 5/6 data buffer partitioning on Haswell 12 years ago
  Paulo Zanoni cca32e9ad3 drm/i915: properly set HSW WM_LP watermarks 12 years ago
  Paulo Zanoni 801bcfffbb drm/i915: properly set HSW WM_PIPE registers 12 years ago
  Paulo Zanoni 526682e9fa drm/i915: add haswell_update_sprite_wm 12 years ago