 Chris Wilson
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a6c45cf013
drm/i915: INTEL_INFO->gen supercedes i8xx, i9xx, i965g
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15 years ago |
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Chris Wilson
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e9e5f8e8d3
Merge branch 'drm-intel-fixes' into HEAD
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15 years ago |
|
Chris Wilson
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f899fc64cd
drm/i915: use GMBUS to manage i2c links
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15 years ago |
|
Chris Wilson
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2cf34d7b7e
drm/i915: Allow get_fence_reg() to be uninterruptible
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15 years ago |
|
Chris Wilson
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48b956c5a8
drm/i915: Push pipelining of display plane flushes to the caller
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15 years ago |
|
Chris Wilson
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7213342db5
drm/i915: Consolidate flushing the display plane
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15 years ago |
|
Chris Wilson
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e2e767abd8
drm/i915: Remove redundant initialisation of crtc->pipe
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15 years ago |
|
Chris Wilson
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e65d9305f5
drm/i915: Initialize intel_crtc->active
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15 years ago |
|
Chris Wilson
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f7abfe8b28
drm/i915: Fix an overlay regression from 7e7d76c
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15 years ago |
|
Chris Wilson
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6b383a7f63
drm/i915: Share crtc setup and teardown between dpms and disable/enable
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15 years ago |
|
Chris Wilson
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e9e331a8ab
drm/i915/lvds: Ensure panel is unlocked for Ironlake or the panel fitter
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15 years ago |
|
Chris Wilson
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897493504a
drm/i915: Ensure that the crtcinfo is populated during mode_fixup()
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15 years ago |
|
Chris Wilson
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ec5da01e23
drm/i915: Use msleep instead of mdelay during wait_vblank_off
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15 years ago |
|
Chris Wilson
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5eddb70ba2
drm/i915: Use macros to switch between equivalent pipe registers
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15 years ago |
|
Chris Wilson
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4ed765f966
drm/i915: Tidy Ironlake watermark computation
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15 years ago |
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Chris Wilson
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bed4a6734b
drm/i915: Fix updating FBC
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15 years ago |
 Jesse Barnes
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ea056c14a2
drm/i915: enable thermal reporting for IPS
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15 years ago |
|
Chris Wilson
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8b3016c4f4
Merge branch 'drm-intel-fixes' into drm-intel-next
|
15 years ago |
|
Chris Wilson
|
021357acc8
drm/i915: Use the real FDI frequency for determining b/w
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15 years ago |
|
Chris Wilson
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8c4223bee9
drm/i915: Only call udelay() when waiting for clocks to stabilise
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15 years ago |
|
Chris Wilson
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d5e0d2f519
drm/i915: Ensure all PLL registers are flushed before a udelay()
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15 years ago |
|
Jesse Barnes
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c64e311e65
drm/i915: set FDI RX TU size to match transmit size
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15 years ago |
|
Jesse Barnes
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de9c27bf70
drm/i915: don't write TU size to N1 reg
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15 years ago |
|
Jesse Barnes
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0e23b99d25
drm/i915: split Ironlake FDI enable function
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15 years ago |
|
Jesse Barnes
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c98e9dcf90
drm/i915: enable PCH PLL, FDI training and transcoder even for eDP
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15 years ago |
|
Jesse Barnes
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7e7d76c306
drm/i915: use i915 and Ironlake CRTC enable/disable functions in prepare/commit
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15 years ago |
|
Jesse Barnes
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0b8765c6e7
drm/i915: split i9xx CRTC enable/disable code
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15 years ago |
|
Jesse Barnes
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6be4a6078e
drm/i915: split Ironlake CRTC enable/disable code
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15 years ago |
|
Jesse Barnes
|
dd8849c8f5
drm/i915: don't enable self-refresh on Ironlake
|
15 years ago |
|
Chris Wilson
|
df0e924883
drm/i915: Make the connector->encoder relationship explicit
|
15 years ago |
