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@@ -1989,8 +1989,8 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
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if ((temp & DPLL_VCO_ENABLE) == 0) {
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I915_WRITE(pch_dpll_reg, temp | DPLL_VCO_ENABLE);
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I915_READ(pch_dpll_reg);
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+ udelay(200);
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}
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- udelay(200);
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if (HAS_PCH_CPT(dev)) {
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/* Be sure PCH DPLL SEL is set */
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@@ -2136,8 +2136,6 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
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} else
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DRM_DEBUG_KMS("crtc %d is disabled\n", pipe);
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- udelay(100);
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-
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/* Disable PF */
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I915_WRITE(pipe ? PFB_CTL_1 : PFA_CTL_1, 0);
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I915_WRITE(pipe ? PFB_WIN_SZ : PFA_WIN_SZ, 0);
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