 Daniel Vetter
|
ebfd86fda6
drm/i915: Split up ironlake_check_fdi_lanes
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12 年之前 |
|
Daniel Vetter
|
877d48d5f7
drm/i915: compute fdi lane config earlier
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12 年之前 |
|
Daniel Vetter
|
ca3a0ff80f
drm/i915: split up fdi_set_m_n into computation and hw setup
|
12 年之前 |
|
Daniel Vetter
|
627eb5a318
drm/i915: hw state readout support for pipe_config->fdi_lanes
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12 年之前 |
|
Daniel Vetter
|
33d29b1453
drm/i915: move intel_crtc->fdi_lanes to pipe_config
|
12 年之前 |
|
Daniel Vetter
|
ff9ce46ed6
drm/i915: implement high-bpc + pipeconf-dither support for g4x/vlv
|
12 年之前 |
|
Daniel Vetter
|
6ff93609b1
drm/i915: drop adjusted_mode from *_set_pipeconf functions
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12 年之前 |
|
Daniel Vetter
|
60c4ae101f
drm/i915: put the right cpu_transcoder into pipe_config for hw state readout
|
12 年之前 |
 Jesse Barnes
|
b074cec8c6
drm/i915: move PCH pfit controls into pipe_config
|
12 年之前 |
|
Jesse Barnes
|
2dd24552ca
drm/i915: factor out GMCH panel fitting code and use for eDP v3
|
12 年之前 |
|
Daniel Vetter
|
198a037f02
drm/i915: simplify config->pixel_multiplier handling
|
12 年之前 |
|
Daniel Vetter
|
9566e9af52
drm/i915: remove redundant has_pch_encoder check
|
12 年之前 |
|
Daniel Vetter
|
4f4134ace0
drm/i915: don't force matching p1 for g4x/ilk+ reduced pll settings
|
12 年之前 |
|
Daniel Vetter
|
d8b3224749
drm/i915: use pipe_config for lvds dithering
|
12 年之前 |
|
Daniel Vetter
|
c6bb353815
drm/i915: move dp clock computations to encoder->compute_config
|
12 年之前 |
|
Daniel Vetter
|
7429e9d4bf
drm/i915: shovel compute clock into crtc->config.dpll on ilk
|
12 年之前 |
|
Daniel Vetter
|
cbbab5bdea
drm/i915: consolidate pch pll computations a bit
|
12 年之前 |
|
Daniel Vetter
|
996a2239f9
drm/i915: Disable high-bpc on pre-1.4 EDID screens
|
12 年之前 |
|
Daniel Vetter
|
fd0c06420d
drm/i915: disable interrupts earlier in the driver unload code
|
12 年之前 |
 Ville Syrjälä
|
80ad9206c0
drm/i915: Make struct dpll == intel_clock_t
|
12 年之前 |
 Paulo Zanoni
|
f196e6bedb
drm/i915: use cpu_transcoder for TRANS_DDI_FUNC_CTL
|
12 年之前 |
|
Paulo Zanoni
|
2bfce95075
drm/i915: check the power well inside haswell_get_pipe_config
|
12 年之前 |
|
Paulo Zanoni
|
8664281b64
drm/i915: report Gen5+ CPU and PCH FIFO underruns
|
12 年之前 |
|
Jesse Barnes
|
89b667f86a
drm/i915: update VLV PLL and DPIO code v11
|
12 年之前 |
|
Jesse Barnes
|
78c9b7e71d
drm/i915: drop init_dpio, shouldn't be needed
|
12 年之前 |
 Pallavi G
|
e2fa6fba3d
drm/i915/dp: program VSwing and Preemphasis control settings on VLV v2
|
12 年之前 |
|
Daniel Vetter
|
75e539864a
drm/i915: fix VLV limits
|
12 年之前 |
|
Ville Syrjälä
|
06da8da2b0
drm/i915: Use alphabetical names for sprites
|
12 年之前 |
|
Ville Syrjälä
|
4bb6f1f327
drm/i915: Use alphabetical names for transcoders too
|
12 年之前 |
|
Ville Syrjälä
|
84f44ce795
drm/i915: Print plane, pipe, port names as alphabetical insted of decimal
|
12 年之前 |
